KR102480524B1 - 검사 장치의 제어 방법 및 검사 장치 - Google Patents

검사 장치의 제어 방법 및 검사 장치 Download PDF

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Publication number
KR102480524B1
KR102480524B1 KR1020200118336A KR20200118336A KR102480524B1 KR 102480524 B1 KR102480524 B1 KR 102480524B1 KR 1020200118336 A KR1020200118336 A KR 1020200118336A KR 20200118336 A KR20200118336 A KR 20200118336A KR 102480524 B1 KR102480524 B1 KR 102480524B1
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KR
South Korea
Prior art keywords
inspection
aligner
alignment
substrate
control unit
Prior art date
Application number
KR1020200118336A
Other languages
English (en)
Korean (ko)
Other versions
KR20210035745A (ko
Inventor
도모야 엔도
Original Assignee
도쿄엘렉트론가부시키가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 도쿄엘렉트론가부시키가이샤 filed Critical 도쿄엘렉트론가부시키가이샤
Publication of KR20210035745A publication Critical patent/KR20210035745A/ko
Application granted granted Critical
Publication of KR102480524B1 publication Critical patent/KR102480524B1/ko

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318505—Test of Modular systems, e.g. Wafers, MCM's
    • G01R31/318511—Wafer Test
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2855—Environmental, reliability or burn-in testing
    • G01R31/286—External aspects, e.g. related to chambers, contacting devices or handlers
    • G01R31/2865—Holding devices, e.g. chucks; Handlers or transport devices
    • G01R31/2867—Handlers or transport devices, e.g. loaders, carriers, trays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/14—Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2855—Environmental, reliability or burn-in testing
    • G01R31/286—External aspects, e.g. related to chambers, contacting devices or handlers
    • G01R31/2862—Chambers or ovens; Tanks
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks
    • G01R31/2887—Features relating to contacting the IC under test, e.g. probe heads; chucks involving moving the probe head or the IC under test; docking stations
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks
    • G01R31/2891—Features relating to contacting the IC under test, e.g. probe heads; chucks related to sensing or controlling of force, position, temperature
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2893—Handling, conveying or loading, e.g. belts, boats, vacuum fingers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67253—Process monitoring, e.g. flow or thickness monitoring
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67259—Position monitoring, e.g. misposition detection or presence detection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/31903—Tester hardware, i.e. output processing circuits tester configuration
    • G01R31/31907—Modular tester, e.g. controlling and coordinating instruments in a bus based architecture

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Environmental & Geological Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
KR1020200118336A 2019-09-24 2020-09-15 검사 장치의 제어 방법 및 검사 장치 KR102480524B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JPJP-P-2019-173443 2019-09-24
JP2019173443A JP7458161B2 (ja) 2019-09-24 2019-09-24 検査装置の制御方法および検査装置

Publications (2)

Publication Number Publication Date
KR20210035745A KR20210035745A (ko) 2021-04-01
KR102480524B1 true KR102480524B1 (ko) 2022-12-22

Family

ID=74880770

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020200118336A KR102480524B1 (ko) 2019-09-24 2020-09-15 검사 장치의 제어 방법 및 검사 장치

Country Status (4)

Country Link
US (1) US11385286B2 (ja)
JP (1) JP7458161B2 (ja)
KR (1) KR102480524B1 (ja)
CN (1) CN112635341B (ja)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2022149765A (ja) 2021-03-25 2022-10-07 サトーホールディングス株式会社 情報処理システム、情報処理装置、情報処理方法、及び、プログラム
JP2023082554A (ja) 2021-12-02 2023-06-14 株式会社東京精密 筐体及びプローバ

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130057839A1 (en) * 2011-09-05 2013-03-07 Canon Kabushiki Kaisha Lithography system and manufacturing method of commodities
US20180275192A1 (en) * 2015-09-30 2018-09-27 Tokyo Electron Limited Wafer Inspection Method and Wafer Inspection Device

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2501613B2 (ja) * 1988-03-08 1996-05-29 東京エレクトロン株式会社 ウエハプロ―バ
JPH0682738B2 (ja) * 1990-10-20 1994-10-19 トーワ株式会社 Ｉｃリードピンの外観検査方法および検査台
JPH0922927A (ja) * 1995-07-05 1997-01-21 Tokyo Electron Ltd 位置決め装置および検査装置
JP3424011B2 (ja) * 1997-11-19 2003-07-07 東京エレクトロン株式会社 プローブ方法及びプローブ装置
JP4740405B2 (ja) * 2000-11-09 2011-08-03 東京エレクトロン株式会社 位置合わせ方法及びプログラム記録媒体
EP1339100A1 (en) * 2000-12-01 2003-08-27 Ebara Corporation Inspection method and apparatus using electron beam, and device production method using it
JP4130101B2 (ja) * 2002-07-25 2008-08-06 株式会社東京精密 プローバ装置およびプローバ装置を備えた検査装置
JP2004200383A (ja) * 2002-12-18 2004-07-15 Tokyo Seimitsu Co Ltd 位置合わせ方法
JP2004296921A (ja) * 2003-03-27 2004-10-21 Canon Inc 位置検出装置
CN1820346B (zh) * 2003-05-09 2011-01-19 株式会社荏原制作所 基于带电粒子束的检查装置及采用了该检查装置的器件制造方法
US7349575B2 (en) * 2003-06-27 2008-03-25 Nippon Avionics Co., Ltd. Pattern inspection method and apparatus, and pattern alignment method
JP4383945B2 (ja) * 2004-04-06 2009-12-16 キヤノン株式会社 アライメント方法、露光方法、及び露光装置
JP4736821B2 (ja) * 2006-01-24 2011-07-27 株式会社日立製作所 パターン形成方法およびパターン形成装置
JP5137336B2 (ja) * 2006-05-29 2013-02-06 株式会社日本マイクロニクス 可動式プローブユニット機構及び電気検査装置
US7494830B2 (en) * 2007-04-06 2009-02-24 Taiwan Semiconductor Manufacturing Company Method and device for wafer backside alignment overlay accuracy
CN101779270B (zh) * 2007-08-10 2013-06-12 株式会社尼康 基板贴合装置及基板贴合方法
JP2010245508A (ja) * 2009-03-16 2010-10-28 Micronics Japan Co Ltd ウェハアライメント装置及びウェハアライメント方法
JP5456394B2 (ja) * 2009-07-09 2014-03-26 国立大学法人神戸大学 複合半透膜
WO2011016096A1 (ja) * 2009-08-07 2011-02-10 株式会社アドバンテスト 試験装置および試験方法
JP2012204695A (ja) * 2011-03-25 2012-10-22 Tokyo Electron Ltd プローブカード検出装置、ウエハの位置合わせ装置及びウエハの位置合わせ方法
JP6652361B2 (ja) * 2015-09-30 2020-02-19 東京エレクトロン株式会社 ウエハ検査装置及びウエハ検査方法
JP6827385B2 (ja) 2017-08-03 2021-02-10 東京エレクトロン株式会社 検査システム

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130057839A1 (en) * 2011-09-05 2013-03-07 Canon Kabushiki Kaisha Lithography system and manufacturing method of commodities
US20180275192A1 (en) * 2015-09-30 2018-09-27 Tokyo Electron Limited Wafer Inspection Method and Wafer Inspection Device

Also Published As

Publication number Publication date
JP2021052065A (ja) 2021-04-01
US11385286B2 (en) 2022-07-12
US20210088588A1 (en) 2021-03-25
CN112635341B (zh) 2024-07-19
JP7458161B2 (ja) 2024-03-29
KR20210035745A (ko) 2021-04-01
CN112635341A (zh) 2021-04-09

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