KR100357876B1 - 반도체패키지 및 그 제조 방법 - Google Patents
반도체패키지 및 그 제조 방법 Download PDFInfo
- Publication number
- KR100357876B1 KR100357876B1 KR1019990044648A KR19990044648A KR100357876B1 KR 100357876 B1 KR100357876 B1 KR 100357876B1 KR 1019990044648 A KR1019990044648 A KR 1019990044648A KR 19990044648 A KR19990044648 A KR 19990044648A KR 100357876 B1 KR100357876 B1 KR 100357876B1
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- inner lead
- lead
- mounting plate
- chip mounting
- semiconductor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
Claims (3)
- 다수의 입출력패드가 형성된 반도체칩과; 상기 반도체칩의 저면에 접착제로 접착된 칩탑재판과; 상기 칩탑재판의 외주연에 일정거리 이격되어 형성된 다수의 내부리드와; 상기 반도체칩의 입출력패드와 내부리드를 전기적으로 접속하는 도전성와이어와; 상기 반도체칩, 도전성와이어, 칩탑재판 및 내부리드 등이 봉지재로 봉지되어 있되, 상기 칩탑재판 및 내부리드의 저면과 측면은 외부로 노출되도록 봉지되어 형성된 패키지몸체로 이루어진 반도체패키지에 있어서,상기 내부리드의 외측면에는 패키지몸체의 상부 방향을 향하여 버가 형성된 것을 특징으로 하는 반도체패키지.
- 제1항에 있어서, 상기 내부리드는 저면 및 외측면 일부 영역에까지 솔더 등으로 도금층이 형성된 것을 특징으로 하는 반도체패키지.
- 대략 판상의 프레임몸체와, 상기 프레임몸체의 모서리에서 내측으로 연장된 다수의 타이바와, 상기 타이바에 연결되어 차후 반도체칩이 탑재되는 칩탑재판과, 상기 칩탑재판의 외주연에 일정거리 이격되어 방사상으로 형성된 다수의 내부리드와, 상기 내부리드에 연장되어 다시 프레임몸체에 연결되는 외부리드 및 상기 내부리드와 외부리드 사이에 형성되어 프레임몸체에 연결되는 댐바로 이루어진 리드프레임을 구비하는 단계와; 상기 칩탑재판에 반도체칩을 접착제로 접착하는 단계와;상기 반도체칩의 입출력패드와 리드프레임의 내부리드를 전기적으로 접속하는 단계와; 상기 반도체칩, 도전성와이어, 칩탑재판, 내부리드 등을 봉지재로 봉지하되, 상기 칩탑재판과 내부리드의 저면 및 측면은 외부로 노출되도록 봉지하여 패키지몸체를 형성하는 단계와; 상기 몸체 저면으로 노출되는 내부리드의 저면에 차후 마더보드에의 융착이 용이하게 실시되도록 솔더 등으로 도금층을 형성하는 단계와; 상기 리드프레임으로부터 반도체패키지가 독립되도록 싱귤레이션하는 단계로 이루어진 반도체패키지의 제조 방법에 있어서,상기 싱귤레이션 단계는 패키지몸체가 하부를 향하도록 리드프레임을 뒤집은 상태로 바텀클램프 및 탑클램프 사이에 위치시켜 리드프레임을 클램핑하는 단계와,상기 리드프레임의 댐바, 내부리드와 외부리드의 경계 부분, 타이바 등을 펀치로 절단하되, 내부리드에 형성되는 버가 패키지몸체쪽을 향하도록 탑클램프쪽에서 바텀클램프쪽으로 하강하여 싱귤레이션함을 특징으로 하는 반도체패키지의 제조 방법.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019990044648A KR100357876B1 (ko) | 1999-10-15 | 1999-10-15 | 반도체패키지 및 그 제조 방법 |
JP2000015004A JP2001077278A (ja) | 1999-10-15 | 2000-01-24 | 半導体パッケージと、このためのリードフレーム及び、半導体パッケージの製造方法とそのモールド |
US09/687,049 US6525406B1 (en) | 1999-10-15 | 2000-10-13 | Semiconductor device having increased moisture path and increased solder joint strength |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019990044648A KR100357876B1 (ko) | 1999-10-15 | 1999-10-15 | 반도체패키지 및 그 제조 방법 |
Publications (2)
Publication Number | Publication Date |
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KR20010037244A KR20010037244A (ko) | 2001-05-07 |
KR100357876B1 true KR100357876B1 (ko) | 2002-10-25 |
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Application Number | Title | Priority Date | Filing Date |
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KR1019990044648A KR100357876B1 (ko) | 1999-10-15 | 1999-10-15 | 반도체패키지 및 그 제조 방법 |
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KR (1) | KR100357876B1 (ko) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07176673A (ja) * | 1993-12-21 | 1995-07-14 | Hitachi Ltd | リードフレーム及びそれを用いた半導体装置の製造方法 |
JPH08124950A (ja) * | 1994-10-26 | 1996-05-17 | Toshiba Corp | 半導体装置の製造方法 |
KR19980066329A (ko) * | 1997-01-22 | 1998-10-15 | 문정환 | 반도체 패키지의 리드구조 |
KR19980086249A (ko) * | 1997-05-31 | 1998-12-05 | 문정환 | 버틈 리드 패키지 및 그 제조 방법 |
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1999
- 1999-10-15 KR KR1019990044648A patent/KR100357876B1/ko active IP Right Grant
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07176673A (ja) * | 1993-12-21 | 1995-07-14 | Hitachi Ltd | リードフレーム及びそれを用いた半導体装置の製造方法 |
JPH08124950A (ja) * | 1994-10-26 | 1996-05-17 | Toshiba Corp | 半導体装置の製造方法 |
KR19980066329A (ko) * | 1997-01-22 | 1998-10-15 | 문정환 | 반도체 패키지의 리드구조 |
KR19980086249A (ko) * | 1997-05-31 | 1998-12-05 | 문정환 | 버틈 리드 패키지 및 그 제조 방법 |
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Publication number | Publication date |
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KR20010037244A (ko) | 2001-05-07 |
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