KR100306910B1 - 모스 트랜지스터 제조방법 - Google Patents

모스 트랜지스터 제조방법 Download PDF

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Publication number
KR100306910B1
KR100306910B1 KR1019990035434A KR19990035434A KR100306910B1 KR 100306910 B1 KR100306910 B1 KR 100306910B1 KR 1019990035434 A KR1019990035434 A KR 1019990035434A KR 19990035434 A KR19990035434 A KR 19990035434A KR 100306910 B1 KR100306910 B1 KR 100306910B1
Authority
KR
South Korea
Prior art keywords
region
trench
substrate
forming
gate
Prior art date
Application number
KR1019990035434A
Other languages
English (en)
Korean (ko)
Other versions
KR20010019154A (ko
Inventor
이봉재
Original Assignee
김영환
현대반도체 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김영환, 현대반도체 주식회사 filed Critical 김영환
Priority to KR1019990035434A priority Critical patent/KR100306910B1/ko
Priority to JP2000252166A priority patent/JP2001085676A/ja
Publication of KR20010019154A publication Critical patent/KR20010019154A/ko
Application granted granted Critical
Publication of KR100306910B1 publication Critical patent/KR100306910B1/ko

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42356Disposition, e.g. buried gate electrode
    • H01L29/4236Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568Lateral single gate silicon transistors
    • H01L29/66575Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
    • H01L29/6659Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568Lateral single gate silicon transistors
    • H01L29/66613Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation
    • H01L29/66621Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation using etching to form a recess at the gate location

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
KR1019990035434A 1999-08-25 1999-08-25 모스 트랜지스터 제조방법 KR100306910B1 (ko)

Priority Applications (2)

Application Number Priority Date Filing Date Title
KR1019990035434A KR100306910B1 (ko) 1999-08-25 1999-08-25 모스 트랜지스터 제조방법
JP2000252166A JP2001085676A (ja) 1999-08-25 2000-08-23 Mosトランジスタ及びその製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019990035434A KR100306910B1 (ko) 1999-08-25 1999-08-25 모스 트랜지스터 제조방법

Publications (2)

Publication Number Publication Date
KR20010019154A KR20010019154A (ko) 2001-03-15
KR100306910B1 true KR100306910B1 (ko) 2001-11-01

Family

ID=19608630

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019990035434A KR100306910B1 (ko) 1999-08-25 1999-08-25 모스 트랜지스터 제조방법

Country Status (2)

Country Link
JP (1) JP2001085676A (ja)
KR (1) KR100306910B1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101250649B1 (ko) 2011-12-26 2013-04-03 삼성전기주식회사 반도체 소자 및 이의 제조 방법

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100567076B1 (ko) * 2004-12-29 2006-04-04 주식회사 하이닉스반도체 트랜지스터 제조방법
CN108376647B (zh) * 2018-04-19 2021-04-30 济南安海半导体有限公司 屏蔽栅场效应晶体管及其制造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101250649B1 (ko) 2011-12-26 2013-04-03 삼성전기주식회사 반도체 소자 및 이의 제조 방법

Also Published As

Publication number Publication date
JP2001085676A (ja) 2001-03-30
KR20010019154A (ko) 2001-03-15

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