KR0162140B1 - Formation method of contact hole - Google Patents
Formation method of contact hole Download PDFInfo
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- KR0162140B1 KR0162140B1 KR1019940039101A KR19940039101A KR0162140B1 KR 0162140 B1 KR0162140 B1 KR 0162140B1 KR 1019940039101 A KR1019940039101 A KR 1019940039101A KR 19940039101 A KR19940039101 A KR 19940039101A KR 0162140 B1 KR0162140 B1 KR 0162140B1
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- film
- contact hole
- nitride film
- forming
- titanium nitride
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
Abstract
본 발명은 반도체 소자의 콘택 홀 형성방법에 관한 것으로서, 특히 다층금속 배선간의 연결을 위한 콘택 홀 형성시에 발생하는 난반사막인 티타늄질화막의 언더 컷 및 SOG막의 노출을 억제하여 반도체 소자의 제조 수율 및 신뢰성을 향상할 수 있는 콘택 홀 형성방법에 관한 것으로서, 소정 패턴의 하부금속 배선 및 티타늄질화막을 형성한 후 제1 사진식각하는 단계, 전체 구조의 상부에 질화막, SOG막 및 절연용 산화막을 적층한 후 제2 사진식각하는 단계 및 산화막 스페이서를 형성하는 단계로 이루어져서, 티타늄질화막의 언더 컷 현상의 발생이 억제되어 상부금속 배선이 단락되는 현상을 방지할 수 있으며, 또한 SOG막에 수분의 흡착이 억제되어 금속 배선막이 부식되는 현상을 방지할 수 있다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a contact hole in a semiconductor device, and in particular, to suppress the undercut of a titanium nitride film, which is a diffuse reflection film, and the exposure of an SOG film, which are generated during contact hole formation for connection between multi-layered metal wirings. A method of forming a contact hole capable of improving reliability, the method comprising: forming a lower metal wiring and a titanium nitride film having a predetermined pattern and then etching the first photo, and stacking a nitride film, an SOG film, and an insulating oxide film on the entire structure. After the second photo etching step and forming the oxide film spacer, the undercut phenomenon of the titanium nitride film can be suppressed to prevent the short circuit of the upper metal wiring, and also the adsorption of moisture to the SOG film is suppressed. Therefore, the phenomenon that the metal wiring film is corroded can be prevented.
Description
제1도는 종래의 콘택 홀 형성방법의 공정도.1 is a process chart of a conventional method for forming a contact hole.
제2도의 (a) 내지 (d)는 본 발명에 따른 콘택 홀 형성방법의 공정도.(A) to (d) of FIG. 2 are process drawings of the method for forming a contact hole according to the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
1 : 실리콘 기판 2 : 절연막1 silicon substrate 2 insulating film
3 : 하부금속 배선 4 : 티타늄질화막3: lower metal wiring 4: titanium nitride film
9 : 제1 감광막 패턴 10 : 질화막9: first photosensitive film pattern 10: nitride film
11 : SOG막 12 : 절연용 산화막11: SOG film 12: oxide film for insulation
13 : 제2 감광막 패턴 14 : 산화막 스페이서13: 2nd photosensitive film pattern 14: oxide film spacer
본 발명은 반도체 소자의 콘택 홀 형성방법에 관한 것으로서, 특히 다층금속 배선간의 연결을 위한 콘택 홀 형성시에 발생하는 알루미늄의 난반사막인 티타늄질화막(TiN)의 언더 컷(undercut) 및 SOG막의 노출을 억제하여 반도체 소자의 제조 수율 및 신뢰성을 향상할 수 있는 콘택 홀 형성 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a contact hole in a semiconductor device, and more particularly, to undercut and expose an SOG film, an undercut of a titanium nitride film (TiN), which is a diffuse reflection film of aluminum, which occurs at the time of forming a contact hole for connection between multilayer metal wirings. The present invention relates to a method for forming a contact hole which can be suppressed to improve the production yield and reliability of a semiconductor device.
일반적으로 콘택(contact)이라 함은 반도체 기판과 금속 배선, 또는 금속 배선과 반도체 전극간의 전기적으로 연결함을 의미하며, 대체적으로 콘택을 이루기 위해 하층의 금속 배선에 상충의 금속부와 전기적 절연을 목적으로 하는 절연층을 도포하고, 사진 식각 공정에 의한 콘택 홀을 형성하여 금속 또는 폴리실리콘을 콘택 홀의 오목부에 배포하여 콘택을 이루게 된다.In general, a contact means an electrical connection between a semiconductor substrate and a metal wiring, or between a metal wiring and a semiconductor electrode, and is generally intended to electrically insulate the metal layer of the lower layer from the metal wiring to form a contact. The insulating layer is coated, a contact hole is formed by a photolithography process, and metal or polysilicon is distributed to a recess of the contact hole to form a contact.
일반적으로 반도체 금속 배선의 재료로는 저저항을 가지고 있는 알루미늄이 널리 이용되고 있는데 소자의 집적도가 증가함으로 인하여 배선의 폭이 미세화되어 전류 밀도의 증가로 인한 전자 이동, 난반사 및 스트레스의 이동이 배선의 불량을 야기시킴으로써 반도체 장치의 신뢰성을 저하시키는 문제점이 발생하였다. 상기의 문제점을 보완하기 위하여 알루미늄 배선 막상에 티타늄 질화막 또는 티타늄막(Ti)등을 적층하여 전자 이동 및 스트레스의 이동으로 인한 알루미늄의 단선은 방지할 수 있다.In general, aluminum having low resistance is widely used as a material for semiconductor metal wiring. As the degree of integration of devices increases, the width of the wiring becomes finer, and the movement of electrons, diffuse reflection, and stress caused by the increase of current density are caused by There arises a problem of lowering the reliability of the semiconductor device by causing a defect. In order to compensate for the above problem, a titanium nitride film or a titanium film (Ti) may be stacked on the aluminum wiring film to prevent disconnection of aluminum due to electron movement and stress movement.
종래의 티타늄 질화막을 금속층 상부에 적층한 콘택 홀 형성방법의 공정도가 제1도에 도시되어 있다.A process diagram of a conventional method for forming a contact hole in which a titanium nitride film is laminated on a metal layer is shown in FIG. 1.
도시된 바와 같이 실리콘 기판(1) 상에 소정 두께의 절연막(2)을 형성하고 하부금속 배선막(3) 및 난반사용 티타늄질화막(4)을 소정 패턴으로 형성한 다음에, 전체 구조의 상부에 제1절연용 산화막(5), SOG막(6) 및 제2 절연용 산화막(7)을 순차적으로 형성하고, 사진 식각법으로 콘택 홀(8)을 형성한다.As shown, an insulating film 2 having a predetermined thickness is formed on the silicon substrate 1, and a lower metal wiring film 3 and a diffused titanium nitride film 4 are formed in a predetermined pattern, and then the upper portion of the entire structure is formed. The first insulating oxide film 5, the SOG film 6, and the second insulating oxide film 7 are sequentially formed, and the contact holes 8 are formed by photolithography.
그러나 이와 같은 종래의 콘택 홀 형성방법은 사진 식각법으로 콘택 홀을 형성할 때, 난반사막인 티타늄질화막에 과도식각에 의한 언더 컷이 발생되어 상부금속 배선의 단락을 유발하며, 또한 SOG막이 노출되어 수분 흡착에 의한 금속배선의 부식 및 수소 이온이 침투하여 결과적으로 반도체 소자의 제조 수율 및 신뢰성이 저하되는 문제점이 있었다.However, in the conventional method of forming a contact hole, when the contact hole is formed by photolithography, an undercut is generated due to overetching on the titanium nitride film, which is a diffuse reflection film, causing a short circuit of the upper metal wiring, and the SOG film is exposed. Corrosion of the metal wiring by hydrogen adsorption and penetration of hydrogen ions resulted in a problem that the yield and reliability of the semiconductor device were degraded.
상기와 같은 문제점을 해결하기 위해 안출된 본 발명은, 티타늄질화막에 미리 패턴을 형성하여 언더 컷 발생을 억제하고 SOG막의 노출을 방지할 수 있는 콘택 홀 형성방법을 제공하는데 목적이 있다.The present invention devised to solve the above problems, an object of the present invention is to provide a method for forming a contact hole that can form a pattern on the titanium nitride film in advance to suppress the occurrence of under cut and to prevent the exposure of the SOG film.
상기와 같은 목적을 달성하기 위해 본 발명은, 소정 패턴의 하부 금속 배선 및 티타늄질화막을 형성한 후 제1 사진 식각 공정에 의하여 식각하는 단계, 전체 구조의 상부에 질화막, SOG막 및 절연용산화막을 적층한 후, 제 2 사진 식각공정에 의하여 식각하는 단계 및 산화막 스페이서를 형성하는 단계로 이루어진 것을 특징으로 한다.In order to achieve the above object, the present invention, after forming the lower metal wiring and the titanium nitride film of a predetermined pattern and etching by the first photolithography process, the nitride film, SOG film and insulating oxide film on the top of the entire structure After lamination, the etching process is performed by the second photolithography process and the oxide film spacers are formed.
이하, 본 발명의 바람직한 실시예를 첨부도면에 의거하여 상세히 설명한다.Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.
제2도의 (a) 내지 (d)는 본 발명에 따른 콘택 홀 형성방법의 공정도이다.(A) to (d) of FIG. 2 are process drawings of the contact hole forming method according to the present invention.
우선, (a)에 도시된 바와 같이 실리콘 기판(1) 상에 소정 두께의 절연막(2)을 형성하고 하부금속 배선(3) 및 난반사용 티타늄질화막(4)을 소정 패턴으로 형성한 다음, 소정의 사진 식각 공정에 의하여 제1 감광막 패턴(9)을 형성한다.First, as shown in (a), an insulating film 2 having a predetermined thickness is formed on the silicon substrate 1, and the lower metal wiring 3 and the diffused titanium nitride film 4 are formed in a predetermined pattern. The first photosensitive film pattern 9 is formed by a photolithography process.
그 다음, (b)에 도시된 바와 같이 노출된 상기 티타늄질화막(4)을 비등방성 식각으로 제거하고 제1 감광막 패턴(9)을 제거한 다음, 전체 구조의 상부에 질화막(10), SOG막(11) 및 절연용 산화막(12)을 소정 두께로 각각 적층한다. 이때, 상기 질화막(10)은 200-500Å 정도의 두께로 얇게 형성한다.Then, the titanium nitride film 4 exposed as shown in (b) is removed by anisotropic etching and the first photosensitive film pattern 9 is removed, and then the nitride film 10 and the SOG film ( 11) and the insulating oxide film 12 are laminated to predetermined thicknesses, respectively. At this time, the nitride film 10 is formed thin to a thickness of about 200-500Å.
그 다음, (c)에 도시된 바와같이 소정의 제2 감광막 패턴(13)을 형성하고, 상기 질화막(10)을 식각 정지층으로 하여 상기 절연용 산화막(12) 및 SOG막(11)을 종말점 식각하여 콘택 홀(8)을 형성한다. 이때, 상기 제2 감광막 패턴(13)의 콘택 홀을 형성하기 위한 임계 치수, 즉 패턴의 간격은 상기 제1 감광막 패턴(9)의 간격보다 작게 형성된다.Next, as shown in (c), a predetermined second photoresist pattern 13 is formed, and the insulating oxide film 12 and the SOG film 11 are terminated with the nitride film 10 as an etch stop layer. Etching is performed to form the contact hole 8. In this case, the critical dimension for forming the contact hole of the second photoresist layer pattern 13, that is, the interval between the patterns is smaller than the interval of the first photoresist layer pattern 9.
그 다음, (d)에 도시된 바와같이 상기 제 2감광막 패턴(13)을 제거하고 콘택 홀(8)의 측벽에 공지의 방법으로 산화막 스페이서(14)를 형성한 후, 상기 질화막(10)을 과도식각하여 하부금속 배선막(3)을 노출시킨다. 이때, 상기 산화막 스페이서(14)에 의해 SOG막(11)이 노출되지 않고, 또한 상기 질화막(10)에 의해 티타늄질화막(4)이 보호되어 언더 컷 현상이 발생되지 않는다.Then, as shown in (d), the second photoresist pattern 13 is removed and the oxide film spacer 14 is formed on the sidewall of the contact hole 8 by a known method, and then the nitride film 10 is removed. Excessive etching to expose the lower metal wiring film (3). At this time, the SOG film 11 is not exposed by the oxide film spacer 14, and the titanium nitride film 4 is protected by the nitride film 10 so that the undercut phenomenon does not occur.
이와 같이, 본 발명은 질화막과 산화막 스페이서를 형성하여 티타늄질화막 및 SOG막의 노출을 막음으로써 티타늄질화막의 언더 컷 현상의 발생이 억제되어 상부금속 배선이 단락되는 현상을 방지할 수 있으며, 또한 SOG막에 수분의 흡착이 억제되어 금속 배선막이 부식되는 현상을 방지할 수 있는 장점이 있다.As described above, the present invention prevents the undercut phenomenon of the titanium nitride film by suppressing the exposure of the titanium nitride film and the SOG film by forming the nitride film and the oxide spacer to prevent the short circuit of the upper metal wiring, and also prevents the short circuit of the SOG film. Since the adsorption of moisture is suppressed, there is an advantage that can prevent the phenomenon of corrosion of the metal wiring film.
Claims (4)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019940039101A KR0162140B1 (en) | 1994-12-30 | 1994-12-30 | Formation method of contact hole |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019940039101A KR0162140B1 (en) | 1994-12-30 | 1994-12-30 | Formation method of contact hole |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR960026213A KR960026213A (en) | 1996-07-22 |
| KR0162140B1 true KR0162140B1 (en) | 1999-02-01 |
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| Application Number | Title | Priority Date | Filing Date |
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| KR1019940039101A KR0162140B1 (en) | 1994-12-30 | 1994-12-30 | Formation method of contact hole |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100524905B1 (en) * | 1998-07-14 | 2005-12-21 | 삼성전자주식회사 | Method for forming anchored via contact |
-
1994
- 1994-12-30 KR KR1019940039101A patent/KR0162140B1/en not_active IP Right Cessation
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100524905B1 (en) * | 1998-07-14 | 2005-12-21 | 삼성전자주식회사 | Method for forming anchored via contact |
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| KR960026213A (en) | 1996-07-22 |
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