JPS6466950A - Integrated circuit device - Google Patents

Integrated circuit device

Info

Publication number
JPS6466950A
JPS6466950A JP22465387A JP22465387A JPS6466950A JP S6466950 A JPS6466950 A JP S6466950A JP 22465387 A JP22465387 A JP 22465387A JP 22465387 A JP22465387 A JP 22465387A JP S6466950 A JPS6466950 A JP S6466950A
Authority
JP
Japan
Prior art keywords
output buffer
input
blocks
semiconductor chip
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP22465387A
Other languages
Japanese (ja)
Other versions
JPH0760855B2 (en
Inventor
Soichi Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62224653A priority Critical patent/JPH0760855B2/en
Publication of JPS6466950A publication Critical patent/JPS6466950A/en
Publication of JPH0760855B2 publication Critical patent/JPH0760855B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/118Masterslice integrated circuits
    • H01L27/11898Input and output buffer/driver structures

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

PURPOSE:To scale down a semiconductor chip, and to improve the degree of integration by forming input/output buffer blocks having maximum driving capacity to an L shape in an integrated circuit device having a logic section block formed at a central section on the semiconductor chip and a plurality of input/output buffer blocks having the same function and different driving capacity on the chip of the outer circumference of the logical section block. CONSTITUTION:Input/output buffer blocks 6, 7 respectively have the same driving capacity as input/output buffer blocks 3b, but the blocks 6, 7 are formed to an L shape. Consequently, the depth of an input/output buffer block array shaped along one side of a semiconductor chip 1 can be reduced. Accordingly, a logic section block 2a on the inside can be made wider than conventional logic section blocks 2, thus diminishing a dead space, then improving the degree of integration. That is, a semiconductor chip can be scaled down to an integrated circuit device in the Same LSI scale.
JP62224653A 1987-09-07 1987-09-07 Integrated circuit device Expired - Lifetime JPH0760855B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62224653A JPH0760855B2 (en) 1987-09-07 1987-09-07 Integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62224653A JPH0760855B2 (en) 1987-09-07 1987-09-07 Integrated circuit device

Publications (2)

Publication Number Publication Date
JPS6466950A true JPS6466950A (en) 1989-03-13
JPH0760855B2 JPH0760855B2 (en) 1995-06-28

Family

ID=16817095

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62224653A Expired - Lifetime JPH0760855B2 (en) 1987-09-07 1987-09-07 Integrated circuit device

Country Status (1)

Country Link
JP (1) JPH0760855B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5437755A (en) * 1993-01-12 1995-08-01 Salomon S.A. Process for decorating the top portion of the ski
US5777354A (en) * 1994-09-16 1998-07-07 Lsi Logic Corporation Low profile variable width input/output cells
US5917207A (en) * 1993-07-01 1999-06-29 Lsi Logic Corporation Programmable polysilicon gate array base cell architecture
US5945696A (en) * 1998-02-16 1999-08-31 Faraday Technology Corp. Silicon chip having mixed input/output slot structure

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57139954A (en) * 1981-02-24 1982-08-30 Nec Corp Master-sliced large scale integrated circuit
JPS62154640A (en) * 1985-12-26 1987-07-09 Nec Corp Semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57139954A (en) * 1981-02-24 1982-08-30 Nec Corp Master-sliced large scale integrated circuit
JPS62154640A (en) * 1985-12-26 1987-07-09 Nec Corp Semiconductor device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5437755A (en) * 1993-01-12 1995-08-01 Salomon S.A. Process for decorating the top portion of the ski
US5917207A (en) * 1993-07-01 1999-06-29 Lsi Logic Corporation Programmable polysilicon gate array base cell architecture
US5777354A (en) * 1994-09-16 1998-07-07 Lsi Logic Corporation Low profile variable width input/output cells
US5945696A (en) * 1998-02-16 1999-08-31 Faraday Technology Corp. Silicon chip having mixed input/output slot structure

Also Published As

Publication number Publication date
JPH0760855B2 (en) 1995-06-28

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