JPS5650630A - Semiconductor integrated circuit - Google Patents

Semiconductor integrated circuit

Info

Publication number
JPS5650630A
JPS5650630A JP12754479A JP12754479A JPS5650630A JP S5650630 A JPS5650630 A JP S5650630A JP 12754479 A JP12754479 A JP 12754479A JP 12754479 A JP12754479 A JP 12754479A JP S5650630 A JPS5650630 A JP S5650630A
Authority
JP
Japan
Prior art keywords
transistors
integrated circuit
threshold voltage
logic
voltage levels
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12754479A
Other languages
Japanese (ja)
Inventor
Osamu Tomizawa
Kenji Anami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP12754479A priority Critical patent/JPS5650630A/en
Publication of JPS5650630A publication Critical patent/JPS5650630A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17736—Structural details of routing resources
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/1778—Structural details for adapting physical parameters

Landscapes

  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To facilitate distribution/wiring and also increase the degree of integration for the semiconductor integrated circuit, by securing two or more word lines and bit lines, forming the MOS-type transistor at the crossing position of these lines and then selecting one of the two threshold levels by the transistor. CONSTITUTION:The MOS-type transistors TR11-14, 21-24, 31-34 and 41-44 are provided at the crossing positions between the bit lines 5-8 and word lines 10, 20, 30 and 40 each. And one of the high and low threshold voltage levels is selected. In this instant, the transistors having the high threshold voltage levels have no conductive under working among the array of transistors. Accordingly, the combination of the transistors having the low threshold voltage levels is designated among the 4X4 transistor groups, thus forming a certain combination logic between the output terminals 49-52 and the input terminlas 45-48. And the logic function block comprising the combination logic can be formed with the standard cell. As a result, a logic integrated circuit can be obtained by performing the wiring among the cells and in a matrix formation.
JP12754479A 1979-10-01 1979-10-01 Semiconductor integrated circuit Pending JPS5650630A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12754479A JPS5650630A (en) 1979-10-01 1979-10-01 Semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12754479A JPS5650630A (en) 1979-10-01 1979-10-01 Semiconductor integrated circuit

Publications (1)

Publication Number Publication Date
JPS5650630A true JPS5650630A (en) 1981-05-07

Family

ID=14962625

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12754479A Pending JPS5650630A (en) 1979-10-01 1979-10-01 Semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPS5650630A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58166823A (en) * 1982-03-06 1983-10-03 エヌ・ベ−・フイリツプス・フル−イランペンフアブリケン Method and circuit for producing digital filter circuit
JPS59119925A (en) * 1982-12-27 1984-07-11 Toshiba Corp Logical circuit
JPS6021618A (en) * 1983-07-01 1985-02-04 モトロ−ラ・インコ−ポレ−テツド Microcell array with on-chip clock generator
JPH02223221A (en) * 1990-01-29 1990-09-05 Hitachi Ltd Semiconductor integrated circuit device
US5512847A (en) * 1983-01-31 1996-04-30 Hitachi, Ltd. BiCMOS tri-state output driver

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5341951A (en) * 1976-09-27 1978-04-15 Mostek Corp Logic matrix device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5341951A (en) * 1976-09-27 1978-04-15 Mostek Corp Logic matrix device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58166823A (en) * 1982-03-06 1983-10-03 エヌ・ベ−・フイリツプス・フル−イランペンフアブリケン Method and circuit for producing digital filter circuit
JPS59119925A (en) * 1982-12-27 1984-07-11 Toshiba Corp Logical circuit
US5512847A (en) * 1983-01-31 1996-04-30 Hitachi, Ltd. BiCMOS tri-state output driver
JPS6021618A (en) * 1983-07-01 1985-02-04 モトロ−ラ・インコ−ポレ−テツド Microcell array with on-chip clock generator
JPH0349214B2 (en) * 1983-07-01 1991-07-26 Motorola Inc
JPH02223221A (en) * 1990-01-29 1990-09-05 Hitachi Ltd Semiconductor integrated circuit device

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