JPS6461923A - Surface mounting for semiconductor element - Google Patents

Surface mounting for semiconductor element

Info

Publication number
JPS6461923A
JPS6461923A JP62219683A JP21968387A JPS6461923A JP S6461923 A JPS6461923 A JP S6461923A JP 62219683 A JP62219683 A JP 62219683A JP 21968387 A JP21968387 A JP 21968387A JP S6461923 A JPS6461923 A JP S6461923A
Authority
JP
Japan
Prior art keywords
circuit pattern
bare chip
semiconductor bare
ceramic substrate
bump
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62219683A
Other languages
Japanese (ja)
Inventor
Masusane Yoshitake
Yasuharu Kanehara
Kazuaki Endo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
FDK Corp
Original Assignee
FDK Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by FDK Corp filed Critical FDK Corp
Priority to JP62219683A priority Critical patent/JPS6461923A/en
Publication of JPS6461923A publication Critical patent/JPS6461923A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13144—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007—Surface contacts, e.g. bumps

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To allow direct connection of a semiconductor bare chip to a circuit pattern by forming a connecting bump at a predetermined position on the circuit pattern formed on a ceramic substrate, and connecting the semiconductor bare chip directly without any further processing so that the electrode thereof is mounted in a position facing the connecting bump. CONSTITUTION:A circuit pattern 12 is formed on a ceramic substrate 10 consisting of alumina, etc. Then after mounting a conductive material 14 which is formed to be spherical on a predetermined position in the circuit pattern 12, the ceramic substrate 10 is heated in a heating furnace. In this way, the circuit pattern 12 is baked and an Au bump 16 is formed. Then a semiconductor bare chip 18 is made to come into contact without any further processing by positioning it so that the Al electrode 20 thereof faces the Au bump 16. Then the ceramic substrate 10 and the semiconductor bare chip 18 are connected by heating and applying supersonic vibrations thereto, and then by applying pressure to the Au bump, the semiconductor bare chip 18 is mounted on the side of the circuit pattern 12 of the ceramic substrate 10. According to the constitution, the semiconductor bare chip can be connected directly on the circuit pattern easily with simple equipment.
JP62219683A 1987-09-02 1987-09-02 Surface mounting for semiconductor element Pending JPS6461923A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62219683A JPS6461923A (en) 1987-09-02 1987-09-02 Surface mounting for semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62219683A JPS6461923A (en) 1987-09-02 1987-09-02 Surface mounting for semiconductor element

Publications (1)

Publication Number Publication Date
JPS6461923A true JPS6461923A (en) 1989-03-08

Family

ID=16739335

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62219683A Pending JPS6461923A (en) 1987-09-02 1987-09-02 Surface mounting for semiconductor element

Country Status (1)

Country Link
JP (1) JPS6461923A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5270260A (en) * 1990-08-23 1993-12-14 Siemens Aktiengesellschaft Method and apparatus for connecting a semiconductor chip to a carrier system
US6991703B2 (en) 2002-09-26 2006-01-31 Sumitomo Osaka Cement Co., Ltd. Bonding method, bonding stage and electronic component packaging apparatus
KR100575363B1 (en) * 2004-04-13 2006-05-03 재단법인서울대학교산학협력재단 Method of packaging of mems device at the vacuum state and vacuum packaged mems device using the same
JP2007047850A (en) * 2005-08-05 2007-02-22 Dainippon Printing Co Ltd Ic card, manufacturing method of ic card, and manufacturing device of ic card

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5270260A (en) * 1990-08-23 1993-12-14 Siemens Aktiengesellschaft Method and apparatus for connecting a semiconductor chip to a carrier system
US6991703B2 (en) 2002-09-26 2006-01-31 Sumitomo Osaka Cement Co., Ltd. Bonding method, bonding stage and electronic component packaging apparatus
KR100575363B1 (en) * 2004-04-13 2006-05-03 재단법인서울대학교산학협력재단 Method of packaging of mems device at the vacuum state and vacuum packaged mems device using the same
JP2007047850A (en) * 2005-08-05 2007-02-22 Dainippon Printing Co Ltd Ic card, manufacturing method of ic card, and manufacturing device of ic card

Similar Documents

Publication Publication Date Title
GB1492015A (en) Integrated circuit devices
JPS6461923A (en) Surface mounting for semiconductor element
JPH02146757A (en) Semiconductor device
JPH02133936A (en) Semiconductor device
JPH02155257A (en) Mounting device for semiconductor
JPS57130437A (en) Sealing method of ic
EP0081419A3 (en) High lead count hermetic mass bond integrated circuit carrier
JPS56111234A (en) Semiconductor integrated circuit device and manufacture thereof
JPS57121255A (en) Electric circuit element with metallic bump and mounting method of the seme
TW354412B (en) A method of forming a bump, and a semiconductor device
JPS53110371A (en) Ceramic package type semiconductor device
JPS6468935A (en) Face-down bonding of semiconductor integrated circuit device
JPS59224147A (en) Semiconductor device
JPS647541A (en) Manufacture of semiconductor device
JPS6484654A (en) Semiconductor device
JPS54152470A (en) Semiconductor device
JPS6442140A (en) Connection of integrated circuit
JPS6225433A (en) Semiconductor element characteristic measuring device
JPS57121239A (en) Semiconductor device
JPS5855673Y2 (en) Electronic component mounting equipment
JPS57115851A (en) Semiconductor device
JPS6469021A (en) Jig for removing gold wire of semiconductor circuit device
JPS5681944A (en) Semiconductor device
GB1102292A (en) Improvements in and relating to methods of manufacturing semi-conductor devices
JPH01286429A (en) Mounting method for semiconductor chip