JPS57121239A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS57121239A
JPS57121239A JP755381A JP755381A JPS57121239A JP S57121239 A JPS57121239 A JP S57121239A JP 755381 A JP755381 A JP 755381A JP 755381 A JP755381 A JP 755381A JP S57121239 A JPS57121239 A JP S57121239A
Authority
JP
Japan
Prior art keywords
face
metal
insulating resin
metal substrate
intensity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP755381A
Other languages
Japanese (ja)
Inventor
Toshihisa Inoue
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP755381A priority Critical patent/JPS57121239A/en
Publication of JPS57121239A publication Critical patent/JPS57121239A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433Auxiliary members in containers characterised by their shape, e.g. pistons
    • H01L23/4334Auxiliary members in encapsulations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)

Abstract

PURPOSE:To improve intensity and heat radiating characteristic of a semiconductor device by a method wherein an insulating layer formed with a metal oxide impregnated with insulating resin is provided on the face of a metal substrate opposite from the face to put a semiconductor chip thereon. CONSTITUTION:A metal thin layer 22 of Ni, Au, etc., is provided on the face on one side of the metal substrate 20, the semiconductor chip 24 of power transistor, etc., is put thereon interposing a solder layer 23 between them, another side electrode and an outside lead out wire 25 are connected with a fine metal wire 26, the insulating layer 21 consisting of the metal oxide of alumina ceramic powder, etc., impregnated with insulating resin is provided on the face on the other side of the metal substrate 20, and the whole is sealed with insulating resin 27. Accordingly dielectric intensity and heat radiating characteristic are enhanced and mechanical intensity is also enhanced.
JP755381A 1981-01-21 1981-01-21 Semiconductor device Pending JPS57121239A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP755381A JPS57121239A (en) 1981-01-21 1981-01-21 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP755381A JPS57121239A (en) 1981-01-21 1981-01-21 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS57121239A true JPS57121239A (en) 1982-07-28

Family

ID=11668982

Family Applications (1)

Application Number Title Priority Date Filing Date
JP755381A Pending JPS57121239A (en) 1981-01-21 1981-01-21 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS57121239A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0662244A4 (en) * 1992-09-17 1995-09-13 Olin Corp Plastic semiconductor package with aluminum heat spreader.
CN1297046C (en) * 2003-05-20 2007-01-24 夏普株式会社 Semiconductor light emitting device and its manufacturing method

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5483767A (en) * 1977-12-16 1979-07-04 Nec Corp Semiconductor device
JPS54160311A (en) * 1978-06-07 1979-12-19 Nippon Zeon Co Ltd Preparation of 3-hexyn-1-ol
JPS5568661A (en) * 1978-11-17 1980-05-23 Hitachi Ltd Structure for mounting power transistor
JPS564266B2 (en) * 1978-05-18 1981-01-29

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5483767A (en) * 1977-12-16 1979-07-04 Nec Corp Semiconductor device
JPS564266B2 (en) * 1978-05-18 1981-01-29
JPS54160311A (en) * 1978-06-07 1979-12-19 Nippon Zeon Co Ltd Preparation of 3-hexyn-1-ol
JPS5568661A (en) * 1978-11-17 1980-05-23 Hitachi Ltd Structure for mounting power transistor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0662244A4 (en) * 1992-09-17 1995-09-13 Olin Corp Plastic semiconductor package with aluminum heat spreader.
CN1297046C (en) * 2003-05-20 2007-01-24 夏普株式会社 Semiconductor light emitting device and its manufacturing method

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