JPS6447973A - Device tester - Google Patents

Abstract

PURPOSE:To enable the testing of various test items in a short time, by measuring voltage and current at a pin of a DUT (device under test) applying a test pattern to the DUT. CONSTITUTION:From a test processor 3, a data is sent to 'D', 'H' and 'L' level memories 10-12 beforehand, switching information or the like of DC and AC tests to addresses of a pattern memory 13 and further, a test pattern generation timing or the like to a timing generator 15. Then, a multiplexer MUX16 is controlled by a pit address switching signal SP of a memory 13 and a digital signal indicating 'H' and 'L' selected with the MUX16 is converted 18 into an analog signal. Various pieces of information of the memory 13 are read out by an output timing signal ST of the generator 15. A voltage/ current generator 20 applies a voltage signal pulse feedback with a buffer 23 to a terminal Pj of a DUT1. A terminal voltage V0 at the terminal Pj is taken into a sample holding circuit 26 through the buffer 23 and converted 19 into a digital signal to be stored 14.