JPS6444030A - Semiconductor package - Google Patents

Semiconductor package

Info

Publication number
JPS6444030A
JPS6444030A JP19973387A JP19973387A JPS6444030A JP S6444030 A JPS6444030 A JP S6444030A JP 19973387 A JP19973387 A JP 19973387A JP 19973387 A JP19973387 A JP 19973387A JP S6444030 A JPS6444030 A JP S6444030A
Authority
JP
Japan
Prior art keywords
substrate
recess
circuit
chip
mounting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19973387A
Other languages
Japanese (ja)
Inventor
Hiroshi Kikuchi
Hitoshi Oka
Yoshiaki Wakashima
Keizo Matsukawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP19973387A priority Critical patent/JPS6444030A/en
Publication of JPS6444030A publication Critical patent/JPS6444030A/en
Pending legal-status Critical Current

Links

Landscapes

  • Wire Bonding (AREA)

Abstract

PURPOSE:To easily and inexpensively obtain a semiconductor package having an excellent mechanical strength and a thin mounting thickness by mounting a semiconductor chip in a recess formed with a printed substrate formed in advance with a circuit. CONSTITUTION:A circuit forming copper foil is formed on a flexible printed substrate 1, the foil is etched in a predetermined pattern to form a circuit 3 containing a circuit terminal for mounting a semiconductor chip, and a recess 2 is then formed by a hot press at a predetermined part of the substrate 1. Then, a semiconductor chip 4 having 0.4mm of thickness printed in advance with solder paste by screen printing is engaged within the recess 2, and heated while press-bonding to connect the wirings of the chip 4 to the circuit terminal. Thereafter, flux is cleaned, epoxy potting resin 6 is filled in the recess 2 of the substrate 1 on which the chip 4 is mounted, thermally cured, the substrate 1 is eventually cut in a desired profile to obtain a semiconductor package 100.
JP19973387A 1987-08-12 1987-08-12 Semiconductor package Pending JPS6444030A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19973387A JPS6444030A (en) 1987-08-12 1987-08-12 Semiconductor package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19973387A JPS6444030A (en) 1987-08-12 1987-08-12 Semiconductor package

Publications (1)

Publication Number Publication Date
JPS6444030A true JPS6444030A (en) 1989-02-16

Family

ID=16412718

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19973387A Pending JPS6444030A (en) 1987-08-12 1987-08-12 Semiconductor package

Country Status (1)

Country Link
JP (1) JPS6444030A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02152247A (en) * 1988-12-02 1990-06-12 Nec Corp Resin-sealed type semiconductor device
US8183873B2 (en) 2008-10-22 2012-05-22 Fujitsu Limited Contact sensor unit, electronic device, and method for producing a contact sensor unit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02152247A (en) * 1988-12-02 1990-06-12 Nec Corp Resin-sealed type semiconductor device
US8183873B2 (en) 2008-10-22 2012-05-22 Fujitsu Limited Contact sensor unit, electronic device, and method for producing a contact sensor unit

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