JPS6438794A - Piezo-electric buzzer driving circuit - Google Patents

Piezo-electric buzzer driving circuit

Info

Publication number
JPS6438794A
JPS6438794A JP62195507A JP19550787A JPS6438794A JP S6438794 A JPS6438794 A JP S6438794A JP 62195507 A JP62195507 A JP 62195507A JP 19550787 A JP19550787 A JP 19550787A JP S6438794 A JPS6438794 A JP S6438794A
Authority
JP
Japan
Prior art keywords
level
piezoelectric buzzer
inputs
gate
outputs
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62195507A
Other languages
Japanese (ja)
Inventor
Tadao Kadowaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP62195507A priority Critical patent/JPS6438794A/en
Publication of JPS6438794A publication Critical patent/JPS6438794A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To prevent the lowering of the life of a battery by outputting a continuous pulse voltage at the time of driving a piezoelectric buzzer, changing the state to a floating state at the time of stopping the piezoelectric buzzer and depressing power decrease due to a leakage current in the piezoelectric buzzer or about the packaging part of the piezoelectric buzzer. CONSTITUTION: At the time of stopping the piezoelectric buzzer, a signal 101 becomes a low level and a signal 103 becomes a high level by means of an inverter 15. Thus, since a gate 6 inputs the low-level signal 101, it outputs a high level, a gate 7 inputs the high-level signal 103, it outputs a low level, a P-channel field effect transistor 10 and a N-channel field effect transistor 11 are turned off together and a terminal 4 becomes a floating state. Similarly, a gate 8 inputs the low-level signal 101 and outputs a high level, a gate 9 inputs the high-level signal 103 and outputs a low level, a P-channel field effect transistor 12 and a N-channel field effect transistor 13 are turned off together and a terminal 5 becomes a floating state. Consequently, the leakage current and the lowering of the life are prevented.
JP62195507A 1987-08-05 1987-08-05 Piezo-electric buzzer driving circuit Pending JPS6438794A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62195507A JPS6438794A (en) 1987-08-05 1987-08-05 Piezo-electric buzzer driving circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62195507A JPS6438794A (en) 1987-08-05 1987-08-05 Piezo-electric buzzer driving circuit

Publications (1)

Publication Number Publication Date
JPS6438794A true JPS6438794A (en) 1989-02-09

Family

ID=16342232

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62195507A Pending JPS6438794A (en) 1987-08-05 1987-08-05 Piezo-electric buzzer driving circuit

Country Status (1)

Country Link
JP (1) JPS6438794A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2016157487A1 (en) * 2015-04-01 2017-06-15 三菱電機株式会社 Buzzer sounding device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2016157487A1 (en) * 2015-04-01 2017-06-15 三菱電機株式会社 Buzzer sounding device

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