JPS6421963A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS6421963A JPS6421963A JP17934487A JP17934487A JPS6421963A JP S6421963 A JPS6421963 A JP S6421963A JP 17934487 A JP17934487 A JP 17934487A JP 17934487 A JP17934487 A JP 17934487A JP S6421963 A JPS6421963 A JP S6421963A
- Authority
- JP
- Japan
- Prior art keywords
- region
- semiconductor layer
- emitter
- layer
- conductivity type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Bipolar Transistors (AREA)
Abstract
PURPOSE:To make the contraction of emitter size and the reduction of the homojunction capacity between emitter and base feasible for making a semiconductor device advantageous to be integration-circuited by a method wherein a part of undoped semiconductor layer and an emitter layer are held between the first implanted region and the second implanted region whereon electrodes and an emitter region are respectively formed. CONSTITUTION:A semiconductor layer 4 in the first conductivity type collector region, another semiconductor layer 3 in the second conductivity type base region formed on the layer 4, the other semiconductor layer 2 in the first conductivity type emitter region formed on the layer 3 and the other undoped semiconductor layer 1 formed on the layer 2 are provided. Furthermore, the second conductivity type the first implanted region 9 formed from said undoped semiconductor layer 1 to the semiconductor layer 3 in the base region holding a partial region, base electrodes 7 formed on the first implanted region 9 the first conductivity type the second implanted region 10 isolated from the region to be formed from the undoped semiconductor layer 1 held by the first implanted region 9 to the part reaching the semiconductor layer 3 in the base region and an emitter electrode 6 formed on the second implanted region 10 are provided.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17934487A JPH07120665B2 (en) | 1987-07-16 | 1987-07-16 | Semiconductor device |
US07/217,292 US4967254A (en) | 1987-07-16 | 1988-07-11 | Semiconductor device |
US07/573,698 US5063167A (en) | 1987-07-16 | 1990-08-28 | Method of producing a bipolar transistor with spacers |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17934487A JPH07120665B2 (en) | 1987-07-16 | 1987-07-16 | Semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6421963A true JPS6421963A (en) | 1989-01-25 |
JPH07120665B2 JPH07120665B2 (en) | 1995-12-20 |
Family
ID=16064199
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17934487A Expired - Lifetime JPH07120665B2 (en) | 1987-07-16 | 1987-07-16 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH07120665B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3019596U (en) * | 1995-06-16 | 1995-12-19 | 木口 謙 | Snap to attach without using thread |
-
1987
- 1987-07-16 JP JP17934487A patent/JPH07120665B2/en not_active Expired - Lifetime
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3019596U (en) * | 1995-06-16 | 1995-12-19 | 木口 謙 | Snap to attach without using thread |
Also Published As
Publication number | Publication date |
---|---|
JPH07120665B2 (en) | 1995-12-20 |
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