JPS641073B2 - - Google Patents
Info
- Publication number
- JPS641073B2 JPS641073B2 JP1345182A JP1345182A JPS641073B2 JP S641073 B2 JPS641073 B2 JP S641073B2 JP 1345182 A JP1345182 A JP 1345182A JP 1345182 A JP1345182 A JP 1345182A JP S641073 B2 JPS641073 B2 JP S641073B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- mesa stripe
- buried
- current blocking
- inp
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 claims description 23
- 230000000903 blocking effect Effects 0.000 claims description 15
- 238000005253 cladding Methods 0.000 claims description 11
- 239000000758 substrate Substances 0.000 claims description 4
- 230000015572 biosynthetic process Effects 0.000 claims 1
- 238000005530 etching Methods 0.000 description 9
- 238000000034 method Methods 0.000 description 4
- 235000012431 wafers Nutrition 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000010355 oscillation Effects 0.000 description 3
- 239000000463 material Substances 0.000 description 2
- 230000006798 recombination Effects 0.000 description 2
- 238000005215 recombination Methods 0.000 description 2
- 101100269850 Caenorhabditis elegans mask-1 gene Proteins 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000013307 optical fiber Substances 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/30—Structure or shape of the active region; Materials used for the active region
- H01S5/32—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
- H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
- H01S5/227—Buried mesa structure ; Striped active layer
- H01S5/2275—Buried mesa structure ; Striped active layer mesa created by etching
- H01S5/2277—Buried mesa structure ; Striped active layer mesa created by etching double channel planar buried heterostructure [DCPBH] laser
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Optics & Photonics (AREA)
- Semiconductor Lasers (AREA)
Description
【発明の詳細な説明】
本発明は活性層の周囲をよりエネルギーギヤツ
プが大きく、かつ屈折率の小さな半導体層でおお
つた埋め込みヘテロ構造半導体レーザに関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a buried heterostructure semiconductor laser in which an active layer is surrounded by a semiconductor layer having a larger energy gap and a smaller refractive index.
埋め込みヘテロ構造半導体レーザ（BH−LD）
は低い発振しきい値電流、安定化された発振横モ
ード、高温動作可能などの優れた特性を有してい
るため、光フアイバ通信用光源として注目を集め
ている。本願の発明者らは特願昭56−166666号明
細書に示した様に、２本のほぼ平行な溝にはさま
れて形成された発光再結合する活性層を含むメサ
ストライプ以外で確実に電流ブロツク層が形成で
き、したがつて温度特性に優れ、種々の基板処理
過程でのダメージを受けることが少なく製造歩留
りの向上したInGaAsP BH−LDを発明した。し
かしながらこの構造のBH−LDにおいてはメサ
ストライプをはさんでいる溝の両わきの部分でｎ
−InP電流ブロツク層がなめらかに成長せずに、
途切れてしまい、特性のバラツキを招いていた。
またこれを防ぐためにｐ−InP電流ブロツク層、
ｎ−InP電流ブロツク層を共に厚く成長させよう
とすると、その場合にはｎ−InP電流ブロツク層
が発光再結合する活性層を含むメサストライプの
上部をおおつてしまうという欠点があつた。 Buried heterostructure semiconductor laser (BH-LD)
Because it has excellent properties such as a low oscillation threshold current, a stabilized oscillation transverse mode, and the ability to operate at high temperatures, it is attracting attention as a light source for optical fiber communications. As shown in Japanese Patent Application No. 56-166666, the inventors of the present application have reliably developed a method other than a mesa stripe that includes an active layer that recombines light and is sandwiched between two substantially parallel grooves. We have invented an InGaAsP BH-LD that can form a current blocking layer, has excellent temperature characteristics, is less susceptible to damage during various substrate processing processes, and has an improved manufacturing yield. However, in the BH-LD with this structure, n
−The InP current blocking layer does not grow smoothly;
This caused variations in characteristics.
In addition, to prevent this, a p-InP current blocking layer,
Attempts to grow thick n-InP current blocking layers together have the disadvantage that the n-InP current blocking layer covers the top of the mesa stripe containing the active layer for radiative recombination.
本発明の目的は上記の欠点を除去すべく、特性
のバラツキが少なく、製造歩留りの高いBH−
LDを提供することにある。 The purpose of the present invention is to eliminate the above-mentioned drawbacks, and to provide a BH-
The goal is to provide LD.
本発明による埋め込みヘテロ構造半導体レーザ
の構成は、第１導電型半導体基板上に少なくとも
活性層を含む半導体多層膜を積層させた層膜構造
半導体ウエフアに、前記活性層よりも深い２本の
平行な溝によつてはさまれたメサストライプを形
成した後埋め込み成長してなる埋め込みヘテロ構
造半導体レーザにおいて、メサストライプ中の第
２導電型半導体クラツド層が他の部分の第２導電
型半導体クラツド層よりも厚く形成されてなるこ
とを特徴としている。 The structure of the buried heterostructure semiconductor laser according to the present invention is such that a semiconductor wafer having a layer structure in which a semiconductor multilayer film including at least an active layer is laminated on a first conductivity type semiconductor substrate has two parallel layers deeper than the active layer. In a buried heterostructure semiconductor laser formed by forming a mesa stripe sandwiched between grooves and then growing it in a buried manner, the second conductivity type semiconductor cladding layer in the mesa stripe is higher than the second conductivity type semiconductor cladding layer in other parts. It is also characterized by being thickly formed.
以下実施例を示す図面を参照しつつ本発明の説
明をする。 The present invention will be described below with reference to drawings showing embodiments.
第１図ａ〜ｃは本発明によるBH−LDの製造
過程を示すための図である。まず第１図ａに示す
様に（100）ｎ−InP基板１０１上にｎ−InPバツ
フア層１０２、発光波長1.3μｍ組成のノンドープ
In0.72Ga0.28As0.61P0.39活性層１０３、第２導電型
半導体クラツド層であるｐ−InPクラツド層１０
４を順次積層させた多層膜構造半導体ウエフアに
＜011＞方向に平行に通常のフオトレジストを用
い、幅10μｍのエツチングマスク１０５を形成す
る。ｐ−InPクラツド層１０４ははじめ１〜2μｍ
程度の厚さ積層させておき、エツチングマスク１
０５以外の部分を0.5μｍ程度エツチングする。次
に第２図ｂに示す様にエツチングマスク１０５を
形成した部分にメサストライプ１０８が残るよう
に、フオトリソグラフイの技術により２本の平行
なエツチング溝１０６，１０７を形成する。この
際メサストライプ１０８の幅は２〜3μｍ、エツ
チング溝の幅は６〜7μｍとすればよく、この段
階でメサストライプ部分のｐ−InPクラツド層は
他の部分に残されたｐ−InP層よりもはじめにエ
ツチングした分だけ、すなわち0.5μｍ程度厚くな
つている。このように２段階にエツチングした多
層膜構造半導体ウエフアを第３図ｃに示すように
埋め込み成長、電極形成を行なう。埋め込み成長
においてはｐ−InP電流ブロツク層１０９、およ
びｎ−InP電流ブロツク層１１０をいずれもメサ
ストライプ１０８の上面に積層しないように成長
させ、さらにｐ−InP埋め込み層１１１、波長
1.3μｍ組成のｐ−In0.72Ga0.28As0.61P0.39電極層１
１２を全面にわたつて積層させる。最後にｐ形オ
ーミツク性電極１１３、ｎ形オーミツク性電極１
１４を形成し、所望のIn1-xGaxAs1-yPyBH−LD
を得る。 FIGS. 1a to 1c are diagrams showing the manufacturing process of a BH-LD according to the present invention. First, as shown in FIG.
In 0.72 Ga 0.28 As 0.61 P 0.39 active layer 103, p-InP clad layer 10 which is a second conductivity type semiconductor clad layer
An etching mask 105 having a width of 10 .mu.m is formed on a semiconductor wafer having a multilayer film structure in which etching layers 4 and 4 are sequentially laminated using an ordinary photoresist in parallel to the <011> direction. The p-InP cladding layer 104 is initially 1 to 2 μm thick.
Laminate the layers to a certain thickness and apply etching mask 1.
Etch the parts other than 0.5 μm by about 0.5 μm. Next, as shown in FIG. 2B, two parallel etching grooves 106 and 107 are formed by photolithography so that a mesa stripe 108 remains in the area where the etching mask 105 was formed. At this time, the width of the mesa stripe 108 should be 2 to 3 μm, and the width of the etching groove should be 6 to 7 μm. The thickness is also increased by the amount of the initial etching, that is, about 0.5 μm. The multilayer structure semiconductor wafer thus etched in two steps is buried and grown to form electrodes as shown in FIG. 3c. In the buried growth, neither the p-InP current blocking layer 109 nor the n-InP current blocking layer 110 are grown on the upper surface of the mesa stripe 108, and the p-InP buried layer 111 and the wavelength
p-In 0.72 Ga 0.28 As 0.61 P 0.39 electrode layer 1 with a composition of 1.3 μm
12 is laminated over the entire surface. Finally, p-type ohmic electrode 113, n-type ohmic electrode 1
14 and the desired In 1-x Ga x As 1-y P y BH−LD
get.
このBH−LDにおいてはメサストライプ１０
８が他の部分よりも高く形成されているために、
電流ブロツク層は溝の端の部分でもなめらかに成
長させることができ、特にｎ−InP電流ブロツク
層１１０を厚めに成長させてもメサストライプ１
０８の上面をおおつてしまうことが少ない。すな
わち電流ブロツク層形成の際のトレランスが向上
し、したがつて埋め込み成長の再現性が大幅に改
善された。このようにして製作したBH−LDに
おいて発振しきい値電流10〜20ｍＡ、微分量子効
率50〜60％程度の素子が再現性よく得られ、ウエ
フア内、ウエフア間のバラツキも小さかつた。 In this BH-LD, mesa stripe 10
Because 8 is formed higher than other parts,
The current blocking layer can be grown smoothly even at the edge of the trench, and in particular, even if the n-InP current blocking layer 110 is grown thick, the mesa stripe 1
It rarely covers the top surface of 08. That is, the tolerance in forming the current blocking layer has been improved, and the reproducibility of buried growth has therefore been greatly improved. In the BH-LD manufactured in this manner, a device with an oscillation threshold current of 10 to 20 mA and a differential quantum efficiency of about 50 to 60% was obtained with good reproducibility, and variations within and between wafers were small.
なお図に示した本発明の実施例においては、は
じめに10μｍ程度の幅を残してｐ−InPクラツド
層を0.5μｍ程度エツチングし、そののちエツチン
グしなかつた部分にメサストライプが形成される
ように２本の溝をエツチングしたが、この逆の過
程をとつてもよい。すなわち、はじめに２本の平
行な溝とそれらにはさまれたメサストライプを形
成し、その後メサストライプ部分周辺を保護して
他の部分のｐ−InPクラツド層を薄くエツチング
してもさしつかえない。上記以外の方法をとつて
もメサストライプのｐ−InPクラツド層が他の部
分のｐ−InP層よりも厚く形成されていればよ
い。また実施例では波長1μｍ帯の素子である
In1-xGaxAsyP1-y−InP系の材料を用いて説明し
たが用いる半導体材料はこれらに限るものではな
い。 In the embodiment of the present invention shown in the figure, the p-InP cladding layer is first etched by about 0.5 μm, leaving a width of about 10 μm, and then etched twice so that a mesa stripe is formed in the unetched area. Although I etched the grooves in the book, you can also do the opposite process. That is, it is possible to first form two parallel grooves and a mesa stripe sandwiched between them, and then protect the periphery of the mesa stripe portion and thinly etch the p-InP cladding layer in other portions. Even if a method other than the above is used, it is sufficient that the p-InP cladding layer in the mesa stripe is formed thicker than the p-InP layer in other parts. In addition, in the example, it is an element with a wavelength band of 1 μm.
Although the description has been made using In 1-x Ga x As y P 1-y −InP-based materials, the semiconductor materials used are not limited to these.
本発明の特徴は発光再結合する活性層を含むメ
サストライプの第２導電型半導体クラツド層が他
の部分の第２導電型半導体クラツド層よりも厚く
形成されていることである。これによつて電流ブ
ロツク層の結晶成長に関するトレランスが向上
し、したがつて埋め込み成長の再現性、特性上の
歩留りが大幅に改善された。 A feature of the present invention is that the mesa stripe of the second conductivity type semiconductor cladding layer including the active layer that undergoes luminescent recombination is formed thicker than the second conductivity type semiconductor cladding layer of other parts. This improved the tolerance regarding the crystal growth of the current blocking layer, and therefore greatly improved the reproducibility of buried growth and the yield in terms of characteristics.
第１図ａ〜ｃは実施例の製造過程を示すための
断面図である。
図中１０１……ｎ−InP基板、１０２……ｎ−
InPバツフア層、１０３……ノンドープIn0.72
Ga0.28As0.61P0.39活性層、１０４……ｐ−InPクラ
ツド層、１０５……エツチングマスク、１０６，
１０７……エツチング溝、１０８……メサストラ
イプ、１０９……ｐ−InP電流ブロツク層、１１
０……ｎ−InP電流ブロツク層、１１１……ｐ−
InP埋め込み層、１１２……ｐ−In0.72Ga0.28
As0.61P0.39電極層、１１３……ｐ形オーミツク性
電極、１１４……ｎ形オーミツク性電極である。
FIGS. 1a to 1c are cross-sectional views showing the manufacturing process of the embodiment. In the figure, 101... n-InP substrate, 102... n-
InP buffer layer, 103...non-doped In 0.72
Ga 0.28 As 0.61 P 0.39 active layer, 104...p-InP cladding layer, 105... etching mask, 106,
107...Etching groove, 108...Mesa stripe, 109...p-InP current blocking layer, 11
0...n-InP current blocking layer, 111...p-
InP buried layer, 112...p-In 0.72 Ga 0.28
As 0.61 P 0.39 electrode layer, 113... p-type ohmic electrode, 114... n-type ohmic electrode.
Claims (1)
を含む半導体多層膜を積層させた多層膜構造半導
体ウエフアに、前記活性層よりも深い２本の平行
な溝によつてはさまれたメサストライプを形成し
た後埋め込み成長してなる埋め込みヘテロ構造半
導体レーザにおいて、前記メサストライプ中の第
２導電型半導体クラツド層が他の部分の第２導電
型半導体クラツド層よりも厚く形成され、前記メ
サストライプ上部を除く全面に互いに異なる導電
型の第１及び第２の電流ブロツク層が形成され、
前記メサストライプ上部と前記第２電流ブロツク
層の全面に埋め込み層が形成されたことを特徴と
する埋め込みヘテロ構造半導体レーザ。1 A multilayer structure semiconductor wafer in which a semiconductor multilayer film including at least an active layer is laminated on a first conductivity type semiconductor substrate is provided with a mesa stripe sandwiched between two parallel grooves deeper than the active layer. In a buried heterostructure semiconductor laser formed by buried growth after formation, the second conductivity type semiconductor cladding layer in the mesa stripe is formed thicker than the second conductivity type semiconductor cladding layer in other parts, and the upper part of the mesa stripe is first and second current blocking layers of different conductivity types are formed on the entire surface except for the
A buried heterostructure semiconductor laser characterized in that a buried layer is formed on the upper part of the mesa stripe and on the entire surface of the second current blocking layer.
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1345182A JPS58131784A (en) | 1982-01-29 | 1982-01-29 | Semiconductor laser having buried hetero-structure |
| DE8282109619T DE3277278D1 (en) | 1981-10-19 | 1982-10-18 | Double channel planar buried heterostructure laser |
| US06/434,990 US4525841A (en) | 1981-10-19 | 1982-10-18 | Double channel planar buried heterostructure laser |
| EP82109619A EP0083697B1 (en) | 1981-10-19 | 1982-10-18 | Double channel planar buried heterostructure laser |
| CA000413780A CA1196077A (en) | 1981-10-19 | 1982-10-19 | Double channel planar buried heterostructure laser |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1345182A JPS58131784A (en) | 1982-01-29 | 1982-01-29 | Semiconductor laser having buried hetero-structure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58131784A JPS58131784A (en) | 1983-08-05 |
| JPS641073B2 true JPS641073B2 (en) | 1989-01-10 |
Family
ID=11833499
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1345182A Granted JPS58131784A (en) | 1981-10-19 | 1982-01-29 | Semiconductor laser having buried hetero-structure |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58131784A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0837338A (en) * | 1994-07-21 | 1996-02-06 | Nec Corp | Double channel planar buried structure semiconductor laser and its manufacture |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5688390A (en) * | 1979-12-20 | 1981-07-17 | Nec Corp | Manufacture of semiconductor laser |
-
1982
- 1982-01-29 JP JP1345182A patent/JPS58131784A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS58131784A (en) | 1983-08-05 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP4861112B2 (en) | Optical semiconductor device and manufacturing method thereof | |
| US4870468A (en) | Semiconductor light-emitting device and method of manufacturing the same | |
| JP4072937B2 (en) | Semiconductor optical device | |
| JP2894186B2 (en) | Optical semiconductor device | |
| US5304507A (en) | Process for manufacturing semiconductor laser having low oscillation threshold current | |
| JPS61164287A (en) | Semiconductor laser | |
| JP2550714B2 (en) | High-resistance semiconductor layer embedded semiconductor laser | |
| JPS641073B2 (en) | ||
| JP2000353849A (en) | Optical semiconductor device and its manufacture | |
| JPS6237913B2 (en) | ||
| JPS6237914B2 (en) | ||
| JPS641072B2 (en) | ||
| JP2542570B2 (en) | Method for manufacturing optical integrated device | |
| JP2555984B2 (en) | Semiconductor laser and manufacturing method thereof | |
| JPH08330665A (en) | Manufacture of optical semiconductor laser | |
| JP3276674B2 (en) | Semiconductor laser device | |
| JPH06104527A (en) | Fabrication of semiconductor laser | |
| JPH05235481A (en) | Semiconductor light emitting device | |
| JPS596588A (en) | Semiconductor laser | |
| JP2917695B2 (en) | Method for manufacturing optical semiconductor device | |
| JPH03174793A (en) | Semiconductor laser | |
| JPH0983077A (en) | Semiconductor optical device | |
| JPH1140897A (en) | Semiconductor laser element and its manufacture | |
| JPS58142589A (en) | Preparation of buried hetero structured semiconductor laser | |
| JPS6261383A (en) | Semiconductor laser and manufacture thereof |