JPS6379396A - Manufacture of conductor circuit board - Google Patents
Manufacture of conductor circuit boardInfo
- Publication number
- JPS6379396A JPS6379396A JP1299587A JP1299587A JPS6379396A JP S6379396 A JPS6379396 A JP S6379396A JP 1299587 A JP1299587 A JP 1299587A JP 1299587 A JP1299587 A JP 1299587A JP S6379396 A JPS6379396 A JP S6379396A
- Authority
- JP
- Japan
- Prior art keywords
- conductive
- conductor circuit
- circuit
- cathode
- conductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004020 conductor Substances 0.000 title claims description 122
- 238000004519 manufacturing process Methods 0.000 title claims description 16
- 229910052751 metal Inorganic materials 0.000 claims description 74
- 239000002184 metal Substances 0.000 claims description 73
- 239000000758 substrate Substances 0.000 claims description 51
- 238000007747 plating Methods 0.000 claims description 38
- 238000000034 method Methods 0.000 claims description 25
- 239000000463 material Substances 0.000 claims description 6
- 238000002788 crimping Methods 0.000 claims description 4
- 230000005611 electricity Effects 0.000 claims description 3
- 239000010406 cathode material Substances 0.000 claims description 2
- 239000000615 nonconductor Substances 0.000 claims 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 23
- 229910052802 copper Inorganic materials 0.000 description 15
- 239000010949 copper Substances 0.000 description 15
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 12
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 10
- 239000000853 adhesive Substances 0.000 description 10
- 230000001070 adhesive effect Effects 0.000 description 10
- 229910000679 solder Inorganic materials 0.000 description 9
- 238000004381 surface treatment Methods 0.000 description 9
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 9
- 239000011889 copper foil Substances 0.000 description 8
- 230000007547 defect Effects 0.000 description 5
- 239000011521 glass Substances 0.000 description 5
- 229910052759 nickel Inorganic materials 0.000 description 5
- 238000005476 soldering Methods 0.000 description 5
- 239000010935 stainless steel Substances 0.000 description 5
- 229910001220 stainless steel Inorganic materials 0.000 description 5
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N Phenol Chemical compound OC1=CC=CC=C1 ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 description 4
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 4
- 239000002253 acid Substances 0.000 description 4
- 238000005238 degreasing Methods 0.000 description 4
- 239000007788 liquid Substances 0.000 description 4
- 229920000728 polyester Polymers 0.000 description 4
- 238000007639 printing Methods 0.000 description 4
- 235000011121 sodium hydroxide Nutrition 0.000 description 4
- 239000001488 sodium phosphate Substances 0.000 description 4
- 229910000162 sodium phosphate Inorganic materials 0.000 description 4
- 239000000126 substance Substances 0.000 description 4
- RYFMWSXOAZQYPI-UHFFFAOYSA-K trisodium phosphate Chemical compound [Na+].[Na+].[Na+].[O-]P([O-])([O-])=O RYFMWSXOAZQYPI-UHFFFAOYSA-K 0.000 description 4
- 239000004593 Epoxy Substances 0.000 description 3
- 239000004642 Polyimide Substances 0.000 description 3
- 239000003795 chemical substances by application Substances 0.000 description 3
- 230000007423 decrease Effects 0.000 description 3
- 238000000151 deposition Methods 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 229920001721 polyimide Polymers 0.000 description 3
- 238000003860 storage Methods 0.000 description 3
- 206010011732 Cyst Diseases 0.000 description 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 2
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 2
- 229910001069 Ti alloy Inorganic materials 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- 238000003486 chemical etching Methods 0.000 description 2
- 229910000365 copper sulfate Inorganic materials 0.000 description 2
- ARUVKPQLZAKDPS-UHFFFAOYSA-L copper(II) sulfate Chemical compound [Cu+2].[O-][S+2]([O-])([O-])[O-] ARUVKPQLZAKDPS-UHFFFAOYSA-L 0.000 description 2
- 208000031513 cyst Diseases 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 239000004744 fabric Substances 0.000 description 2
- 238000007731 hot pressing Methods 0.000 description 2
- 229910000040 hydrogen fluoride Inorganic materials 0.000 description 2
- 229910021645 metal ion Inorganic materials 0.000 description 2
- 229910017604 nitric acid Inorganic materials 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 239000011295 pitch Substances 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 238000000926 separation method Methods 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- 230000037303 wrinkles Effects 0.000 description 2
- DDFHBQSCUXNBSA-UHFFFAOYSA-N 5-(5-carboxythiophen-2-yl)thiophene-2-carboxylic acid Chemical compound S1C(C(=O)O)=CC=C1C1=CC=C(C(O)=O)S1 DDFHBQSCUXNBSA-UHFFFAOYSA-N 0.000 description 1
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- JPVYNHNXODAKFH-UHFFFAOYSA-N Cu2+ Chemical compound [Cu+2] JPVYNHNXODAKFH-UHFFFAOYSA-N 0.000 description 1
- 229910000976 Electrical steel Inorganic materials 0.000 description 1
- 101001008922 Homo sapiens Kallikrein-11 Proteins 0.000 description 1
- 102100027612 Kallikrein-11 Human genes 0.000 description 1
- 229910000990 Ni alloy Inorganic materials 0.000 description 1
- 229910001096 P alloy Inorganic materials 0.000 description 1
- 230000002378 acidificating effect Effects 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- HSFWRNGVRCDJHI-UHFFFAOYSA-N alpha-acetylene Natural products C#C HSFWRNGVRCDJHI-UHFFFAOYSA-N 0.000 description 1
- 239000004760 aramid Substances 0.000 description 1
- 229920003235 aromatic polyamide Polymers 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229910001431 copper ion Inorganic materials 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000005553 drilling Methods 0.000 description 1
- 235000013399 edible fruits Nutrition 0.000 description 1
- 238000004070 electrodeposition Methods 0.000 description 1
- 238000005868 electrolysis reaction Methods 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 125000002534 ethynyl group Chemical group [H]C#C* 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 239000010419 fine particle Substances 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- 238000005246 galvanizing Methods 0.000 description 1
- 239000010439 graphite Substances 0.000 description 1
- 229910002804 graphite Inorganic materials 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000007654 immersion Methods 0.000 description 1
- 229910010272 inorganic material Inorganic materials 0.000 description 1
- 239000011147 inorganic material Substances 0.000 description 1
- 229910000765 intermetallic Inorganic materials 0.000 description 1
- JEIPFZHSYJVQDO-UHFFFAOYSA-N iron(III) oxide Inorganic materials O=[Fe]O[Fe]=O JEIPFZHSYJVQDO-UHFFFAOYSA-N 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- OFNHPGDEEMZPFG-UHFFFAOYSA-N phosphanylidynenickel Chemical compound [P].[Ni] OFNHPGDEEMZPFG-UHFFFAOYSA-N 0.000 description 1
- 239000011148 porous material Substances 0.000 description 1
- 238000002203 pretreatment Methods 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 238000005204 segregation Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- 238000005406 washing Methods 0.000 description 1
- 238000004804 winding Methods 0.000 description 1
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
（イ）産業上の利用分野
この発明はプリント配線板等の導体回路板、詳細には、
導体回路を電気メッキ等により、銅、ニッケル、ニッケ
ル合金、その他の金属で形成し、絶縁基板に一体に密着
せしめる導体回路板製造方法に係る。 更に詳細には、
集積回路部品のように極めて小さいビッヂ間隔の電子部
品のリード端子を取り付け、ハンダ付けしても、リード
端子を取り付けた導体回路部分間に溢れたハンダによる
ブリッジの生じにくい導体回路板の製造方法に係る。[Detailed Description of the Invention] (a) Industrial Application Field This invention relates to conductor circuit boards such as printed wiring boards, in particular,
The present invention relates to a method of manufacturing a conductor circuit board in which a conductor circuit is formed of copper, nickel, nickel alloy, or other metal by electroplating or the like, and is integrally attached to an insulating substrate. More specifically,
A method for manufacturing a conductor circuit board that is unlikely to cause bridging due to overflowing solder between the conductor circuit sections to which lead terminals are attached, even when lead terminals of electronic components with extremely small pitches such as integrated circuit components are attached and soldered. It depends.
険）従来の技術
（従来例１）
従来、プリント回路板を製造するには、フェノール、ガ
ラスエポキシ樹脂等の非導電基板（絶縁基板）に、１８
または３５μ、またはそれ以上の膜厚を有する胴筒金属
箔を一体に接着せしめ、該銅箔表面のプリント回路構成
部のみにフォトレジスト或いは印刷レジストを密着させ
、不要な銅（露出部）を適当なエッチャントで溶解除去
する方法が知られている。Conventional technology (Conventional example 1) Conventionally, in order to manufacture printed circuit boards, a non-conductive substrate (insulating substrate) made of phenol, glass epoxy resin, etc.
Alternatively, a metal foil with a film thickness of 35 μm or more is glued together, and a photoresist or printing resist is adhered only to the printed circuit components on the surface of the copper foil, and unnecessary copper (exposed parts) is removed as appropriate. There is a known method of dissolving and removing it with a suitable etchant.
（従来例２）
他方、金属製回転ドラム又は金属製回転ドラムの周囲を
摺動する金属製ベルトの金属表面上にレジスト剤でマス
クを施し、ついて金属製回転ドラム又は金属製ベルトを
メッキ陰極とし、対向する陽極との間に電流を通ずるこ
とにより金属製回転ドラム又は金属製ベルト表面に銅を
電析せしめ、プリント回路板用導体回路を製造する方法
が知られている（「プリント回路板用導体回路の製造方
法」特公昭５５−３２２３８（ｔｌｓＰ、４．０５３．
３７０））。(Conventional Example 2) On the other hand, a resist agent is applied to the metal surface of a rotating metal drum or a metal belt that slides around the rotating metal drum, and the rotating metal drum or belt is used as a plating cathode. There is a known method for producing conductor circuits for printed circuit boards by electrolytically depositing copper on the surface of a metal rotating drum or metal belt by passing an electric current between opposing anodes. “Method for manufacturing conductor circuits” Japanese Patent Publication No. 55-32238 (TLSP, 4.053.
370)).
同法により得られた導体回路から導体回路板を作製する
には、金属ドラム又は金属ベルト上の導体回路にポリエ
ステル、ポリイミド、フェノール等目的に応じて選定し
た絶縁基板を、必要に応じて接着剤を介して強固に接着
せしめた後、金属ドラム又は金属ベルトから分離し、次
いでオーバーレイを被覆して導体回路を得る。To produce a conductor circuit board from the conductor circuit obtained by this method, an insulating substrate selected according to the purpose, such as polyester, polyimide, phenol, etc., is attached to the conductor circuit on a metal drum or metal belt, using an adhesive as necessary. After firmly adhering through the metal drum or belt, the conductor circuit is separated from the metal drum or metal belt and then covered with an overlay to obtain a conductor circuit.
（従来例３）
プリント配線板に、ＩＣ等のように、小さいビッヂ間隔
の電子部品を取り付け、ハンダ付けするときに生ずるブ
リッジを防止するための手段しとては、特公昭５４−４
１１０２ｒプリント配線板」が知られている。この「プ
リント配線板」は、「絶縁基板に導電体パターンを印刷
し、この導電体パターンの形成面に半田付けするランド
を残して全面に第１層の半田付抵抗層を形成し、かつ、
ランド間隔の狭い部分に半田の橋絡を防止する橋絡防止
用の半田付抵抗層を同第１層の半田付抵抗層上に形成し
たことを特徴とするプリント配線板。」からなる。(Conventional Example 3) As a means for preventing bridging that occurs when electronic components such as ICs with small pitches are attached and soldered to a printed wiring board, there is a method described in Japanese Patent Publication No. 54-4
1102r printed wiring board" is known. This "printed wiring board" is made by "printing a conductor pattern on an insulating substrate, and forming a first layer of soldering resistance layer on the entire surface, leaving a land for soldering on the surface on which the conductor pattern is formed, and
A printed wiring board characterized in that a bridging-preventing soldering resistance layer is formed on the first layer of the soldering resistance layer to prevent solder bridging in areas where the land spacing is narrow. ”.
四 発明が解決しようとする間厘点
（従来例１）
現在プリント回路基板の製造方法として最ら多用されて
いる従来例１においては、銅箔製造後の表面処理、切断
、絶縁基板への積層等の工程において、単体としての銅
箔に加えられろ引張力、折り曲げ力に耐える銅箔厚さで
ある１８μ以上の箔を用いなければならない。4. Problems to be Solved by the Invention (Conventional Example 1) In Conventional Example 1, which is currently the most frequently used method for manufacturing printed circuit boards, surface treatment, cutting, and lamination on an insulating substrate after manufacturing the copper foil. In these processes, it is necessary to use a copper foil with a thickness of 18 μm or more that can withstand the tensile force and bending force applied to the copper foil as a single piece.
しかるに近年、各種装置、機器を薄型、小型化する傾向
は極めて強くなってきており、従ってこれらに用いられ
るプリント回路基板についても同様なことが言える。ち
なみにプリント回路導体を形成する銅箔の厚さは５〜１
０μ程度が要求されてはいるが、同のような理由により
この要求は未だ満足されていない状況にある。一方、膜
厚が５０〜１５０μ程度の厚銅箔を選択的にエツチング
してプリント回路とする用途もみられる。その好例は、
小型モータであり、従来の胴巻線コイルの代わりにポリ
エステル、ポリイミド等の絶縁基板に接着剤により積層
した銅箔の導体回路とする部分以外の部分をエツチング
により除去したいわゆるシート状コイルを用いるもので
ある。However, in recent years, there has been an extremely strong tendency to make various devices and devices thinner and smaller, and the same can be said of the printed circuit boards used in these devices. By the way, the thickness of the copper foil that forms the printed circuit conductor is 5 to 1
Although approximately 0μ is required, this requirement has not yet been met for the same reason. On the other hand, there are also applications in which thick copper foils having a film thickness of about 50 to 150 microns are selectively etched to form printed circuits. A good example is
It is a small motor, and instead of the conventional body winding coil, it uses a so-called sheet-like coil, which is made of copper foil laminated with adhesive on an insulating substrate made of polyester, polyimide, etc., and the parts other than the conductor circuit are removed by etching. be.
この工法においては、少なくとも５０μ以上の膜厚を有
する銅箔をエツチングしなければならならず、エツチン
グに要する時間が長くなるため導体端部の寸法精度が低
下するという品質上の間ｊと同時に製造コストも高くな
ろという大きな難点かある。In this method, it is necessary to etch the copper foil with a film thickness of at least 50 μm, which increases the time required for etching and reduces the dimensional accuracy of the conductor ends. The big drawback is that the cost is high.
（従来例２）
従来例２では、導体回路形成に使用するレジスト膜は、
メッキにおける陰極表面からの離脱を防止するため陰極
側表面に強固に固定する必要があり、そのためレジスト
膜は導体回路の陰極表面からの剥離後も陰極に残存する
。そこで陰極を再使用するにはレジストを除去する必要
があり、陰極に残ったレジストは、スコッチブライト、
研摩剤等によって削り取る。しかし、物理的に研摩をす
ると、陰極として例えばステンレススチールを用いる場
合等は、表面が加工硬化して、再加工はしにくくなる問
題点を有する。(Conventional Example 2) In Conventional Example 2, the resist film used for forming the conductor circuit is
In order to prevent separation from the cathode surface during plating, it is necessary to firmly fix the resist film to the cathode surface, and therefore the resist film remains on the cathode even after the conductor circuit is peeled off from the cathode surface. Therefore, in order to reuse the cathode, it is necessary to remove the resist, and the resist remaining on the cathode is
Scrape it off with an abrasive, etc. However, when physically polished, for example when stainless steel is used as the cathode, there is a problem that the surface becomes work hardened, making it difficult to rework.
更に、第１５図に断面を示すように、従来得られる導体
回路板においては、絶縁基板（３１）上に、銅からなる
回路（３２）部分のみが突設して形成されている。その
ため、オーバーレイフィルム（３３）を回路（３２）上
から密着せしめる場合には、フィルムは回路（３２）の
外周面に全て密着することはできず、オーバレイフィル
ム（３３）及び回路（３２）で形成される空気を封入し
た空間部（３４）を生ずる。そして、オーバーレイは一
般に加熱して行うため、銅からなる回路（３２）及び接
着剤は加熱されながら空気に触れるため、更には経時に
よっても酸化する問題点を有する。Further, as shown in cross section in FIG. 15, in the conventional conductor circuit board, only a circuit (32) made of copper is formed protrudingly on an insulating substrate (31). Therefore, when the overlay film (33) is brought into close contact with the circuit (32), the film cannot be brought into close contact with the entire outer peripheral surface of the circuit (32), and the overlay film (33) and the circuit (32) are A space (34) is created in which air is enclosed. Since the overlay is generally performed by heating, the circuit (32) made of copper and the adhesive are exposed to air while being heated, and furthermore, there is a problem that they oxidize over time.
更に、オーバーレイフィルムをかけるときは、同じく第
１５図に示すようにロール（３５）によって、絶縁基板
（３１）、回路（３２）、オーバーレイフィルム（３３
）を挟んで押圧して行う。しかるに従来は、回路（３２
）は、絶縁基板（３１）から回路部分のみ突設して設置
し、かつ回路（３２）と絶縁基板（３１）とは接着剤で
固定されているにずぎないため、ローラ（３５）の当接
により、回路（３２）は図中各矢示方向へ移行する問題
点を有する。更に、従来法により得られた導体回路から
導体回路板を作製するには、金属ドラムまたは金属ベル
ト上の導体回路にポリエステル、ポリミド、フェノール
等目的に応じて選定した絶縁基板を、必要に応じて接着
剤を介して強固に密着せしめた後、金属ドラムまたは金
属ベルトから分離し、次いでオーバーレイを被覆して導
体回路板を得るため、分離工程でシワや折れ、打痕、裂
は目等を生ずる問題点を有する。Furthermore, when applying the overlay film, as shown in FIG. 15, the insulating substrate (31), the circuit (32), and the overlay film (33
) and press it. However, conventionally, the circuit (32
) is installed so that only the circuit part protrudes from the insulating board (31), and the circuit (32) and the insulating board (31) must be fixed with adhesive, so the roller (35) does not come into contact with it. Due to the contact, the circuit (32) has the problem of shifting in the directions indicated by the arrows in the figure. Furthermore, in order to produce a conductor circuit board from a conductor circuit obtained by the conventional method, an insulating substrate selected according to the purpose, such as polyester, polymide, phenol, etc., is applied to the conductor circuit on a metal drum or metal belt as necessary. After being firmly adhered with adhesive, it is separated from the metal drum or metal belt and then covered with an overlay to obtain a conductive circuit board, so wrinkles, folds, dents, tears, etc. may occur during the separation process. There are problems.
（従来例３）
従来の導体回路板では第１６図に示すように絶縁基板（
４１）表面には一般に約３５μの導体回路（４２）を積
層し、その上に約１５〜２５μの非導電性レジスト膜（
４１）（オーバーレイ）を形成する。そのため、スキー
ジ−による印刷時に、第２３図に示すように導体回路（
４２）の角（Ａ）の印１ｉｔ１が薄くなったり、導体回
路（４２）間は、導体回路（４２）上に比し、絶縁基板
（４１）側に谷状に低くなって谷部（Ｂ）を形成してい
る。そのため、電子部品（４４）のリード端子（４５）
をハンダ（４６）で導体回路に固定すると、あふれたハ
ンダ（４６）は第１７図に示すように、非導電性レジス
ト膜（４２）表面に沿って導体回路間に流れやすくなり
、ブリッジを生じやすくなる。そのため、従来例３に示
す「プリント配線板」のように、第１６図に示すような
第２層目の非導電性レジスト膜（半田付抵抗層８４．７
）を必要とした。(Conventional Example 3) In the conventional conductor circuit board, as shown in Fig. 16, the insulating substrate (
41) Generally, a conductor circuit (42) with a thickness of about 35μ is laminated on the surface, and a non-conductive resist film (42) with a thickness of about 15 to 25μ is laminated thereon.
41) Form (overlay). Therefore, when printing with a squeegee, the conductor circuit (
The mark 1it1 at the corner (A) of 42) becomes thinner, and the space between the conductor circuits (42) becomes lower like a valley on the insulating substrate (41) side than on the conductor circuit (42). ) is formed. Therefore, the lead terminal (45) of the electronic component (44)
When the solder (46) is fixed to the conductor circuit with solder (46), the overflowing solder (46) tends to flow between the conductor circuits along the surface of the non-conductive resist film (42), causing a bridge, as shown in Figure 17. It becomes easier. Therefore, as in the "printed wiring board" shown in Conventional Example 3, the second layer of non-conductive resist film (soldering resistance layer 84.7) as shown in FIG.
) was required.
しかしながら、２回にわたる膜形成は工程が重複する問
題点を有した。However, forming the film twice had the problem of duplication of steps.
に）問題点を解決するための手段及び作用この発明は剛
性を有しメッキ装置に固定する平板状導電性陰極基材表
面に金属膜を一体に被覆せしめ、金属膜表面上の導体回
路を形成せしめようとする部分以外の部分には、非導電
性レジスト膜を密着せしめて陰極を構成し、該メッキ陰
極に平行に対向する不溶性陽極を１〜３０ｍｍの間隙を
有して配置固定し、固定された陰極と不溶性陽極との間
に形成される空隙部にメッキ液を１．ｍ／ｓｅｃ以上の
高速度で移動するように供給するとともに、陰極と陽極
との間に０，８〜４．ＯＡ／ｃｍ”の電流密度となるよ
うに通電し、導体回路形成部分のみに選択的に金属を高
速度で電析せしめ、金属導体が所要の膜厚に達したとこ
ろで通電を止めて導体回路を形成し、非導電性レジスト
膜を除去し、導体回路表面に絶縁基板を積層し、絶縁基
板と平板状導電性陰極基材を圧着することで、導体回路
を絶縁基板中にめり込ませるとともに導体回路及び金属
膜を絶縁基板に一体に密着せしめ、金属膜及び導体回路
を一体に陰極材より分離し、金属膜及び導体回路及び絶
縁基板を貫通する孔を所定位置に形成し、導体回路表面
を被覆する最表層金属膜を除去し、孔を形成する導体回
路部分間の表面には非導電性レジスト膜を形成すること
で導体回路板とすることを特徴とする導体回路板の製造
方法に係る。B) Means and operation for solving the problems This invention integrally coats the surface of a flat conductive cathode substrate which has rigidity and is fixed to a plating device with a metal film, and forms a conductor circuit on the surface of the metal film. A non-conductive resist film is adhered to the part other than the part to be plated to form a cathode, and an insoluble anode facing parallel to the plating cathode is arranged and fixed with a gap of 1 to 30 mm. 1. Plating solution is applied to the gap formed between the negative electrode and the insoluble anode. It is supplied so as to move at a high speed of 0.8 to 4.0 m/sec or more between the cathode and the anode. OA/cm'' current density is applied to selectively deposit metal only on the conductor circuit forming area at high speed, and when the metal conductor reaches the required film thickness, the current is stopped and the conductor circuit is formed. The conductive circuit is embedded into the insulating substrate by forming the insulating substrate, removing the non-conductive resist film, laminating an insulating substrate on the surface of the conductive circuit, and crimping the insulating substrate and the flat conductive cathode substrate. The conductor circuit and the metal film are integrally adhered to the insulating substrate, the metal film and the conductor circuit are integrally separated from the cathode material, a hole is formed at a predetermined position through the metal film, the conductor circuit, and the insulating substrate, and the surface of the conductor circuit is A method for manufacturing a conductive circuit board, characterized in that the outermost metal film covering the conductive circuit board is removed, and a non-conductive resist film is formed on the surface between the conductor circuit parts forming the holes. It depends.
導体回路表面に形成する非導電性レジスト膜は、同一平
面となった導体回路表面及び非回路形成部分表面に被覆
されるため、非導電性レジスト膜自体も平面状にかけら
れ、従来例のように谷部を生ずることはない。そのため
、電子部品のリード端子をハンダで導体回路に固定した
とき、仮にハンダが溢れても、非導電性レジスト膜表面
に沿って流れて、ブリッジを発生することはない。The non-conductive resist film formed on the surface of the conductive circuit covers the surface of the conductive circuit and the surface of the non-circuit forming part which are on the same plane, so the non-conductive resist film itself is also applied in a flat manner, unlike the conventional example. It does not produce valleys. Therefore, when a lead terminal of an electronic component is fixed to a conductor circuit with solder, even if the solder overflows, it will not flow along the surface of the non-conductive resist film and cause a bridge.
（ホ） 実 施 例
次に本発明の実施例の詳細を実施例図面に基づき説明す
る。本発明に使用する陰極（１）の平板状導電材（２）
は、剛性を有するに足る肉厚（通常５〜１０１０ｎ１で
、例えば１００ＯＸ １０００ｍｍの平板状導電材から
なり、メッキ工程で使用する薬品に対する耐薬品性、耐
電食性を有することが望ましいことから一般的にはステ
ンレススチール、ニッケル等を研摩したものである。(E) Embodiments Next, details of embodiments of the present invention will be explained based on the drawings. Flat conductive material (2) of cathode (1) used in the present invention
is made of a flat conductive material with a wall thickness sufficient to have rigidity (usually 5 to 1010n1, for example, 1000 x 1000 mm), and is generally used because it is desirable to have chemical resistance and electrical corrosion resistance against chemicals used in the plating process. is polished stainless steel, nickel, etc.
第１図に断面を示すように、陰極（１）のステンレスス
チール、ニッケル板等からなる平板状導電材（２）中に
は、電気化学的欠陥部（３）、（４）か存する。電気化
学的欠陥部（３）、（４）は、金属間化合物、或いは非
金属介在物、偏析、気孔からなり、ステンレススチール
の形成過程で浪人生成されたものであり、周囲と電気化
学的性質を異にし、従って平板状導電材（２）表面にそ
のまま電析させると、ピンホールを生ずるという問題点
がある。As shown in cross section in FIG. 1, electrochemical defects (3) and (4) exist in the flat conductive material (2) made of stainless steel, nickel plate, etc. of the cathode (1). Electrochemical defects (3) and (4) consist of intermetallic compounds, nonmetallic inclusions, segregation, and pores, and are generated during the formation process of stainless steel, and are due to the electrochemical properties of the surroundings. Therefore, if electrodeposition is made directly on the surface of the flat conductive material (2), pinholes will occur.
更には、従来例２で述べたごとく、メッキ陰極表面上に
直接レジストを形成せしめてメッキにより導体回路を製
作する工法においては、メッキ時の陰極表面からのレジ
ストの脱離を防止するため、陰極レジスト間の密着を強
固にする必要があり、その結果レジストは、導体回路の
陰極表面からの分離後も陰極側に残存し、それによって
特に製品の品質にかかわる問題点を内在している。Furthermore, as described in Conventional Example 2, in the method of forming a resist directly on the surface of the plating cathode and manufacturing a conductor circuit by plating, in order to prevent the resist from detaching from the cathode surface during plating, the cathode It is necessary to strengthen the adhesion between the resists, and as a result, the resist remains on the cathode side even after the conductor circuit is separated from the cathode surface, which poses a problem, especially regarding the quality of the product.
本発明においては、上記二つの問題点を同時に解消する
ため、平板状導電材（２）表面に予め金属膜（５）を−
様に形成せしめる。金属膜（５）は導電体であればよい
。金属膜（５）を形成せしめるには、まず平板状導電材
（２）表面に前処理を施す。前処理は平板状導電材（２
）表面の汚れ、酸化皮膜を除去するとともに、平板状導
′ｒｒｉオ（２）表面と該表面上に形成せしめる金属膜
（５）の界面（８）、及び第３図に示すごとく金属膜（
５）表面と該表面上に形成せしめる導体回路（６）、あ
るいは及び非導電性レジスト膜（７）との界面（９）の
密着力の差を生ぜしめ、界面（９）の密着力が界面（８
）の密着力よりも大となるようにすることを目的とする
。In the present invention, in order to solve the above two problems at the same time, a metal film (5) is preliminarily applied to the surface of the flat conductive material (2).
Form it in a similar manner. The metal film (5) may be any conductor. In order to form the metal film (5), first, the surface of the flat conductive material (2) is pretreated. Pre-treatment is performed using a flat conductive material (2
) The surface dirt and oxide film are removed, and the interface (8) between the flat conductor (2) surface and the metal film (5) formed on the surface, and the metal film (5) as shown in FIG.
5) A difference in adhesion between the surface and the interface (9) with the conductor circuit (6) formed on the surface or the non-conductive resist film (7) is created, and the adhesion of the interface (9) is (8
).
平板状導電材としてステンレススチールを用いる場合は
例えば次ぎに述べるような表面処理を施せばよい。まず
、硫酸：８０〜１００ｍＣ／Ｑ１６０〜７０℃で、１０
〜３０分かけてスケール除去を行う。ついで水洗し、硝
酸：６０〜１００ｍＱ／Ｑ＋ ３０ｇ＃酸性フッ化アン
モニウムにより室温下で１０〜３０分スマット除去する
。ついで水洗し、リン酸ナトリウム２０〜５０ｙ／Ｌ水
酸化ナトリウム５０９ＩＱ、３〜８Ａ／ｄｍ２、室温〜
４０℃の条件下で１〜２分陰極電解脱脂する。表面処理
の各工程の時間、温度、濃度条件を変えろことで、金属
膜（５）との密着力の強弱をつけ、平板状導電材（２）
と金属膜（５）間の密着力と、金属膜（５）と導体回路
（６）及び非導電性レジスト膜（７）間の密着力との相
対的な密着力の違いを生ぜしむる。When stainless steel is used as the flat conductive material, the following surface treatment may be applied, for example. First, sulfuric acid: 80-100mC/Q at 160-70℃, 10
Descaling takes ~30 minutes. Then, it is washed with water, and the smut is removed with nitric acid: 60-100 mQ/Q+ 30 g #acidic ammonium fluoride at room temperature for 10-30 minutes. Then washed with water, sodium phosphate 20-50y/L sodium hydroxide 509IQ, 3-8A/dm2, room temperature ~
Cathodic electrolytic degreasing is carried out for 1 to 2 minutes at 40°C. By changing the time, temperature, and concentration conditions of each surface treatment step, the strength of adhesion to the metal film (5) can be adjusted, and the flat conductive material (2)
This causes a difference in the relative adhesion between the metal film (5) and the adhesion between the metal film (5), the conductive circuit (6), and the non-conductive resist film (7).
同様に、平板状導電材（２）としてニッケルを用いた場
合は例えば以下のような表面処理をおこなう。Similarly, when nickel is used as the flat conductive material (2), the following surface treatment is performed, for example.
即ち、リン酸ナトリウム２０〜５０９／Ｑ、水酸化ナト
リウム５０９ＩＱ、 ３〜８Ａ ／ｄｎ＋’、室温〜４
０°Ｃの条件下で１〜２分陰極電解脱脂を行う。ついで
水洗し、フッ化水素１〜１０ｇ／＆、５０℃で１〜１０
分の条件下、または、塩酸： １５０ｍｆ！／ρの、５
０℃、１〜１０分の条件下で活性化し、ついで水洗し、
４０〜６０℃の温水水洗をおこなう。平板状導電材に）
としてチタン及びチタン合金を用いる場合は例えば以下
のような表面処理を行う。That is, sodium phosphate 20-509/Q, sodium hydroxide 509IQ, 3-8A/dn+', room temperature-4
Cathodic electrolytic degreasing is performed for 1 to 2 minutes at 0°C. Then, wash with water and add 1 to 10 g of hydrogen fluoride at 50°C.
or hydrochloric acid: 150mf! /ρ's, 5
Activate at 0°C for 1 to 10 minutes, then wash with water,
Wash with warm water at 40-60°C. (for flat conductive materials)
When titanium or titanium alloy is used as the material, the following surface treatment is performed, for example.
即ち、まず、リン酸ナトリウム２０〜５０９／（１，５
０〜６０℃の条件下で３〜５分アルカリ浸漬脱脂を行う
。ついで水洗し、活性化を行う。活性化は、化学エツチ
ングにより行う。化学エツチングは２５％ＨＦ、７５％
ＨＮＯ３により、純チタン、又はチタン合金について行
う。That is, first, sodium phosphate 20-509/(1,5
Alkaline immersion degreasing is performed under conditions of 0 to 60°C for 3 to 5 minutes. Then wash with water and activate. Activation is performed by chemical etching. Chemical etching: 25% HF, 75%
This test is carried out using HNO3 on pure titanium or titanium alloy.
平板状導電材（２）として銅または銅合金を用いる場合
は、まずリン酸ナトリウム２０〜５ｏ９／Ｑ、５０〜６
０℃、３〜１０Ａ／ｄｍ２の条件下で３０秒〜２分間、
電解し、陰極電解脱脂する。ついで水洗し、フッ化水素
１〜ｌｈ／Ｌ室温下で３０秒〜２分間酸洗いし、ついで
水洗して行う。このように表面処理した平板状導電材（
２）表面に金属膜（５）を積層する。金属膜（５）は、
銅、ニッケル、ニッケルーリン合金等を用いることがで
きる。これら金属薄層は、電気メッキ、無電解メッキ、
蒸着、スパッタリング等により、０．１〜数μ（２〜３
μ）厚で積層する。ここにおいて、平板状導電材（２）
表面にピンホール等の物理的欠陥が存在せず、又電気化
学的欠陥も存在しない電気化学的に一様にして適度の密
着力を有する金属膜（５）を積層する陰極（１）を得る
。When copper or copper alloy is used as the flat conductive material (2), first sodium phosphate 20-5o9/Q, 50-6
30 seconds to 2 minutes at 0°C and 3 to 10 A/dm2,
Electrolyze and cathode electrolysis degreasing. It is then washed with water, pickled with 1 to 1 h/L of hydrogen fluoride at room temperature for 30 seconds to 2 minutes, and then washed with water. A flat conductive material surface-treated in this way (
2) Layer a metal film (5) on the surface. The metal film (5) is
Copper, nickel, nickel-phosphorus alloy, etc. can be used. These metal thin layers can be electroplated, electroless plated,
By vapor deposition, sputtering, etc., the
μ) laminated in thickness. Here, a flat conductive material (2)
Obtain a cathode (1) in which a metal film (5) is laminated with an electrochemically uniform metal film (5) that has no physical defects such as pinholes or electrochemical defects on its surface and has an appropriate adhesive strength. .
ついで、金属膜（５）表面に第２図に示すように非導電
性レジスト膜（７）を固定する。非導電性レジスト膜（
７）は、フォトレジスト法、印刷法等により、必要とさ
れる回路以外の部分をレジスト剤でマスクする。Next, a non-conductive resist film (7) is fixed on the surface of the metal film (5) as shown in FIG. Non-conductive resist film (
7) Masks portions other than the required circuit with a resist agent using a photoresist method, a printing method, or the like.
この陰極（１）を、第１Ｉ図、第１２図に示すメッキ装
置（１１）のフレーム（１２）の上部中央に水平に設置
した銅と鉛から成る板状不溶性陽極（１４）に、金属膜
（５）非導電性レジスト膜（７）の表面を向けて平行に
対向さ仕て固定し、陰極（１）及び不溶性陽極（１４）
の対向面の空隙部（１３）をρ−１〜３０ｍｍの範囲内
に、好ましくは１〜１０ｍｍ。This cathode (1) is attached to a plate-shaped insoluble anode (14) made of copper and lead installed horizontally in the upper center of the frame (12) of the plating apparatus (11) shown in FIGS. (5) A cathode (1) and an insoluble anode (14) are fixed with the surfaces of the non-conductive resist films (7) facing each other in parallel.
The gap (13) on the opposing surface is within the range of ρ-1 to 30 mm, preferably 1 to 10 mm.
更に好ましくは１〜５ｍｌｌ１の範囲に設置する。不溶
性陽極（１４）は第１２図、第１３図に示すように大電
流を通電するための銅板（１４）ａ 、 （１４）ｂの
表面全体に鉛（１４）ｃを肉厚２〜１０ｍｍ、好ましく
は３〜７ｍｍの範囲内で一様にアセチレントーヂ等で被
覆してなる。More preferably, it is installed in a range of 1 to 5 ml1. As shown in FIGS. 12 and 13, the insoluble anode (14) is made of copper plates (14)a and (14)b with lead (14)c coated with a thickness of 2 to 10 mm over the entire surface of the copper plates (14)a and (14)b for passing a large current. Preferably, it is coated uniformly with acetylene resin or the like within a range of 3 to 7 mm.
このようにして形成された陰＋５（１）及び不溶性陽極
（１４）との空隙部（１３）に高速流でメッキ液（２３
）を圧入するノズル（１５）を、第１４図に示すように
不溶性陽極（１４）の少なくとら全幅にわたって開口せ
しめ、ノズル（１５）の基部は導管（１６）に連結し、
導管（１６）はポンプ（１７）に連結する。ポンプ（１
７）は更に他の導管を介してメッキ液貯槽（図示せず）
に接続する。ノズル（１５）を設けた不溶性陽極（１４
）の対向辺には不溶性陽極（１４）の少なくとも全幅に
わたって排液口（１８）を設け、導管（１９）に連結す
る。導管（１９）は前記メッキ液貯槽（図示せず）に接
続することにより、ポンプ（１ア）から吐出されたメッ
キ液（２３）、この実施例では、電気鋼メッキ液は導管
（１６）、ノズル（１５）、陰極（１）と不溶性陽極（
１４）との空隙部（１３）、排液口（１８）、導管（１
９）を順次通過してメッキ液貯槽に蓄えられ、ここから
再びポンプ（１７）により吐出され、連続して循環され
る。A high-speed flow of plating solution (23
) is opened over at least the entire width of the insoluble anode (14) as shown in FIG. 14, the base of the nozzle (15) is connected to the conduit (16),
Conduit (16) connects to a pump (17). Pump (1
7) is further connected to a plating solution storage tank (not shown) via another conduit.
Connect to. An insoluble anode (14) provided with a nozzle (15)
) is provided with a drain port (18) over at least the entire width of the insoluble anode (14) and connected to a conduit (19). The conduit (19) is connected to the plating solution storage tank (not shown), so that the plating solution (23) discharged from the pump (1a), in this embodiment, the electrical steel plating solution, is connected to the conduit (16), Nozzle (15), cathode (1) and insoluble anode (
14), the gap (13) with the drain port (18), the conduit (1
9) and stored in a plating solution storage tank, from which it is again discharged by the pump (17) and continuously circulated.
本発明において使用されるメッキ液（２３）は、金属銅
濃度１．０〜２．０ｍｏ（／ Ｑｓ好ましくは１．２〜
１．８ｎｏＱ／ Ｑ、最も好ましくは１．４〜１．．６
ｍｏｆ！／（！。The plating solution (23) used in the present invention has a metallic copper concentration of 1.0 to 2.0 mo(/Qs preferably 1.2 to
1.8noQ/Q, most preferably 1.4-1. ．． 6
mof! /(!.
硫酸を濃度３０〜７０ｇ＃含有する硫酸銅メッキ液で、
ノズル（１５）より高速メッキゾーンへ５５〜７０℃で
、好ましくは６０〜６５℃の液温で供給される。このよ
うな条件を満足する硫酸銅メッキ液を用いることにより
、前記のように不溶性陽極（１４）を使用することがで
き、従って極間距離を一定に保つことができる。それに
より品質の安定、製造工程の一貫性をはかることができ
る。メッキ液温か５５℃以下であると、銅イオンの移動
速度が低下するため電極表面に分極層が生じ易くなり、
メッキ堆積速変が低下する。一方、液温か７０°Ｃを越
えるとメッキ液（２３）の蒸発量が多くなり濃度が不安
定となる。A copper sulfate plating solution containing sulfuric acid at a concentration of 30 to 70 g.
The liquid is supplied from the nozzle (15) to the high speed plating zone at a temperature of 55 to 70°C, preferably 60 to 65°C. By using a copper sulfate plating solution that satisfies these conditions, the insoluble anode (14) can be used as described above, and the distance between the electrodes can therefore be kept constant. This allows for stable quality and consistency in the manufacturing process. If the plating solution temperature is below 55°C, the movement speed of copper ions will decrease, making it easier to form a polarized layer on the electrode surface.
Plating deposition rate decreases. On the other hand, if the liquid temperature exceeds 70°C, the amount of evaporation of the plating liquid (23) increases and the concentration becomes unstable.
メッキ液（２３）はノズル（１５）から電極間空隙部（
１３）へ１．５〜２．５ｍ／ｓｅｅで、好ましくは２ｍ
／ｓｅｃ前後の流速で、かつ乱流状態で供給することに
より、電極表面近傍の金属イオン濃度が極度に低下しな
いように、即ち分極層の生長を抑えて、高速度でメッキ
膜を成長させることが可能となる。The plating solution (23) flows from the nozzle (15) to the interelectrode gap (
13) 1.5-2.5m/see, preferably 2m
By supplying the metal ion at a flow rate of around 1/sec and in a turbulent state, the plating film can be grown at a high speed so that the metal ion concentration near the electrode surface does not decrease excessively, that is, the growth of the polarized layer is suppressed. becomes possible.
本発明におけるメッキ工程では、陰極（１）と不溶性陽
極（］４）との間に、黒鉛、鉛等の耐薬品性、高導電性
を有する給電板（２０）、陽極電源コード（２１）、陰
極電源コード（２２）を介して、０．８〜４．０Ａｍｐ
／Ｃｍ’の高電流をａ電する。In the plating process of the present invention, a power supply plate (20) having chemical resistance such as graphite and lead and high conductivity, an anode power cord (21), 0.8-4.0Amp via cathode power cord (22)
A high current of /Cm' is applied.
以上の操作により、不溶性陽極（１４）に対向する陰極
（１）の表面上の非導電性レジスト膜（７）でマスキン
グしない部分には、毎分２５〜１００μの堆積速度で高
密度の微細結晶構造を有する銅膜を析出することができ
、第３図に示すように導体回路（６）は金属膜（５）と
密着する。このように本発明によれば従来のメッキ技術
の１０〜２００倍という高能率で銅膜を製造することが
でき、実用上極めて大きな意義を有している。By the above operation, high-density fine crystals are formed at a deposition rate of 25 to 100 μ/min on the part of the surface of the cathode (1) facing the insoluble anode (14) that is not masked with the non-conductive resist film (7). A structured copper film can be deposited, and the conductor circuit (6) is in close contact with the metal film (5), as shown in FIG. As described above, according to the present invention, a copper film can be manufactured with a high efficiency of 10 to 200 times that of conventional plating techniques, and has extremely great practical significance.
メッキ工程において陰極（１）表面上の非導電性レジス
ト膜（７）でマスキングしない部分に必要な厚さ、本発
明の主目的とするところでは散（２〜３）μ〜数百（２
００〜３００）μで導体回路（６）が形成された時点で
、通電及びメッキ液（２３）の供給を停止し、導体回路
（６）、非導電性レジスト膜（７）、及び金属膜（５）
と平板状導電材（２）を一体のまま高速メッキ装置（１
１）から取り外す。この状態において平板状導電材（２
）表面には、金属膜（５）が、金属膜（５）表面には、
導体回路（６）及び非導電性レジスト膜（７）が積層さ
れている。導体回路（６）は電気化学的に平滑な金属膜
（５）上に積層するので、ＩＯμ以下の厚さでもピンホ
ールは生じない。In the plating process, the thickness required for the part not masked with the non-conductive resist film (7) on the surface of the cathode (1), which is the main objective of the present invention, ranges from a few (2 to 3) μ to several hundred (2) μ.
00 to 300)μ, the supply of electricity and the plating solution (23) is stopped, and the conductor circuit (6), the non-conductive resist film (7), and the metal film ( 5)
and the flat conductive material (2) are combined into a high-speed plating machine (1).
1) Remove from. In this state, the flat conductive material (2
) on the surface is a metal film (5), on the surface of the metal film (5),
A conductive circuit (6) and a non-conductive resist film (7) are laminated. Since the conductive circuit (6) is electrochemically laminated on the smooth metal film (5), pinholes do not occur even if the thickness is less than IOμ.
ついで、導体回路（６）及び非導電性レジスト膜（７）
表面を水洗後、導体回路（６）の表面処理を行う。表面
処理は、次工程での積層板である絶縁基板（１０）への
導体回路（６）下着後における両者間の密着ノコを確保
するため、導体回路（６）の表面を粗化するために行う
しのであり、例えば電解処理後微細粒子処理をする工程
、次いでバリヤー処理、亜鉛メッキ処理をする工程、次
いて化学処理、防錆処理、カセイソーダ処理をする工程
から成る。導体回路（６）の表面処理により、ホットプ
レス（加熱圧着）後の導体回路（６）と絶縁基板（１０
）との転写による密着力は、平板状導電材（２）と金属
膜（５）との密着力より大となるように制御する。Next, a conductive circuit (6) and a non-conductive resist film (7)
After washing the surface with water, the surface of the conductor circuit (6) is treated. The surface treatment is to roughen the surface of the conductor circuit (6) in order to ensure close contact between the two after the conductor circuit (6) is attached to the insulating substrate (10), which is a laminate in the next process. For example, after electrolytic treatment, it consists of a step of fine particle treatment, then a step of barrier treatment and galvanizing treatment, and then a step of chemical treatment, rust prevention treatment, and caustic soda treatment. By surface treatment of the conductor circuit (6), the conductor circuit (6) and the insulating substrate (10
) is controlled so that the adhesion force due to the transfer is greater than the adhesion force between the flat conductive material (2) and the metal film (5).
表面処理終了後、あるいは表面処理面に非導電性レジス
ト膜（７）を除去する。非導電性レジスト膜（７）の除
去は、レジスト剤として紫外線硬化タイプの液レジスト
、ドライフィルム等を用いたときは、それに適した除去
剤例えば水酸化ナトリウムを主成分としたアルカリ除去
剤などの方法によって行う。レジスト膜（７）の除去後
第４図に示すように絶縁基板（１０）への金属膜（５）
、導体回路（６）の積層及び、第５図に示すように導体
回路（６）絶縁基板へのめり込み即ち、埋設、第６図に
示す陰極（１）の分離を行う。即ち、第・１図に示すよ
うに陰極（１）に１斤出し、表面処理を施した導体回路
（６）に、絶縁基板（１０）を重ねる。絶縁基板（１０
）は有機材料、無機材料いずれでも可能であり、例えば
ガラス、エポキシ、フェノール、ポリイミド、ポリエス
テル、アラミツド等の材料を用いることができるが、加
熱圧着により導体回路（６）が表面から絶縁基板（１０
）へめり込むことが可能な素材構造であることが必要で
ある。この実；恒例ではガラス布基材エポキシ樹、指（
カラス布−エボキシ、ガラス基材エポキシ樹脂銅張積層
板）を使用する。導体回路（６）の絶縁基板（１０）へ
のめり込みは、導体回路（６）より軟らかい素材で絶縁
基板を構成することでめり込み部分の絶縁基板（１０）
全体を押しのける作用によっても、絶縁基板（１０）の
一部中に含浸する作用によってもよい。After the surface treatment is completed or on the surface treatment surface, the non-conductive resist film (7) is removed. To remove the non-conductive resist film (7), when using an ultraviolet curing type liquid resist, dry film, etc. as a resist agent, use a suitable remover such as an alkaline remover containing sodium hydroxide as the main component. Do it by method. After removing the resist film (7), the metal film (5) is applied to the insulating substrate (10) as shown in FIG.
, the conductor circuit (6) is laminated, the conductor circuit (6) is sunk into the insulating substrate as shown in FIG. 5, and the cathode (1) is separated as shown in FIG. That is, as shown in FIG. 1, one loaf is placed on the cathode (1), and the insulating substrate (10) is placed on top of the surface-treated conductor circuit (6). Insulated substrate (10
) can be made of either organic or inorganic materials, such as glass, epoxy, phenol, polyimide, polyester, aramid, etc.;
) The material structure must be such that it can be sunk into the hole. This fruit; customarily, glass cloth base epoxy tree, fingers (
Glass cloth - epoxy, glass base epoxy resin copper clad laminate) is used. To prevent the conductor circuit (6) from sinking into the insulating substrate (10), the insulating substrate (10) is made of a softer material than the conductor circuit (6).
The effect may be to push the entire portion away or to impregnate a portion of the insulating substrate (10).
ただし、用いる絶縁基板（１０）に接着力が期待できな
い時は、絶縁基板（１０）または導体回路（６）金属膜
（５）の表面に接着剤を塗布する。陰極（１）、導体回
路（６）金属膜（５）及びこれと重ねた絶縁基板（１０
）をホットプレスに挿入して加熱圧着し、導体回路（６
）及び金属膜（５）と絶縁基板（１０）を強固に密着せ
しめ、かつ導体回路（６）を第５図に示すように絶縁基
板（１０）にめり込ませ、埋設状態とし、積層板を形成
させた後、陰極（１）から分離する。ホットプレスは１
７０°Ｃ〜２００℃望ましくは１７０℃〜１８０℃の温
度条件で、５５〜７０ｋｇ／ ｃｍ”望ましくは６４ｋ
ｇ／ｃｍ”の圧力で６５〜８５分間望ましくは７５分間
行う。導体回路（６）は金属膜（５）により中方向が支
持されているため、ホットプレス時にも移動することは
ない。このとき、平板状導電材（２）と金属膜（５）と
の間の密着力より金属膜（５）及び導体回路（６）と絶
縁基板（１０）との間の密着力の方が犬であるため、第
６図に示すように、絶縁基板（１０）側には金属膜（５
）及び導体回路（６）が転写される。ついでドリリング
を行う。即ち、所定の位置に第７図に示すように、金属
膜（５）、導体回路（６）、絶縁基板（１０）を貫通し
、電子部品のリード端子の挿入可能な孔（２４）を設け
る。このとき導体回路（６）は、金属膜（５）で支持さ
れろため移動することはない。However, if the insulating substrate (10) used cannot be expected to have adhesive strength, an adhesive is applied to the surface of the insulating substrate (10), conductor circuit (6), or metal film (5). A cathode (1), a conductor circuit (6), a metal film (5), and an insulating substrate (10) stacked thereon.
) is inserted into a hot press and heated and crimped to form a conductor circuit (6
) and the metal film (5) and the insulating substrate (10) are firmly attached, and the conductor circuit (6) is sunk into the insulating substrate (10) as shown in FIG. After forming, it is separated from the cathode (1). Hot press is 1
At a temperature of 70°C to 200°C, preferably 170°C to 180°C, 55 to 70kg/cm”, preferably 64k
It is carried out for 65 to 85 minutes, preferably for 75 minutes, at a pressure of "g/cm". Since the conductor circuit (6) is supported in the middle direction by the metal film (5), it does not move during hot pressing. , the adhesion between the metal film (5) and the conductor circuit (6) and the insulating substrate (10) is stronger than the adhesion between the flat conductive material (2) and the metal film (5). Therefore, as shown in FIG. 6, there is a metal film (5) on the insulating substrate (10) side.
) and the conductor circuit (6) are transferred. Next, do drilling. That is, as shown in FIG. 7, a hole (24) is provided at a predetermined position, penetrating through the metal film (5), the conductor circuit (6), and the insulating substrate (10), into which the lead terminal of the electronic component can be inserted. . At this time, the conductor circuit (6) is supported by the metal film (5) and therefore does not move.
ついで、金属膜（５）を酸等により溶解除去し、第８図
に示すような導体間が正規の絶縁状態となった一導体回
路板を得る。このとき、導体回路（６）の表面は絶縁基
板（１０）表面と同一平面を形成する。酸による処理の
し易さからは金属膜（５）は銅からなることが望ましい
。酸等による金属の除去は、金属＠（５）のみでたり、
平板状導電材（２）に直接回路を形成した時には必要と
される平板状導電材（２）までの酸等による除去は不要
であるので、いわゆるソフトエツチングですみ、工程の
短縮、時間の短縮、平板状導電材（２）の再使用が容易
となる。Then, the metal film (5) is dissolved and removed using acid or the like to obtain a one-conductor circuit board in which the conductors are properly insulated as shown in FIG. At this time, the surface of the conductor circuit (6) forms the same plane as the surface of the insulating substrate (10). The metal film (5) is preferably made of copper in view of ease of treatment with acid. Removal of metal with acid etc. may result in only metal @ (5) being removed,
Since there is no need to remove the flat conductive material (2) with acid, which is required when a circuit is directly formed on the flat conductive material (2), so-called soft etching is sufficient, which shortens the process and time. , the flat conductive material (2) can be easily reused.
ついて、第９図に示すように導体回路（６）及び絶縁基
板（１０）表面の孔（２４）形成部分間に数μ〜数十μ
厚の非導電性レジスト膜（２５０オーバーレイ）を被覆
する。導体回路（６）は、めり込んだ箇所の絶縁基板（
１０）の周囲により両側は挟持され、かつ密着しており
、絶縁基板（１０）３面及び導体回路（６）表面は同一
の平面を形成しているため、非導電性Ｌ／シスト膜（２
５）即ち、オーバーレイを用いる場合、導体回路（６）
との間に空隙を生じて空気が入り込むことはなく、オー
バレイ表面も平面となり導体回路（６）は移動すること
はない。しかして、陰極（１）の平板状導電材（２）表
面から金属膜（５）及び導体回路（６）及び非導電性レ
ジスト膜（７）が分離すて研摩し、再び前記工程を繰り
返すことで導体回路板を形成することが可能となる。導
体回路板の非導電性レジスト膜（２５）は、同−手前と
なった、絶縁基板（１０）表面及び導体回路（６）表面
に被覆されるため、非導電性レジスト膜（２５）自体も
平面状にかけられ、従来例のように谷部を形成すること
はない。そのため、第１０図に示すように電子部品のリ
ード端子（２７）をハンダ（２６）で導体回路（６）に
固定したとき、仮にハンダ（２６）が仮に溢れてら、水
平に横に流れ、非導電性レジスト膜（２５）の谷部表面
に沿って流れるため生ずるブリッジを発生することはな
い。そのためブリッジ防止のための二重のレジストら不
要となる。Accordingly, as shown in FIG.
Apply a thick non-conductive resist film (250 overlay). The conductor circuit (6) is inserted into the insulating substrate (
The non-conductive L/cyst film (2) is sandwiched between both sides by the periphery of the non-conductive L/cyst film (10) and is in close contact with it, and the three surfaces of the insulating substrate (10) and the surface of the conductive circuit (6) form the same plane.
5) That is, when using an overlay, the conductor circuit (6)
There is no air gap created between the conductor circuit (6) and the overlay surface is flat, and the conductor circuit (6) does not move. Then, the metal film (5), conductor circuit (6), and non-conductive resist film (7) are separated from the surface of the flat conductive material (2) of the cathode (1) and polished, and the above steps are repeated again. It becomes possible to form a conductive circuit board with this. Since the non-conductive resist film (25) of the conductive circuit board is coated on the surface of the insulating substrate (10) and the conductive circuit (6), which are in the front, the non-conductive resist film (25) itself is also coated. It is laid flat and does not form valleys as in the conventional example. Therefore, when the lead terminal (27) of an electronic component is fixed to the conductor circuit (6) with solder (26) as shown in Fig. 10, if the solder (26) overflows, it will flow horizontally and become non-conductive. Since it flows along the trough surface of the conductive resist film (25), no bridges occur. This eliminates the need for double resists to prevent bridging.
（へ）発明の効果
本発明による導体回路板の製造方法によれば、非導電性
レノスト膜は、金属膜、導体回路とともに絶縁基板に転
写されるなどして陰極の平板状導電材表面には残らない
ため、平板状導電材からの、ｌｉ、導工性しンスｌ−唖
の除尖は不要となり、平板状導電材の再使用が可能とな
る。更に、導体回路は非導電性レジスト膜間あるいは絶
縁基板間に存し、これら表面と同一平面を形成するため
、絶縁基板への接着オーバレイ工程において、導体回路
とオーバレイとの間に空気が封じられ、導体回路及び接
着剤が酸化することはない。(F) Effects of the Invention According to the method for manufacturing a conductive circuit board according to the present invention, the non-conductive Renost film is transferred to the insulating substrate together with the metal film and the conductive circuit, so that the surface of the flat conductive material of the cathode is Since no residual material remains, it is not necessary to remove the li and conductivity from the flat conductive material, and the flat conductive material can be reused. Furthermore, since the conductive circuit exists between non-conductive resist films or insulating substrates and forms the same plane as these surfaces, air is sealed between the conductive circuit and the overlay during the adhesive overlay process to the insulating substrate. , conductor circuits and adhesives will not oxidize.
導体回路は、このような構造からなるため同時に、導体
回路表面にオーバレイフィルムをロールでかけるときも
、導体回路が移動することもない。更に、導体回路は、
陰極の平板状導電材に被覆した電気化学的に欠陥の無い
金属膜上に電析されるためピンホールを生ずることもな
い。また、導体回路は、金属膜上に密着した後、一体か
つ直接に絶縁板においてホットプレス等により密着、転
写せしめて陰極から分離するため、導体回路に亀裂、シ
ワ等の品質上の欠陥を生ずることがない。Since the conductor circuit has such a structure, the conductor circuit does not move even when the overlay film is rolled over the surface of the conductor circuit. Furthermore, the conductor circuit is
Since it is electrodeposited on an electrochemically defect-free metal film coated on the flat conductive material of the cathode, no pinholes are produced. In addition, after the conductor circuit is adhered to the metal film, it is directly adhered and transferred to the insulating plate by hot pressing and separated from the cathode, which causes quality defects such as cracks and wrinkles in the conductor circuit. Never.
更には、導体回路の製造には高速メッキ技術を用いるた
め、例えば１０μの膜厚を得るのに要するメッキ時間は
、１分乃至それ以下とすることかでき、極めて生産性が
優れている。Furthermore, since high-speed plating technology is used to manufacture the conductor circuit, the plating time required to obtain a film thickness of, for example, 10 μm can be reduced to 1 minute or less, resulting in extremely high productivity.
導体回路板の表面もブリッジ発生防止のためのレジスト
は一層ですみ、二層とする手間は省略される。On the surface of the conductive circuit board, only one layer of resist is required to prevent the occurrence of bridging, and the effort of creating two layers is omitted.
しかして特に高能率、安価に導体回路板を供給すること
ができることに本発明の最大のき義があり、その実用的
価値は極めて大きいHowever, the greatest significance of the present invention lies in its ability to supply conductor circuit boards with particularly high efficiency and at low cost, and its practical value is extremely large.
第１図、第２図、第３図、第４図、第５図、第６図、第
７図、第８図、第９図、第１０図はこの発明の実施例の
断面図、第１１図は同実施例に使用するメッキ装置の正
面断面図、第１２図は同側面断面概略図、第１３図は第
１２図の一部拡大図、第１４図は第１３図Ａ−Ａ断面図
、第１５図、第１６図、第１７図は従来例図である。
（１）・・・・・・陰極、（２）・・・・・・平板状導
電材、（５）・・・・・・金属膜、（６）・・・・・・
導体回路、（７）’・・・・・・非導電性レジスト膜、
（１０）・・・・・・絶縁基板、（１１）・・・・・・
メッキ装置、（１３）・・・・・・空隙部、（１４）・
・・・・不溶性陽極、（２３）・・・・・・メッキ液。
特許出願人 名幸電子工業株式会社
代理人弁理士 安 原 正 ２同
安 原 正 義第１３図
第１４図1, 2, 3, 4, 5, 6, 7, 8, 9, and 10 are cross-sectional views of embodiments of the present invention. Figure 11 is a front sectional view of the plating apparatus used in the same example, Figure 12 is a schematic side sectional view of the same, Figure 13 is a partially enlarged view of Figure 12, and Figure 14 is a cross section taken along line A-A in Figure 13. 15, 16, and 17 are conventional examples. (1)... Cathode, (2)... Flat conductive material, (5)... Metal film, (6)...
Conductive circuit, (7)'... Non-conductive resist film,
(10)...Insulating substrate, (11)...
Plating device, (13)...Gap, (14).
...Insoluble anode, (23) ...Plating solution. Patent applicant: Naiko Electronics Industry Co., Ltd. Representative Patent Attorney Tadashi Yasuhara 2nd Edition
Masayoshi YasuharaFigure 13Figure 14
Claims (3)
極基材表面に金属膜を一体に被覆せしめ、金属膜表面上
の導体回路を形成せしめようとする部分以外の部分には
、非導電性レジスト膜を密着せしめて陰極を構成し、該
メッキ陰極に平行に対向する不溶性陽極を１〜３０ｍｍ
の間隙を有して配置固定し、固定された陰極と不溶性陽
極との間に形成される空隙部にメッキ液を１ｍ／ｓｅｃ
以上の高速度で移動するように供給するとともに、陰極
と陽極との間に０．８〜４．０Ａ／ｃｍ＾２の電流密度
となるように通電し、導体回路形成部分のみに選択的に
金属を高速度で電析せしめ、金属導体が所要の膜厚に達
したところで通電を止めて導体回路を形成し、非導電性
レジスト膜を除去し、導体回路表面に絶縁基板を積層し
、絶縁基板と平板状導電性陰極基材を圧着することで、
導体回路を絶縁基板中にめり込ませるとともに導体回路
及び金属膜を絶縁基板に一体に密着せしめ、金属膜及び
導体回路を一体に陰極材より分離し、金属膜及び導体回
路及び絶縁基板を貫通する孔を所定位置に形成し、導体
回路表面を被覆する最表層金属膜を除去し、孔を形成す
る導体回路部分間の表面には非導電性レジスト膜を形成
することで導体回路板とすることを特徴とする導体回路
板の製造方法。(1) A metal film is integrally coated on the surface of a flat conductive cathode substrate that has rigidity and is fixed to a plating device, and non-conductor is provided on the surface of the metal film other than the part on which a conductive circuit is to be formed. A conductive resist film is adhered to form a cathode, and an insoluble anode facing parallel to the plating cathode is 1 to 30 mm thick.
The plating solution is placed and fixed with a gap between the fixed cathode and the insoluble anode at a rate of 1 m/sec.
At the same time, electricity is supplied so as to move at a high speed of 0.8 to 4.0 A/cm^2 between the cathode and anode, selectively only to the conductor circuit forming part. Metal is deposited at high speed, and when the metal conductor reaches the required film thickness, electricity is stopped to form a conductive circuit, the non-conductive resist film is removed, and an insulating substrate is laminated on the surface of the conductive circuit to form an insulating circuit. By crimping the substrate and the flat conductive cathode base material,
The conductor circuit is sunk into the insulating substrate, the conductor circuit and the metal film are closely attached to the insulating substrate, the metal film and the conductor circuit are separated from the cathode material, and the metal film, the conductor circuit, and the insulating substrate are penetrated. A conductive circuit board is created by forming holes at predetermined positions, removing the outermost metal film covering the conductor circuit surface, and forming a non-conductive resist film on the surface between the conductor circuit parts where the holes are formed. A method of manufacturing a conductive circuit board, characterized by:
の導体回路板の製造方法。(2) The method for manufacturing a conductive circuit board according to claim 1, wherein the crimping is heat crimping.
材は研摩、活性化した後再び同工程を繰り返すことによ
り導体回路を製造する特許請求の範囲第１項、又は第２
項記載の導体回路板の製造方法。(3) The flat conductive cathode base material from which the metal film and the conductor circuit have been separated is polished and activated, and then the same process is repeated again to produce the conductor circuit.
A method for manufacturing a conductive circuit board as described in Section 1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1299587A JPS6379396A (en) | 1987-01-22 | 1987-01-22 | Manufacture of conductor circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1299587A JPS6379396A (en) | 1987-01-22 | 1987-01-22 | Manufacture of conductor circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6379396A true JPS6379396A (en) | 1988-04-09 |
Family
ID=11820786
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1299587A Pending JPS6379396A (en) | 1987-01-22 | 1987-01-22 | Manufacture of conductor circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6379396A (en) |
-
1987
- 1987-01-22 JP JP1299587A patent/JPS6379396A/en active Pending
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