JPS6388895A - Manufacture of conductor circuit plate - Google Patents
Manufacture of conductor circuit plateInfo
- Publication number
- JPS6388895A JPS6388895A JP1045887A JP1045887A JPS6388895A JP S6388895 A JPS6388895 A JP S6388895A JP 1045887 A JP1045887 A JP 1045887A JP 1045887 A JP1045887 A JP 1045887A JP S6388895 A JPS6388895 A JP S6388895A
- Authority
- JP
- Japan
- Prior art keywords
- conductor circuit
- cathode
- conductive
- circuit
- metal film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004020 conductor Substances 0.000 title claims description 102
- 238000004519 manufacturing process Methods 0.000 title claims description 15
- 229910052751 metal Inorganic materials 0.000 claims description 69
- 239000002184 metal Substances 0.000 claims description 69
- 239000000758 substrate Substances 0.000 claims description 41
- 238000007747 plating Methods 0.000 claims description 37
- 238000000034 method Methods 0.000 claims description 23
- 239000000463 material Substances 0.000 claims description 7
- 230000015572 biosynthetic process Effects 0.000 claims description 4
- 238000002788 crimping Methods 0.000 claims description 4
- 239000010406 cathode material Substances 0.000 claims description 2
- 230000005611 electricity Effects 0.000 claims description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 25
- 229910052802 copper Inorganic materials 0.000 description 15
- 239000010949 copper Substances 0.000 description 15
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 10
- 238000004381 surface treatment Methods 0.000 description 10
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 9
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 9
- 239000000853 adhesive Substances 0.000 description 8
- 230000001070 adhesive effect Effects 0.000 description 8
- 239000011889 copper foil Substances 0.000 description 8
- 239000003795 chemical substances by application Substances 0.000 description 5
- 230000007547 defect Effects 0.000 description 5
- 239000011521 glass Substances 0.000 description 5
- 229910052759 nickel Inorganic materials 0.000 description 5
- 239000010935 stainless steel Substances 0.000 description 5
- 229910001220 stainless steel Inorganic materials 0.000 description 5
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N Phenol Chemical compound OC1=CC=CC=C1 ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 description 4
- 239000004642 Polyimide Substances 0.000 description 4
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 4
- 239000002253 acid Substances 0.000 description 4
- 239000007788 liquid Substances 0.000 description 4
- 229920000728 polyester Polymers 0.000 description 4
- 229920001721 polyimide Polymers 0.000 description 4
- 239000001488 sodium phosphate Substances 0.000 description 4
- 229910000162 sodium phosphate Inorganic materials 0.000 description 4
- 239000000126 substance Substances 0.000 description 4
- RYFMWSXOAZQYPI-UHFFFAOYSA-K trisodium phosphate Chemical compound [Na+].[Na+].[Na+].[O-]P([O-])([O-])=O RYFMWSXOAZQYPI-UHFFFAOYSA-K 0.000 description 4
- 238000005238 degreasing Methods 0.000 description 3
- 238000000151 deposition Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 239000004593 Epoxy Substances 0.000 description 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 2
- 229910001069 Ti alloy Inorganic materials 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- 239000002585 base Substances 0.000 description 2
- 238000003486 chemical etching Methods 0.000 description 2
- 229910000365 copper sulfate Inorganic materials 0.000 description 2
- ARUVKPQLZAKDPS-UHFFFAOYSA-L copper(II) sulfate Chemical compound [Cu+2].[O-][S+2]([O-])([O-])[O-] ARUVKPQLZAKDPS-UHFFFAOYSA-L 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 239000004744 fabric Substances 0.000 description 2
- 229910000040 hydrogen fluoride Inorganic materials 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 238000007639 printing Methods 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 238000003860 storage Methods 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- MTJGVAJYTOXFJH-UHFFFAOYSA-N 3-aminonaphthalene-1,5-disulfonic acid Chemical compound C1=CC=C(S(O)(=O)=O)C2=CC(N)=CC(S(O)(=O)=O)=C21 MTJGVAJYTOXFJH-UHFFFAOYSA-N 0.000 description 1
- DDFHBQSCUXNBSA-UHFFFAOYSA-N 5-(5-carboxythiophen-2-yl)thiophene-2-carboxylic acid Chemical compound S1C(C(=O)O)=CC=C1C1=CC=C(C(O)=O)S1 DDFHBQSCUXNBSA-UHFFFAOYSA-N 0.000 description 1
- YKFRAOGHWKADFJ-UHFFFAOYSA-N Aramite Chemical compound ClCCOS(=O)OC(C)COC1=CC=C(C(C)(C)C)C=C1 YKFRAOGHWKADFJ-UHFFFAOYSA-N 0.000 description 1
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- JPVYNHNXODAKFH-UHFFFAOYSA-N Cu2+ Chemical compound [Cu+2] JPVYNHNXODAKFH-UHFFFAOYSA-N 0.000 description 1
- PEDCQBHIVMGVHV-UHFFFAOYSA-N Glycerine Chemical compound OCC(O)CO PEDCQBHIVMGVHV-UHFFFAOYSA-N 0.000 description 1
- 229910000990 Ni alloy Inorganic materials 0.000 description 1
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- 229910001096 P alloy Inorganic materials 0.000 description 1
- 241000282806 Rhinoceros Species 0.000 description 1
- 230000002378 acidificating effect Effects 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 239000003513 alkali Substances 0.000 description 1
- HSFWRNGVRCDJHI-UHFFFAOYSA-N alpha-acetylene Natural products C#C HSFWRNGVRCDJHI-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229910001431 copper ion Inorganic materials 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000004070 electrodeposition Methods 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 238000005868 electrolysis reaction Methods 0.000 description 1
- 125000002534 ethynyl group Chemical group [H]C#C* 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 239000010419 fine particle Substances 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- 238000005246 galvanizing Methods 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010439 graphite Substances 0.000 description 1
- 229910002804 graphite Inorganic materials 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000007731 hot pressing Methods 0.000 description 1
- 238000007654 immersion Methods 0.000 description 1
- 229910010272 inorganic material Inorganic materials 0.000 description 1
- 239000011147 inorganic material Substances 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 229910000765 intermetallic Inorganic materials 0.000 description 1
- JEIPFZHSYJVQDO-UHFFFAOYSA-N iron(III) oxide Inorganic materials O=[Fe]O[Fe]=O JEIPFZHSYJVQDO-UHFFFAOYSA-N 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 229910021645 metal ion Inorganic materials 0.000 description 1
- 229910017604 nitric acid Inorganic materials 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- OFNHPGDEEMZPFG-UHFFFAOYSA-N phosphanylidynenickel Chemical compound [P].[Ni] OFNHPGDEEMZPFG-UHFFFAOYSA-N 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 239000011148 porous material Substances 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000005204 segregation Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
- 238000005406 washing Methods 0.000 description 1
- 230000037303 wrinkles Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
（イ）産業上の利用分野
この発明は導体回路板、詳細に（Ｊ、導体回路を電気メ
ッキ等により、銅、ニッケル、ニッケル合金、その他の
金属で形成し、絶縁）、（板に一体に密着せしｙ）ろ導
体回路板の製造方法に係る。Detailed Description of the Invention (a) Industrial Application Field This invention relates to a conductor circuit board, in detail (J) a conductor circuit board formed of copper, nickel, nickel alloy, or other metal by electroplating or the like, and insulated. ), relates to a method of manufacturing a filter conductor circuit board (integrated into close contact with a board).
（ロ）従来の技術
（従来例１）
従来、プリン）・回路板を製造するには、フェノール、
ガラスエポキシ樹脂等の非導電基板（絶縁基板）に、１
８または３５μ、またはそれ以−にの膜厚を有する銅環
金属箔を一体に接着せしめ、該銅箔表面のプリント回路
構成部のみにフォトレジスト或いは印刷レジストを密着
させ、不要な銅（露出部）を適当なエッチャントで溶解
除去する方法が知られている。(b) Conventional technology (conventional example 1) Conventionally, phenol,
1 on a non-conductive substrate (insulating substrate) such as glass epoxy resin.
A copper ring metal foil having a film thickness of 8 or 35 μm or more is bonded together, and a photoresist or printing resist is adhered only to the printed circuit components on the surface of the copper foil, removing unnecessary copper (exposed parts). ) is dissolved and removed using an appropriate etchant.
（従来例２）
他方、金属製回転トラム又は金属製回転ドラノ、・の周
囲を摺動する金属製ベルトの金属表面−ににレジスト剤
でマスクを施し、ついで金属製回転ドラム又は金属製ベ
ルトをメッキ陰極とし、対向する陽極との間に電流を通
ずることにより金属製回転ドラム又は金属製ベル］・表
面に銅を電析せしめ、プリント回路板用導体回路を製造
する方法が知られている（「プリント回路板用導体回路
の製造方法」特公昭５５−３２２３８（ＵＳＰ、４，０
５３．＋（７０））。(Conventional Example 2) On the other hand, the metal surface of the metal belt that slides around the metal rotating tram or metal rotating drum is masked with a resist agent, and then the metal rotating drum or metal belt is A metal rotating drum or metal bell is used as a plating cathode and a current is passed between the opposing anode] - A method of manufacturing a conductor circuit for printed circuit boards by electrodepositing copper on the surface is known ( “Method for manufacturing conductor circuits for printed circuit boards” Japanese Patent Publication No. 55-32238 (USP, 4.0
53. +(70)).
同法により得られた導体回路から導体回路板を作製する
？こは、金属ドラム又は金属ベルト−Ｌの導体回路にポ
リエステル、ポリイミド、フェノール等目的に応して選
定した絶縁基板を、必要に応じて接着剤を介して強固に
接石せしめた後、金属ドラノ、又は金属ヘルドから分離
し、次いでオーバーレイを被覆して導体回路を得る。Is it possible to make a conductor circuit board from the conductor circuit obtained by the same method? In this case, an insulating substrate made of polyester, polyimide, phenol, etc. selected according to the purpose is firmly attached to the conductor circuit of the metal drum or metal belt L, using an adhesive as necessary, and then a metal drum is attached. , or separated from the metal heald and then coated with an overlay to obtain a conductor circuit.
（ハ）発明が解決しようとケる問題点
（従来例１）
現在プリント回路基板の製造方法として最も多用されて
いる従来例１においては、銅箔製造後の表面処理、切断
、絶縁基板への積層等の工程において、単体としての銅
箔に加えられる引張力、折り曲げ力に耐える銅箔厚さで
ある１８μ以上の箔を用いな（」ればならない１、しか
るに近年、各種装置、機器を薄型、小型化する傾向は極
めて強くなってきており、従ってこれらに用いられるプ
リント回路基板についても同様なことが言える。ちなみ
にプリン！・回路導体を形成する銅箔の厚さは５〜１０
μ程度が要求されてはいるが、上記のような理由により
この要求は未だ満足されていない状況にある。一方、膜
厚が５０〜１５０μ程度の厚銅箔を選択的にエツチング
してプリント回路とする用途もみられる。その好例は、
小型モータであり、従来の銅巻線コイルの代わりにポリ
エステル、ポリイミド等の絶縁基板に接石剤により積層
した銅箔の導体回路とする部分以外の部分をエツチング
により除去したいわゆるシート状コイルを用いるもので
ある。(c) Problems to be solved by the invention (Conventional Example 1) In Conventional Example 1, which is currently most frequently used as a method for manufacturing printed circuit boards, surface treatment, cutting, and insulating substrate processing after copper foil manufacturing are performed. In processes such as lamination, it is necessary to use copper foil with a thickness of 18μ or more, which is able to withstand the tensile and bending forces applied to the copper foil as a single piece.1 However, in recent years, various devices and equipment have been made thinner. The trend toward miniaturization is becoming extremely strong, and the same can be said for the printed circuit boards used for these.By the way, the thickness of the copper foil that forms the circuit conductors is 5 to 10 mm.
Although approximately μ is required, this requirement has not yet been met for the reasons mentioned above. On the other hand, there are also applications in which thick copper foils having a film thickness of about 50 to 150 microns are selectively etched to form printed circuits. A good example is
This is a small motor, and instead of the conventional copper-wound coil, it uses a so-called sheet-like coil, which is made by etching away the parts other than the conductor circuit of the copper foil laminated with a contact agent on an insulating substrate made of polyester, polyimide, etc. It is something.
この工法においては、少なくとも５０μ以上の膜厚をＹ
了する銅箔をエツチングしなければならならず、エツチ
ングに要する時間が長くなるため導体端部の寸法精度が
低下するという品質１−の問題と同時に製造コストも高
くなるという大きな難点がある。In this method, Y
The copper foil that is to be etched must be etched, which increases the time required for etching, resulting in a quality problem in that the dimensional accuracy of the conductor ends decreases, and at the same time, there is a major drawback in that the manufacturing cost increases.
（従来例２）
従来例２では、導体回路形成に使用するレジスト膜は、
メッキにおけろ陰極表面からの離脱を防止するため陰極
側表面に強固に固定する必要があり、そのためレジスト
膜は導体回路の陰極表面からの剥離後も陰極に残存する
。そこで陰極を再使用するにはレノストを除去する必要
があり、陰極に残ったレジストは、スコッヂブライト、
研摩剤等によって削り取る。しかし、物理的に研摩をす
ると、陰極として例えばステンレススヂールを用いる場
合等は、表面が加工硬化して、再加ｔはしにくくなる問
題点を有する。(Conventional Example 2) In Conventional Example 2, the resist film used for forming the conductor circuit is
In plating, it is necessary to firmly fix the resist film to the cathode surface in order to prevent it from separating from the cathode surface, and therefore the resist film remains on the cathode even after the conductor circuit is peeled off from the cathode surface. Therefore, in order to reuse the cathode, it is necessary to remove the renost, and the resist remaining on the cathode is
Scrape it off with an abrasive, etc. However, when physically polished, for example when stainless steel is used as the cathode, there is a problem that the surface becomes work-hardened, making it difficult to reapply.
更に、第１３図に断面を示すように、従来得られる導体
回路板においては、絶縁基板（３１）上に、銅からなる
回路（３２）部分のみが突設して形成されている。その
ため、オーバーレイフィルム（３３）を回路（３２）−
１−、から密着せしめる場合には、フィルムは回路（３
２）の外周面に全て密着することはできず、オーバレイ
フィルム（３３）及び回路（３２）で形成される空気を
封大した空間部（３４）を生ずる。そして、オーバーレ
イは一般に加熱して行うため、銅からなる回路（３２）
及び接着剤は加熱されながら空気に触れるため、更には
経時によっても酸化する問題点を有する。Further, as shown in cross section in FIG. 13, in the conventional conductor circuit board, only a circuit (32) made of copper is formed protrudingly on an insulating substrate (31). Therefore, the overlay film (33) is connected to the circuit (32)-
1-, when the film is placed in close contact with the circuit (3
2), and a space (34) formed by the overlay film (33) and the circuit (32) is created. And since the overlay is generally done by heating, a circuit made of copper (32)
Since the adhesive is exposed to air while being heated, it also has the problem of oxidizing over time.
更に、オーバーレイフィルムをかけるときは、同じく第
１３図に示すようにロール（３５）によって、絶縁基板
（３１）、回路（３２）、オーバーレイフィルム（３３
）を挟んで押圧して行う。しかるに従来は、回路（３２
）は、絶縁基板（３１）から回路部分のみ突設して設置
し、かつ回路（３２）と絶縁基板（３１）とは接着剤で
固定されているにすぎないため、ローラ（３５）の当接
により、回路（３２）は図中各矢示方向へ移行する問題
点をイイする。更に、従来法により得られた導体回路か
ら導体回路板を作製するには、金属ドラ１１よたは金属
ベルｌ−Ｊ−の導体回路にポリエステル、ポリイミド、
フェノール等目的に応じて選定した絶縁基板を、必要に
応じて接着剤を介して強固に密着せしめた後、金属ドラ
ムまたは金属ベルトから分ＮＦシ、次いてオーバーレイ
を被覆して導体回路板を得るため、分離工程でシワや折
れ、月痕、裂＋Ｊ１−１等を生ずる問題点を有する。Furthermore, when applying the overlay film, as shown in FIG. 13, the insulating substrate (31), the circuit (32), and the overlay film (33
) and press it. However, conventionally, the circuit (32
) is installed so that only the circuit part protrudes from the insulating substrate (31), and the circuit (32) and the insulating substrate (31) are only fixed with adhesive, so the roller (35) does not touch the circuit. Due to the connections, the circuit (32) solves problems that move in the directions of the arrows in the figure. Furthermore, in order to produce a conductor circuit board from a conductor circuit obtained by the conventional method, polyester, polyimide,
After firmly adhering an insulating substrate selected according to the purpose, such as phenol, using an adhesive as necessary, a metal drum or metal belt is coated with an NF sheet, and then covered with an overlay to obtain a conductive circuit board. Therefore, there are problems in that wrinkles, folds, moon marks, cracks +J1-1, etc. occur during the separation process.
に）問題点を解決するための手段
この発明は、剛性を有しメッキ装置に固定する平板状導
電性陰極基＋４表面に金属膜を一体に被覆せしめ、金属
膜表面１−の導体回路を形成比しめようとｔろＩπζ分
以外の部分には、非導電性レジスト膜を密着せしめて陰
極を構成し、該メッキ陰極に平行に対向する不溶性陽極
を１〜３０ｍｍの間隙を有して配置固定し、固定された
陰極と不溶性陽極との間に形成される空隙部にメツキ液
を１ｍ／ｓｅｃ以−１−の高速度で移動するように供給
するとともに、陰極と陽極との間に０．８〜４．０へ／
ｃｍ２の電流密度となるように通電し、導体回路π釣友
部分のみに選択的に金属を高速度で電析せしめ、金属導
体が所要の膜厚に達したところで通電を１１−めで導体
回路を形成し、非導電性レジスト膜を＝７−
除去し、導体回路表面に絶縁基板を積層し、絶縁基板と
平板状導電性陰極基材を圧着することで、導体回路を絶
縁基板中にめり込ませろとともに導体回路及び金属膜を
絶縁基板に一体に密着せしめ、金属膜及び導体回路を一
体に陰極材より分離し、導体回路表面を被覆する最表層
金属膜を除去して導体回路板とすることを特徴とする導
体回路板の製造方法を提供することで従来の問題点を除
去する。B) Means for Solving the Problems This invention provides a method for forming a conductor circuit on the metal film surface 1 by integrally covering the surface of the flat conductive cathode base +4, which has rigidity and is fixed to the plating apparatus, with a metal film. For comparison, a non-conductive resist film is closely adhered to the portion other than the portion of Iπζ to form a cathode, and an insoluble anode facing parallel to the plating cathode is arranged and fixed with a gap of 1 to 30 mm. Then, the plating solution is supplied to the gap formed between the fixed cathode and the insoluble anode at a high speed of 1 m/sec or more, and at the same time, the plating solution is supplied to the gap formed between the fixed cathode and the insoluble anode. 8 to 4.0/
Electrification is applied to a current density of cm2, and metal is selectively deposited at high speed only on the π-fishing part of the conductor circuit. When the metal conductor reaches the required film thickness, energization is applied to the conductor circuit at the 11th point. The conductive circuit is embedded into the insulating substrate by forming the non-conductive resist film, removing the non-conductive resist film, laminating an insulating substrate on the surface of the conductive circuit, and crimping the insulating substrate and the flat conductive cathode substrate. At the same time, the conductor circuit and the metal film are tightly attached to the insulating substrate, the metal film and the conductor circuit are separated from the cathode material, and the outermost metal film covering the surface of the conductor circuit is removed to obtain a conductor circuit board. By providing a method for manufacturing a conductor circuit board characterized by the following, conventional problems are eliminated.
（ホ） 実 施 例
次に本発明の詳細を実施例図面に基づき説明する。１本
発明に使用する陰極（＋）の平板状導電材（２）は、剛
性を有するに足る肉厚（通常５〜１０ｍｍ）で、例えば
１０００Ｘ １．０００ｍｍの平板状導電材からなり、
メッキ工程で使用する薬品に対ずろ耐薬品性、耐電食性
を有することが望ましいことから一般的にはステンレス
スチール、ニッケル等を研摩したものである。第１図に
断面を示すように、陰極（１）のステンレススチール、
ニッケル板等からなる平板状導電材（２）中には、電気
化学的欠陥部（３）、（４）が存−４゛る。(E) Example Next, details of the present invention will be explained based on the drawings of the example. 1 The flat conductive material (2) of the cathode (+) used in the present invention is made of a flat conductive material with a wall thickness sufficient to have rigidity (usually 5 to 10 mm), for example, 1000 x 1.000 mm,
It is generally made of polished stainless steel, nickel, etc., as it is desirable to have chemical resistance and electrolytic corrosion resistance to the chemicals used in the plating process. As shown in the cross section in Figure 1, the stainless steel cathode (1);
Electrochemical defects (3) and (4) are present in the flat conductive material (2) made of a nickel plate or the like.
電気化学的欠陥部（３）、（４）は、金属間化合物、或
いは非金属介在物、偏析、気孔からなり、ステンレスス
チールの形成過程で混入生成されたものであり、周囲と
電気化学的性質を異にし、従って平板状導電材（２）表
面にそのまま電析させると、ピンホールを生ずるという
問題点がある。Electrochemical defects (3) and (4) consist of intermetallic compounds, non-metallic inclusions, segregation, and pores, and are generated during the formation process of stainless steel, and are caused by the electrochemical properties of the surroundings. Therefore, if electrodeposition is made directly on the surface of the flat conductive material (2), pinholes will occur.
更には、従来例２で述べたごとく、メッキ陰極表面上に
直接レジストを形成ｕしめてメッキにより導体回路を製
作する工法においては、メッキ時の陰極表面からのレジ
ストの脱離を防止するため、陰極レジスト間の密着を強
固にする必要があり、その結果レンス）・は、導体回路
の陰極表面からの分離後ム陰極側に残存し、それによっ
て特に製品の品質にかかわる問題点を内在している。Furthermore, as described in Conventional Example 2, in the method of forming a resist directly on the surface of the plating cathode and manufacturing a conductor circuit by plating, the cathode It is necessary to strengthen the adhesion between the resists, and as a result, after the conductor circuit is separated from the cathode surface, the resist (resist) remains on the cathode side, which poses problems particularly related to product quality. .
本発明においては、１−記二つの問題点を同時に解消す
るため、平板状導電＋Ａ（２）表面にｒめ金属膜（５）
を−様に形成比しめる。金属膜（５）ｉＪ専７ｆＸ体で
あればよい。金属膜（５）を形成比しめるには、まず平
板状導電材（２）表面に前処理を施す。前処理は平板状
導電材（２）表面の汚れ、酸化皮膜を除去するとともに
、平板状導電材（２）表面と該表面−Ｌに形成比しめる
金属膜（５）の界面（８）、及び第３図に示すごとく金
属膜（５）表面と該表面上に形成比しめる導体回路（６
）及び非導電性レジスト膜（７）との界面（９）の密着
力の差を生ぜしめ、界面（９）の密着力が界面（８）の
密着力よりも犬となるようにすることを目的とする。In the present invention, in order to solve the two problems described in 1- at the same time, a metal film (5) is provided on the surface of the flat conductive +A (2).
Compare the formation as -. Metal film (5) It is sufficient if it is an iJ-only 7fX body. To compare the formation of the metal film (5), first, the surface of the flat conductive material (2) is pretreated. The pretreatment removes dirt and oxide film on the surface of the flat conductive material (2), and also removes the interface (8) between the surface of the flat conductive material (2) and the metal film (5) to be formed on the surface -L, and As shown in Figure 3, the surface of the metal film (5) and the conductor circuit (6) formed on the surface are compared.
) and the non-conductive resist film (7), so that the adhesion force of the interface (9) is stronger than the adhesion force of the interface (8). purpose.
平板状導電材としてステンレススチールを用いろ場合は
例えば次ぎに述べるような表面処理を施せばよい。まず
、硫酸二８０〜ｉｏａｍｇ／ａ１６０〜７０℃で、１０
〜３０分かけてスケール除去を行う。ついで水洗し、硝
酸：６０〜］、００ｍ１２＃！１３０！７／ρ酸性フツ
化アンモニウムにより室温下で１０〜３０分スマット除
去する。ついで水洗し、リン酸ナトリウム２０〜５０９
７ρ、水酸化ナトリウム５０ｉ？＃、３〜８Ａ／ｄｍ’
、室温〜４０℃の条件下で１〜２分陰極電解脱脂４−る
。表面処理の各工程の時間、温度、濃度条件を変えろご
とて、金属膜（５）との密着力の強弱を一ノ（）、平板
状導電材（２）と金属膜（５）間の密着力と、金属膜（
５）と導体回路（６）及び非導電性レノスト膜（７）間
の密着力との相対的な密着力の違いを生計゛しむる３゜
同様に、平板状導電材（２）としてニッケルを用いた場
合は例えば以下のような表面処理をおこなう。If stainless steel is used as the flat conductive material, the following surface treatment may be applied, for example. First, sulfuric acid di-80-ioamg/a at 160-70°C,
Descaling takes ~30 minutes. Then, wash with water, nitric acid: 60~], 00m12#! Smut is removed with 130!7/ρ acidic ammonium fluoride at room temperature for 10 to 30 minutes. Then wash with water and add sodium phosphate 20-509
7ρ, sodium hydroxide 50i? #, 3~8A/dm'
, cathodic electrolytic degreasing for 1 to 2 minutes at room temperature to 40°C. By changing the time, temperature, and concentration conditions of each surface treatment step, the strength of the adhesion with the metal film (5) can be determined (), and the adhesion between the flat conductive material (2) and the metal film (5) can be adjusted. force and metal film (
In the same way, nickel was used as the flat conductive material (2). When used, the following surface treatment is performed, for example.
即ち、リン酸ナトリウム２０〜５０ｙ／９、水酸化ナト
リウム５０ｇ＃、３−８Ａ／ｄｍ２、室温〜４０°Ｃの
条件下で１〜２分陰極電解脱脂を行う。ついで水洗し、
フッ化水素１〜１０９／ρ、５０℃で１〜１０分の条件
下、または、塩酸： １５０ｍ１２／ρの、５０℃、１
〜１０分の条件下で活性化し、ついで水洗（、，４０〜
６０℃の温水水洗をおこなう。平板状導電材（２）とし
てチタン及びチタン合金を用いる場合は例えば以下のよ
うな表面処理を行う。That is, cathodic electrolytic degreasing is performed for 1 to 2 minutes under the conditions of 20 to 50 y/9 sodium phosphate, 50 g of sodium hydroxide, 3 to 8 A/dm2, and room temperature to 40°C. Then wash with water,
Hydrogen fluoride 1-109/ρ, 1-10 minutes at 50°C, or hydrochloric acid: 150 m12/ρ, 50°C, 1
Activate under conditions for ~10 minutes, then wash with water (,40 ~
Wash with warm water at 60°C. When using titanium and titanium alloy as the flat conductive material (2), the following surface treatment is performed, for example.
即ち、まず、リン酸ナトリウム２０〜５０１／／Ｌ ５
０〜６０℃の条件下で３〜５分アルカリ浸漬脱；旧を行
う。ついで水洗し、活性化を行う。活性化は、化学エツ
チングににり行う。化学エツチングは２５％ＨＦ、７５
％ＨＮ ０３により、純チタン、又はチタン合金につい
て行う。That is, first, sodium phosphate 20-501//L 5
Alkaline immersion is carried out under conditions of 0 to 60°C for 3 to 5 minutes. Then wash with water and activate. Activation is performed by chemical etching. Chemical etching: 25% HF, 75
%HN03 on pure titanium or titanium alloys.
平板状導電材（２）として銅または銅合金を用いる場合
は、まずリン酸ナトリウム２０〜５０ｇ／ρ、５０〜６
０℃、３〜１０Δ／ｄｍ２の条件下で３０秒〜２分間、
電解し、陰極電解脱脂する。ついで水洗し、フッ化水素
１〜１０９／１２、室温下で３０秒〜２分間酸洗いし、
ついで水洗して行う。このように表面処理した平板状導
電材（２）表面に金属膜（５）を積層する。３金属膜（
５）は、銅、ニッケル、ニッケルーリン合金等を用いる
ことができる。これら金属薄層は、電気メッキ、無電解
メッキ、蒸着、スパッタリング等により、０．１〜数μ
（２〜３７１）犀で積層する。ここにおいて、平板状導
電材（２）表面にピンホール等の物理的欠陥が存在せず
、又電気化学的欠陥も存在しない電気化学的に一様にし
て適度の密着力を有する金属膜（５）を積層する陰極（
１）を得る。When using copper or copper alloy as the flat conductive material (2), first add sodium phosphate 20 to 50 g/ρ, 50 to 6
30 seconds to 2 minutes at 0°C and 3 to 10Δ/dm2,
Electrolyze and cathode electrolysis degreasing. Then washed with water, pickled with hydrogen fluoride 1 to 109/12 at room temperature for 30 seconds to 2 minutes,
Then wash with water. A metal film (5) is laminated on the surface of the flat conductive material (2) that has been surface-treated in this manner. 3 Metal film (
For 5), copper, nickel, nickel-phosphorus alloy, etc. can be used. These metal thin layers are formed by electroplating, electroless plating, vapor deposition, sputtering, etc.
(2-371) Laminated with rhinoceros. Here, the surface of the flat conductive material (2) has no physical defects such as pinholes and no electrochemical defects, and is electrochemically uniform and has an appropriate adhesive strength (5). ) is stacked on the cathode (
1) is obtained.
１２一
ついで、金属膜（５）表面に第２図に示すように非導電
性レジスト膜（７）を固定する。非導電性レジスト膜（
７）は、フ、ｌ］・レジスト法、印刷法等により、必要
とされる回路以外の部分をレジスト剤でマスクする。12, a non-conductive resist film (7) is fixed on the surface of the metal film (5) as shown in FIG. Non-conductive resist film (
7) Masks the parts other than the required circuit with a resist agent by a resist method, a printing method, or the like.
この陰極（１）を、第９図、第１０図に示すメッキ装置
（１１）のフレーム（１２）の」二部中央に水平に設置
した銅と鉛から成る板状不溶性陽極（１４）に、金属膜
（５）非導電性レジスト膜（７）の表面を向けて平行に
対向させで固定し、陰極（１）及び不溶性陽極（１４）
の対向面の空隙部（Ｉ３）をａ−］ 〜３０ｍｍの範囲
内に、好ましく ＩＪ： １〜１０ｍｍ。This cathode (1) is attached to a plate-shaped insoluble anode (14) made of copper and lead installed horizontally in the center of the second part of the frame (12) of the plating apparatus (11) shown in FIGS. 9 and 10. A metal film (5) and a non-conductive resist film (7) are fixed with their surfaces facing each other in parallel, and a cathode (1) and an insoluble anode (14) are fixed.
The gap (I3) on the opposing surface is within the range of a-] to 30 mm, preferably IJ: 1 to 10 mm.
更に好ましくは１〜５ｍｍの範囲に設置４′る。不溶性
陽極（１４）は第１０図、第１１図に示すように大電流
を通電するための銅板（１４）ａ 、 （１４）ｂの表
面全体に鉛（１４）ｃを肉７２〜１０ｍｍ、好まシくハ
３〜７ｍｍの範囲内で−・様にアセチレントーヂ等で被
覆してなる。More preferably, it is set in a range of 1 to 5 mm. As shown in FIGS. 10 and 11, the insoluble anode (14) is made by applying lead (14)c to a thickness of 72 to 10 mm over the entire surface of copper plates (14)a and (14)b for passing large currents. It is coated with acetylene resin or the like within the range of 3 to 7 mm.
このようにして形成された陰極（１）及び不溶性陽極（
１４）との空隙部（１３）に高速流でメッキ液（２３）
を圧入するノズル（１５）を、第１２図に示ｄ−，１う
に不溶性陽極（１４）の少なくとも全幅にわたー）で開
口せしめ、ノズル（１５）の基部は導管（１６）に連結
し、導管（１６）はポンプ（１７）に連結する。ポンプ
（１７）は更に他の導管を介してメッキ液貯槽（図示せ
ず）に接続する。ノズル（１５）を設けた不溶性陽極（
１４）の対向辺には不溶ヤ１陽極（１４）の少なくとも
全幅にわたって排液１］ （１８）を設け、導管（１９
）に連結する。導管（１９）は前記メッキ液貯槽（図示
せず）に接続することにより、ポンプ（１７）から吐出
されたメッキ液（２３）、この実施例では、電気銅メッ
キ液は導管（１６）、ノズル（１５）、陰極（１）と不
溶性陽極（１４）との空隙部（１３）、排液口（１８）
、導管（１９）を順次通過してメッキ液貯槽に蓄えられ
、ここから再びポンプ（］］７により吐出され、連続し
て循環される。The cathode (1) and insoluble anode (
Plating solution (23) is applied in a high-speed flow to the gap (13) between
A nozzle (15) for press-fitting the insoluble anode (14) is opened at least over the entire width of the insoluble anode (14) as shown in FIG. Conduit (16) connects to a pump (17). The pump (17) is further connected to a plating solution reservoir (not shown) via another conduit. An insoluble anode (
On the opposite side of the insoluble layer 1 anode (14), a drainage liquid 1] (18) is provided over at least the entire width of the insoluble layer 1 anode (14), and a conduit (19) is provided.
). The conduit (19) is connected to the plating solution storage tank (not shown), so that the plating solution (23) discharged from the pump (17), in this embodiment, the electrolytic copper plating solution, is connected to the conduit (16) and the nozzle. (15), gap between cathode (1) and insoluble anode (14) (13), drain port (18)
, the conduit (19) and stored in the plating solution storage tank, from which it is again discharged by the pump (]]7 and continuously circulated.
本発明において使用されるメッキ液（２３）は、金属銅
濃度１．０〜２．０ｍｏＣ／ Ｑ、好ましくは１２〜１
．８ｍｏρ／１２、最も好ましくは１．４〜１．６ｍｏ
ｆ２／ρ、硫酸を濃度３０〜７０ｇ＃含有する硫酸銅メ
ッキ液で、ノズル（１５）より高速メッキゾーンへ５５
〜７０℃で、好ましくは６０〜６５℃の液温で供給され
る。このような条件を満足する硫酸銅メッキ液を用いる
ことにより、前記のように不溶性陽極（１４）を使用す
ることができ、従って極間距離を−・定に保つことがで
きる。それにより品質の安定、製造工程の一貫性をはか
ることができる。メッキ液温か５５℃以下であると、銅
イオンの移動速度が低下するため電極表面に分極層が生
じ易くなり、メッキ堆積速度が低下する。一方、液温か
７０℃を越えるとメッキ液（２３）の蒸発量が多くなり
濃度が不安定となる。The plating solution (23) used in the present invention has a metallic copper concentration of 1.0 to 2.0 moC/Q, preferably 12 to 1
．． 8moρ/12, most preferably 1.4-1.6mo
f2/ρ, copper sulfate plating solution containing sulfuric acid at a concentration of 30 to 70 g #55 from the nozzle (15) to the high-speed plating zone.
The liquid temperature is supplied at ~70°C, preferably 60-65°C. By using a copper sulfate plating solution that satisfies these conditions, the insoluble anode (14) can be used as described above, and the distance between the electrodes can therefore be kept constant. This allows for stable quality and consistency in the manufacturing process. If the plating solution temperature is 55° C. or lower, the moving speed of copper ions decreases, making it easier to form a polarized layer on the electrode surface, resulting in a decreased plating deposition rate. On the other hand, if the liquid temperature exceeds 70°C, the amount of evaporation of the plating liquid (23) increases and the concentration becomes unstable.
メッキ液（２３）はノズル（１５）から電極間空隙部（
１３）へ］、、５〜２．５ｍ／ｓｅｃで、好ましくは２
ｍ／ｓｅｃ前後の流速で、かつ乱流状態で供給すること
により、電極表面近傍の金属イオン濃度が極度に低下し
、ないように、即ち分極層の生長を抑えて、高速度でメ
ッキ膜を成長さ１」ることが可能となる。The plating solution (23) flows from the nozzle (15) to the interelectrode gap (
13)], 5 to 2.5 m/sec, preferably 2
By supplying the metal ion concentration near the electrode surface in a turbulent state at a flow rate of around m/sec, the plating film can be formed at a high speed while suppressing the growth of the polarized layer. It becomes possible to grow 1".
本発明におけるメッキ工程では、陰極（１）と不溶性陽
極（１４）との間に、黒鉛、鉛等の耐薬品性、高導電性
を有する給電板（２０）、陽極電源コード（２１）、陰
極電源コード（２２）を介して、０．８〜４，０＾ｍｐ
／ｃｍ２の高電流を通電する。In the plating process of the present invention, between the cathode (1) and the insoluble anode (14), a power supply plate (20) having chemical resistance such as graphite or lead and high conductivity, an anode power cord (21), and a cathode 0.8~4,0^mp via power cord (22)
A high current of /cm2 is applied.
以上の操作により、不溶性陽極（１４）に対向する陰極
（１）の表面上の非導電性レジスト膜（７）でマスキン
グしない部分には、毎分２５〜１００Ｊｌの堆積速度で
高密度の微細結晶構造を有する銅膜を析出することがで
き、第３図に示ずにうに導体回路（６）は金属膜（５）
と密着する。この、ｊこうに本発明によれば従来のメッ
キ技術の１０〜２００倍という高能率で銅膜を製造する
ことができ、実用上極めて大きな意義を有している。By the above operation, high-density fine crystals are formed at a deposition rate of 25 to 100 Jl per minute on the surface of the cathode (1) facing the insoluble anode (14) that is not masked with the non-conductive resist film (7). A copper film having a structure can be deposited, and the conductor circuit (6) is formed by depositing the metal film (5), not shown in FIG.
Close contact with. According to the present invention, a copper film can be manufactured with a high efficiency of 10 to 200 times that of conventional plating techniques, and has extremely great practical significance.
メッキ工程において陰極（＋）表面上の非導電性レジス
ト膜（７）でマスキングしない部分に必要な厚さ、本発
明の主目的とするところでは数（２〜３）μ〜数百（２
００〜３００）μで導体回路（６）が形成された時点で
、通電及びメッキ液（２３）の供給を停止し、導体回路
（６）、非導電性レジスト膜（７）、及び金属膜（５）
と平板状導電材（２）を一体のまま高速メッキ装置（１
１）から取り外す。この状態において平板状導電４）Ｉ
’ （２）表面には、金属膜（５）が、金属膜（５）表
面には、導体回路（６）及び非導電性レノスト膜（７）
が積層されている。導体回路（６）は電気化学的にＮＶ
、滑な金属膜（５）上に積層するので、１０μ以下の厚
さでもピンホールは生じない。In the plating process, the thickness required for the part not masked with the non-conductive resist film (7) on the surface of the cathode (+), which is the main objective of the present invention, ranges from several (2 to 3) μ to several hundred (2
00 to 300)μ, the supply of electricity and the plating solution (23) is stopped, and the conductor circuit (6), the non-conductive resist film (7), and the metal film ( 5)
and the flat conductive material (2) are combined into a high-speed plating machine (1).
1) Remove from. In this state, flat conduction 4) I
'(2) A metal film (5) is on the surface, a conductive circuit (6) and a non-conductive Renost film (7) are on the surface of the metal film (5).
are layered. The conductor circuit (6) is electrochemically NV
Since it is laminated on a smooth metal film (5), pinholes do not occur even if the thickness is less than 10 μm.
ついで、導体回路（６）及び非導電性レジスト膜（７）
表面を水洗後、導体回路（６）の表面処理を行う、表面
処理は、次工程での積層板である絶縁基板（１０）への
導体回路（６）圧着後における両者間の密着力を確保す
るノコめ、導体回路（６）の表面を粗化するために行う
しのであり、例えば電解処理後微細粒子処理をする］二
程、次いでバリヤー処理、亜鉛メッキ処理をする工程、
次いで化学処理、防錆処理、カセ、イソーダ処理をする
工程から成る。導体回路（６）の表面処理により、ポッ
トプレス（加熱圧着）後の導体回路（６）と絶縁基板（
１０）との転写における密着力は、平板状導電材（２）
と金属膜（５）との密着力、にり大となるように制御す
る。Next, a conductive circuit (6) and a non-conductive resist film (7)
After washing the surface with water, perform surface treatment of the conductor circuit (6).The surface treatment ensures adhesion between the conductor circuit (6) after it is crimped onto the insulating substrate (10), which is a laminate in the next step. This step is performed to roughen the surface of the conductor circuit (6), for example, by performing fine particle treatment after electrolytic treatment], followed by barrier treatment and galvanizing treatment,
Next, the process consists of chemical treatment, rust prevention treatment, casing, and isoda treatment. By surface treatment of the conductor circuit (6), the conductor circuit (6) and the insulating substrate (
10) The adhesion force in the transfer with the flat conductive material (2)
The adhesion between the metal film (5) and the metal film (5) is controlled to be large.
表面処理終了後、あるいは表面処理前に非導電性レジス
ト膜（力を除去する。非導電性レジスト膜（力の除去は
、レジスト剤として紫外線硬化タイプの液レジスト、ド
ライフィルム等を用いたときは、それに適した除去剤例
えば、水酸化ナトリウムを主成分としたアルカリ除去剤
などの方法によって行う。After or before surface treatment, remove the non-conductive resist film (force). This is carried out using a suitable removal agent, such as an alkali removal agent containing sodium hydroxide as a main component.
レジスト膜（７）の除去後第４図に示すように絶縁基板
（１０）への金属膜（５）、導体回路（６）の積層及び
、第５図に示すように導体回路（６）絶縁基板へのめり
込み即ち、埋設、陰極（１）の分離を行う。即ち、第４
図に示すように陰極（１）に析出し、表面処理を施した
導体回路（６）に、絶縁基板（１０）を重ねる。絶縁基
板（１０）は有機材料、無機材料いずれでも可能であり
、例えばガラス、エポキシ、フェノール、ポリイミド、
ポリエステル、アラミツト等の４４１’ｌを用いること
ができるが、圧着、加熱圧着により導体回路（６）が表
面から絶縁基板（１０）へめり込むことが可能な素材構
造であることが必要である。After removing the resist film (7), the metal film (5) and the conductor circuit (6) are laminated on the insulating substrate (10) as shown in Fig. 4, and the conductor circuit (6) is insulated as shown in Fig. 5. The cathode (1) is immersed into the substrate, that is, buried, and the cathode (1) is separated. That is, the fourth
As shown in the figure, an insulating substrate (10) is placed on a conductive circuit (6) deposited on the cathode (1) and subjected to surface treatment. The insulating substrate (10) can be made of either organic or inorganic materials, such as glass, epoxy, phenol, polyimide,
441'l such as polyester or aramit can be used, but it is necessary that the material structure allows the conductor circuit (6) to be sunk into the insulating substrate (10) from the surface by pressure bonding or heat pressure bonding.
この実施例ではガラス布地材エポキシ樹脂（ガラス布エ
ポキシ、ガラス基材エボギン樹脂銅張積層板）を使用す
る。導体回路（６）の絶縁基板（１０）へのめり込みは
、導体回路（６）より軟らかい素材で絶縁基板を構成す
るごとでめり込み部分の絶縁基板（１０）全体を押しの
（−する作用によっても、絶縁基数（１０）の−・部中
に含浸する作用によってもよい。In this embodiment, a glass cloth material epoxy resin (glass cloth epoxy, glass base material Evogin resin copper clad laminate) is used. The insertion of the conductor circuit (6) into the insulating substrate (10) is also caused by the effect of pushing the entire insulating substrate (10) at the recessed part, since the insulating substrate is made of a material softer than the conductor circuit (6). An effect of impregnating the insulating group (10) into the -. part may also be used.
ただし、用いる絶縁基板（１０）に接着力が期待できな
い時は、絶縁基１（１０）まノこは導体回路（６）金□
底膜（５）の表面に接着剤を塗布する。陰極（１）、導
体回路（６）金属膜（５）及びこれと市ねた絶縁基板（
１０）をポットプレスに挿入して加熱圧着し、導体回路
（６）及び金属膜（５）と絶縁Ｊｋ板（１０）を強固に
密着せしめ、かつ導体回路（６）を第５図に示すように
絶縁基板（ｌＯ）にめり込ませ、埋設状態とし、積層板
を形成させた後、陰極（１）から分離する。ホットプレ
スは１７０°Ｃ〜２００℃望ましくは１７０℃〜１８０
℃の温度条件で、５５〜７０ｋｇ／ ｃｍ’望ましくは
６４ｋｇ／ｃｍ’の圧力で６５〜８５分間望ましくは７
５分間行う。導体回路（６）は一体となった金属膜（５
）によりｌ】方向が支持されているため、ホットプレス
時にも移動することはない。このとき、平板状導電材（
２）と金属膜（５）との間の密着力より金属膜（５）及
び導体回路（６）と絶縁基板（１０）との間の密着力の
方が大であるため、第６図に示すように、絶縁基板（１
０）側には金属膜（５）及び導体回路（６）が転写され
る。ついで、金属膜（５）を酸等により溶解除去し、第
７図に示すような導体間が正規の絶縁状態となった導体
回路板を得る。However, if the insulating substrate (10) used cannot be expected to have adhesive strength, the insulating substrate 1 (10) and the conductive circuit (6) metal □
Apply adhesive to the surface of the bottom membrane (5). A cathode (1), a conductor circuit (6), a metal film (5), and an insulating substrate (
10) into a pot press and heat and press to firmly adhere the conductor circuit (6) and metal film (5) to the insulating Jk plate (10), and form the conductor circuit (6) as shown in Figure 5. It is sunk into an insulating substrate (lO) to be in an embedded state to form a laminate, and then separated from the cathode (1). Hot press: 170°C to 200°C, preferably 170°C to 180°C
at a temperature of 55 to 70 kg/cm, preferably 64 kg/cm, for 65 to 85 minutes, preferably 7.
Do this for 5 minutes. The conductor circuit (6) consists of an integrated metal film (5
Since the l] direction is supported by ), it will not move during hot pressing. At this time, a flat conductive material (
2) and the metal film (5), the adhesion between the metal film (5) and the conductor circuit (6) and the insulating substrate (10) is greater than that between the metal film (5) and the metal film (5). As shown, the insulating substrate (1
A metal film (5) and a conductive circuit (6) are transferred to the 0) side. Then, the metal film (5) is dissolved and removed using an acid or the like to obtain a conductor circuit board in which the conductors are in a normal insulated state as shown in FIG.
この結果、導体回路（６）の表面は絶縁基板（１０）表
面と同一平面を形成する。酸による処理のし易さからは
金属膜（５）は銅からなることが望よ１〜い。酸等によ
る金属の除去は、金属膜（５）のみでたり、平板状導電
材（２）に直接回路を形成した時には必要とされる平板
状導電材（２）までの酸等による除去は不要であるのて
、いイつゆるソフトエツチングですみ、工程の短縮、時
間の短縮、平板状導電材（２）の再使用が容易となる。As a result, the surface of the conductive circuit (6) forms the same plane as the surface of the insulating substrate (10). The metal film (5) is preferably made of copper from the viewpoint of ease of treatment with acid. Removal of metal with acid, etc. is unnecessary when only the metal film (5) is removed, or when a circuit is formed directly on the flat conductive material (2), it is not necessary to remove the metal with acid, etc. up to the flat conductive material (2). Therefore, so-called soft etching is sufficient, and the process and time can be shortened, and the flat conductive material (2) can be easily reused.
ついで、第８図に示すように導体回路（６）及び絶縁基
板（１０）表面に数μ〜数＋７１Ｉ’７のオーバーレイ
を被覆する。導体回路（６）は、めり込んだ箇所の絶縁
基板（１０）の周囲により両側は挟持され、かつ密着し
ており、絶縁基板（１０）表面及び導体回路（６）表面
は同一の平面を形成しているため、オーバーレイフィル
ム（２４）を用いる場合、導体回路（６）との間に空隙
を生じて空気が入り込むことはない。同様にオーバーレ
イフィルムをロールによって密着せしめる場合であって
も、導体回路（６）は移動することはない。しかして、
陰極（１）の平板状導電Ｈ（２）表面から金属膜（５）
及び導体回路（６）及び非導電性レジスト膜（７）が分
離するため、甲板状導電材（２）の表面を必要に応じて
研Ｆ＋’シ、再び前記り程を繰り返すことで導体回路板
を形成することが可能となる。Then, as shown in FIG. 8, the surfaces of the conductive circuit (6) and the insulating substrate (10) are coated with an overlay of several microns to several +71I'7. The conductor circuit (6) is sandwiched on both sides by the periphery of the insulating substrate (10) where it is recessed, and is in close contact with the insulating substrate (10) surface and the conductor circuit (6) surface forming the same plane. Therefore, when using the overlay film (24), air will not enter into a gap between the overlay film (24) and the conductor circuit (6). Similarly, even when the overlay film is brought into close contact with a roll, the conductor circuit (6) does not move. However,
Metal film (5) from the surface of the flat conductive H (2) of the cathode (1)
In order to separate the conductive circuit (6) and the non-conductive resist film (7), grind the surface of the conductive plate (2) as necessary and repeat the above process again to separate the conductive circuit board. It becomes possible to form.
（へ） 発明の効果
本発明による導体回路板の製造方法によれば、非導電性
レノスト膜は、陰極の平板状導電（４表面には残らない
ため、平板状導電材からの非導電性レジスト膜の除去は
不要となり、平板状導電材の再使用が可能となる。更に
、導体回路は絶縁基板間に存し同一表面を形成するため
、オーバレイ工程において、導体回路とオーバレイフィ
ルムとの間に空気が封じられて、導体回路及び接着剤が
酸化することはない。(f) Effects of the Invention According to the method for manufacturing a conductive circuit board according to the present invention, the non-conductive Renost film does not remain on the flat conductive (4) surface of the cathode, so the non-conductive resist film from the flat conductive material There is no need to remove the film, and the flat conductive material can be reused.Furthermore, since the conductor circuit exists between the insulating substrates and forms the same surface, there is no need to remove the conductor circuit and the overlay film during the overlay process. Since the air is sealed, the conductor circuit and adhesive will not oxidize.
導体回路は、このような構造からなるため、導体回路表
面にオーバレイフィルムをロールでかけるときし、導体
回路が移動することもない。更に、導体回路は、陰極の
平板状導電＋４に被覆した電気化学的に欠陥の無い金属
膜上？こ電析されるためピンポールを生ずることもない
。また、導体回路は、金属膜上に密着した後、一体かつ
直接に絶縁板においてポットプレス等により密着、転写
せしめて陰極から分離するた給、導体回路に亀裂、シ１
）等の品質上の欠陥を生ずるごとがない。更には、導体
回路の製造には高速メッキ技術を用いるため、例えば１
０μの膜厚を得るのに要するメッキ時間は、１分乃至そ
れ以下とすることができ、極めて生産性が優れている。Since the conductor circuit has such a structure, when the overlay film is rolled over the surface of the conductor circuit, the conductor circuit does not move. Furthermore, is the conductor circuit formed on an electrochemically defect-free metal film coated on the cathode flat conductor +4? Because it is electrolytically deposited, pinpoles do not occur. In addition, after the conductor circuit is closely attached to the metal film, the conductor circuit is directly attached and transferred to an insulating plate using a pot press or the like and separated from the cathode.
) and other quality defects. Furthermore, since high-speed plating technology is used to manufacture conductor circuits, for example, 1
The plating time required to obtain a film thickness of 0 μm can be reduced to 1 minute or less, resulting in extremely high productivity.
しかして特に高能率、安価に導体回路板を供給すること
ができることに本発明の最大の意義があり、その実用的
価値は極めて大きい。Therefore, the greatest significance of the present invention lies in its ability to supply a conductor circuit board particularly with high efficiency and at low cost, and its practical value is extremely great.
第１図、第２図、第３図、第４図、第５図、第６図、第
７図、第８図はこの発明の実施例の断面図、第９図は同
実施に使用するメッキ装置の正面断面図、第１０図は同
側面断面概略図、第１１図は第１０図の一部拡大図、第
１２図は第１１図Ａ−Ａ断面図、第１３図は従来例図で
ある。
（］）・・・・・・陰極、（２）・・・・・・平板状導
電材、（５）・・・・・金層膜、（６）・・・・・導体
回路、（７）・・・・・・非導電性レジスト膜、（１０
）・・・・・・絶縁基板、（１１）・・・メッキ装置、
（１３）・・・・・空隙部、（■４）・・・・・・不溶
性陽極、（２３）・・・・・・メッキ液。
特許出願人 名幸電子工業株式会社
代理人弁理士 安 原 正 ２同
安 原 正 義第１図
第３図
第５図
第７図
ｉ遍→ｉ
第２図
第４図
“０′
第６図
第８図Figures 1, 2, 3, 4, 5, 6, 7, and 8 are cross-sectional views of embodiments of the invention, and Figure 9 is used for the same implementation. 10 is a schematic cross-sectional view of the same side, FIG. 11 is a partially enlarged view of FIG. 10, FIG. 12 is a sectional view taken along line A-A in FIG. 11, and FIG. 13 is a diagram of a conventional example. It is. (])...Cathode, (2)...Flat conductive material, (5)...Gold layer film, (6)...Conductor circuit, (7 )...Non-conductive resist film, (10
)... Insulated substrate, (11)... Plating device,
(13)...Void, (■4)...Insoluble anode, (23)...Plating solution. Patent applicant: Naiko Electronics Industry Co., Ltd. Representative Patent Attorney Tadashi Yasuhara 2nd Edition
Masayoshi Yasuhara Figure 1 Figure 3 Figure 5 Figure 7
Claims (1)
基材表面に金属膜を一体に被覆せしめ、金属膜表面上の
導体回路を形成比しめようとする部分以外の部分には、
非導電性レジスト膜を密着せしめて陰極を構成し、該メ
ッキ陰極に平行に対向する不溶性陽極を１〜３０ｍｍの
間隙を有して配置固定し、固定された陰極と不溶性陽極
との間に形成される空隙部にメッキ液を１ｍ／ｓｅｃ以
上の高速度で移動するように供給するとともに、陰極と
陽極との間に０．８〜４．０Ａ／ｃｍ＾２の電流密度と
なるように通電し、導体回路形成部分のみに選択的に金
属を高速度で電析せしめ、金属導体が所要の膜厚に達し
たところで通電を止めで導体回路を形成し、非導電性レ
ジスト膜を除去し、導体回路表面に絶縁基板を積層し、
絶縁基板と平板状導電性陰極基材を圧着することで、導
体回路を絶縁基板中にめり込ませるとともに導体回路及
び金属膜を絶縁基板に一体に密着せしめ、金属膜及び導
体回路を一体に陰極材より分離し、導体回路表面を被覆
する最表層金属膜を除去して導体回路板とすることを特
徴とする導体回路板の製造方法。 ２ 圧着が加熱圧着である特許請求の範囲第１項記載の
導体回路板の製造方法。 ３ 金属膜、導体回路を分離した平板状導電性陰極基材
は研摩、活性化した後再び同工程を繰り返すことにより
導体回路を製造する特許請求の範囲第１項、又は第２項
記載の導体回路板の製造方法。[Scope of Claims] 1. A metal film is integrally coated on the surface of a flat conductive cathode base material which has rigidity and is fixed to a plating device, and a conductor circuit is formed on the surface of the metal film other than the part where a conductive circuit is to be formed. In part,
A non-conductive resist film is brought into close contact to form a cathode, and an insoluble anode facing parallel to the plated cathode is arranged and fixed with a gap of 1 to 30 mm, and formed between the fixed cathode and the insoluble anode. The plating solution is supplied into the gap where the plating solution is moved at a high speed of 1 m/sec or more, and electricity is applied between the cathode and the anode so that the current density is 0.8 to 4.0 A/cm^2. Then, metal is selectively deposited at high speed only on the conductive circuit formation area, and when the metal conductor reaches the required film thickness, the current is turned off to form a conductive circuit, and the non-conductive resist film is removed. An insulating substrate is laminated on the surface of the conductor circuit,
By crimping the insulating substrate and the flat conductive cathode base material, the conductor circuit is recessed into the insulating substrate, and the conductor circuit and metal film are tightly attached to the insulating substrate, so that the metal film and the conductor circuit are integrated. 1. A method for manufacturing a conductor circuit board, which comprises separating it from a cathode material and removing the outermost metal film covering the surface of the conductor circuit to obtain a conductor circuit board. 2. The method for manufacturing a conductive circuit board according to claim 1, wherein the crimping is heat crimping. 3. The conductor according to claim 1 or 2, wherein the flat conductive cathode base material from which the metal film and the conductor circuit are separated is polished and activated, and then the same process is repeated again to produce the conductor circuit. Method of manufacturing circuit boards.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1045887A JPS6388895A (en) | 1987-01-20 | 1987-01-20 | Manufacture of conductor circuit plate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1045887A JPS6388895A (en) | 1987-01-20 | 1987-01-20 | Manufacture of conductor circuit plate |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6388895A true JPS6388895A (en) | 1988-04-19 |
Family
ID=11750695
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1045887A Pending JPS6388895A (en) | 1987-01-20 | 1987-01-20 | Manufacture of conductor circuit plate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6388895A (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH021198A (en) * | 1988-03-10 | 1990-01-05 | Yamaha Motor Co Ltd | Printed wiring board and manufacture thereof |
| JPH02113589A (en) * | 1988-10-22 | 1990-04-25 | Matsushita Electric Works Ltd | Manufacture of printed-wiring board |
| JPH02122691A (en) * | 1988-11-01 | 1990-05-10 | Shinko Electric Ind Co Ltd | Manufacture of printed circuit board |
| JPH02164094A (en) * | 1988-12-19 | 1990-06-25 | Matsushita Electric Ind Co Ltd | Manufacture of printed wiring board |
| JPH03151259A (en) * | 1989-11-09 | 1991-06-27 | Sekisui Chem Co Ltd | Laminated sheet |
| JPH07273429A (en) * | 1994-03-29 | 1995-10-20 | Furukawa Electric Co Ltd:The | Manufacture of wiring conductor, and wiring conductor manufacture by the method |
| WO2004014114A1 (en) * | 2002-07-31 | 2004-02-12 | Sony Corporation | Method for manufacturing board with built-in device and board with built-in device, and method for manufacturing printed wiring board and printed wiring board |
-
1987
- 1987-01-20 JP JP1045887A patent/JPS6388895A/en active Pending
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH021198A (en) * | 1988-03-10 | 1990-01-05 | Yamaha Motor Co Ltd | Printed wiring board and manufacture thereof |
| JPH02113589A (en) * | 1988-10-22 | 1990-04-25 | Matsushita Electric Works Ltd | Manufacture of printed-wiring board |
| JPH02122691A (en) * | 1988-11-01 | 1990-05-10 | Shinko Electric Ind Co Ltd | Manufacture of printed circuit board |
| JPH02164094A (en) * | 1988-12-19 | 1990-06-25 | Matsushita Electric Ind Co Ltd | Manufacture of printed wiring board |
| JPH03151259A (en) * | 1989-11-09 | 1991-06-27 | Sekisui Chem Co Ltd | Laminated sheet |
| JPH07273429A (en) * | 1994-03-29 | 1995-10-20 | Furukawa Electric Co Ltd:The | Manufacture of wiring conductor, and wiring conductor manufacture by the method |
| WO2004014114A1 (en) * | 2002-07-31 | 2004-02-12 | Sony Corporation | Method for manufacturing board with built-in device and board with built-in device, and method for manufacturing printed wiring board and printed wiring board |
| CN100452342C (en) * | 2002-07-31 | 2009-01-14 | 索尼株式会社 | Method for manufacturing board with built-in device and board with built-in device, and method for manufacturing printed wiring board and printed wiring board |
| US7874066B2 (en) | 2002-07-31 | 2011-01-25 | Sony Corporation | Method of manufacturing a device-incorporated substrate |
| US8146243B2 (en) | 2002-07-31 | 2012-04-03 | Sony Corporation | Method of manufacturing a device incorporated substrate and method of manufacturing a printed circuit board |
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