JPS63126292A - Interconnection system of printed wiring board - Google Patents

Interconnection system of printed wiring board

Info

Publication number
JPS63126292A
JPS63126292A JP27239586A JP27239586A JPS63126292A JP S63126292 A JPS63126292 A JP S63126292A JP 27239586 A JP27239586 A JP 27239586A JP 27239586 A JP27239586 A JP 27239586A JP S63126292 A JPS63126292 A JP S63126292A
Authority
JP
Japan
Prior art keywords
printed wiring
wiring board
leads
liquid crystal
crystal display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP27239586A
Other languages
Japanese (ja)
Other versions
JPH0556877B2 (en
Inventor
康伸 田草
裕一 吉田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP27239586A priority Critical patent/JPS63126292A/en
Publication of JPS63126292A publication Critical patent/JPS63126292A/en
Publication of JPH0556877B2 publication Critical patent/JPH0556877B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Combinations Of Printed Boards (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、印刷配線基板の接続方式に関し、さらに詳し
くは、たとえば液晶、プラズマ、エレクトロルミネセン
ス(略称EL)等の表示素子パネルなどにおいて、駆動
用集積回路等の電子回路装置が実装された印刷配線基板
の接続方式に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a connection method for a printed wiring board, and more specifically, for example, a method for connecting a printed wiring board, for example, for driving a display element panel such as a liquid crystal, plasma, electroluminescence (abbreviated as EL), etc. The present invention relates to a connection method for a printed wiring board on which an electronic circuit device such as an integrated circuit is mounted.

従来技術 fjsG図は、、典型的な従来技術の接続方式を用いた
液晶表示装r!11の一部分の分解斜視図である。
The prior art fjsG diagram shows a liquid crystal display using a typical prior art connection method. FIG. 11 is an exploded perspective view of a portion of FIG.

液晶表示素子パネル2の縁部2a、2bがらは、複数の
テープキャリア3,4が突出して設けられる。
A plurality of tape carriers 3 and 4 are provided to protrude from the edges 2a and 2b of the liquid crystal display element panel 2.

このテープキャリア3.4は、テープ状の薄膜に形成さ
れ、各テープキャリア3,4の一表面上には、液晶表示
素子パネル2を駆動するために電子回路装置である大′
jA?5!某積回路5,6がそれぞれ実装される。
The tape carriers 3 , 4 are formed into tape-like thin films, and on one surface of each tape carrier 3 , 4 , there is a large circuit board that is an electronic circuit device for driving the liquid crystal display element panel 2 .
jA? 5! Certain product circuits 5 and 6 are mounted respectively.

大規模1!積回路5,6のパネル駆動信号用端子5a、
6aは、テープキャリア3.4上に形成され銅rri等
から成る複数本のパネル駆動信号配線用り−ド7,8と
電気的に接続される。このリード7.8は、パネル2の
縁部2a、2bにおいて、半田付あるいはヒートシール
接続等によりパネル2の端子と電気的に接続される。
Large scale 1! panel drive signal terminals 5a of product circuits 5 and 6;
6a is formed on the tape carrier 3.4 and electrically connected to a plurality of panels 7 and 8 for panel drive signal wiring made of copper RI or the like. The leads 7.8 are electrically connected to the terminals of the panel 2 at the edges 2a, 2b of the panel 2 by soldering, heat sealing, or the like.

各テープキャリア3,4の一表面上に形成された大規模
集積回路5,6の入力信号用端子5b、6bと接続され
る入力信号配線用リード15.16は、このテープキャ
リア3.4の端部から突出し、別途準備された基板9の
一表面上に形成されたリード10.11の端部10a、
11aと電気的に接続される。基板9は、7レキシプル
プリント基板(略称FPC)あるいは一般のプリント配
線基板(略称PWB)などであってもよい。大規模集積
回路5゜6側のリード15.16と接続されたテープキ
ャリア3,4側のリード10.11は、導通孔12゜1
3を介して、大規模集積回路5,6の入力信号用の共通
配線であり、基板9の裏面に形成されたり−ド14と選
択的に接続される。リード14は、映像信号源や電源等
と接続される。映像信号源からの信号が大災PA集積回
路5.6に入力され、これに応答する大規模集積回路5
,6の出力信号によって、液晶表示素子パネル2が表示
駆動される。
Input signal wiring leads 15 and 16 connected to input signal terminals 5b and 6b of large-scale integrated circuits 5 and 6 formed on one surface of each tape carrier 3 and 4 are An end 10a of a lead 10.11 protruding from the end and formed on one surface of a separately prepared substrate 9;
It is electrically connected to 11a. The board 9 may be a lexical printed circuit board (abbreviated as FPC) or a general printed wiring board (abbreviated as PWB). The leads 10.11 on the tape carriers 3 and 4 side connected to the leads 15.16 on the large-scale integrated circuit 5°6 side are connected to the leads 10.11 on the conductive hole 12°1.
3 is a common wiring for input signals of the large-scale integrated circuits 5 and 6, and is formed on the back surface of the substrate 9 and selectively connected to the -domain 14. The lead 14 is connected to a video signal source, a power source, and the like. The signal from the video signal source is input to the large-scale integrated circuit 5.6, and the large-scale integrated circuit 5 responds to this signal.
, 6, the liquid crystal display element panel 2 is driven for display.

発明が解決しようとする問題点 このように従来の複数テープキャリア3.4の接続方式
では、別途に信号源や電源等と連結するだめの基板9を
設ける必要があり、上述のように、基板9の表裏両面に
印刷配線を施したいわゆる2層配線基板を利用する場合
、コスト高となる。また部品点数が多くなり、特に基板
9として一般のプリント基板を用いる場合、製品の厚み
が増す。
Problems to be Solved by the Invention As described above, in the conventional connection method of multiple tape carriers 3.4, it is necessary to separately provide a board 9 for connecting to a signal source, a power supply, etc. When using a so-called two-layer wiring board in which printed wiring is printed on both the front and back sides of 9, the cost becomes high. Furthermore, the number of parts increases, and especially when a general printed circuit board is used as the board 9, the thickness of the product increases.

本発明の目的は、上述の問題点に鑑み、構成が簡略化さ
れ、薄形化が可能な印刷配線基板の接続方式を提供する
ことである。
SUMMARY OF THE INVENTION In view of the above-mentioned problems, an object of the present invention is to provide a printed wiring board connection method that has a simplified configuration and can be made thinner.

問題点を解決するための手段 本発明は、複数の入出力端子を有する電子回路装置が実
装され、信号源に連結されて電子回路装置の入力端子に
接続された共通ラインが印刷配線され、該共通ラインの
端部は周縁部より外方へ延設された複数の印刷配線基板
を含み、 共通ラインの上記外方へ延設された部分が、隣接する印
刷配線基板の共通ラインの端部と重ねられて各共通ライ
ンが互いに接続され、 各印刷配線基板ごとに、電子回路装置の入力端子と共通
ラインとは個別に接続手段で電気的に接続されることを
特徴とする印刷配線基板の接続方式である。
Means for Solving the Problems The present invention provides an electronic circuit device in which an electronic circuit device having a plurality of input/output terminals is mounted, and a common line connected to a signal source and connected to an input terminal of the electronic circuit device is printed and wired. The end of the common line includes a plurality of printed wiring boards extending outward from the peripheral edge, and the outwardly extending portion of the common line is connected to the end of the common line of an adjacent printed wiring board. Connection of printed wiring boards characterized in that the common lines are overlapped and connected to each other, and for each printed wiring board, the input terminal of the electronic circuit device and the common line are individually electrically connected by connecting means. It is a method.

作  用 本発明に従えば、複数の入出力端子を有する電子回路装
置がそれぞれに実装された複数の印刷配線基板には、そ
れら電子回路装置に関連した共通ラインが印刷配線され
、この共通ラインの端部は印刷配線基板の周縁部より外
方へ延設されており、隣接する印刷配線基板の共通ライ
ンの端部と重ねられることによって、各共通ラインは互
いに接続され信号源に連結される。また各電子回路装置
の入力端子は、該電子回路装置が実装された印刷配線基
板ごとに形成された接続手段によって、前記共通ライン
と個別に電気的に接続される。したがって信号源からの
信号を、複数の電子回路装置のそれぞれの入力端子に選
択的に与えることができる。
Effect According to the present invention, a common line related to the electronic circuit devices is printed and wired on a plurality of printed wiring boards, each of which is mounted with an electronic circuit device having a plurality of input/output terminals, and the common line is printed and wired. The ends extend outward from the periphery of the printed wiring board and are overlapped with the ends of the common lines of adjacent printed wiring boards, thereby connecting the common lines to each other and to the signal source. Further, the input terminals of each electronic circuit device are individually electrically connected to the common line by connection means formed for each printed wiring board on which the electronic circuit device is mounted. Therefore, signals from the signal source can be selectively applied to the respective input terminals of the plurality of electronic circuit devices.

実施例 第1図は、本発明の一実施例の接続方式を用いた液晶表
示装rfi21の一部分の分解斜視図である。
Embodiment FIG. 1 is an exploded perspective view of a portion of a liquid crystal display device RFI 21 using a connection method according to an embodiment of the present invention.

液晶表示素子パネル22の縁部22a+221)からは
、複数のテープキャリア23.24が突出して設(すら
れる。二のテープキャリア23.24は、たとえばポリ
イミド系のカプトンあるい1土ユービレツクス等の材料
から成り、テープ状の薄膜に形成され、各テープキャリ
ア23.24の一表面には、液晶表示素子パネル22を
駆動するために、電子回路装置である大規模集積回路2
5.26がそれぞれ実装される。
A plurality of tape carriers 23, 24 are provided to protrude from the edge 22a+221) of the liquid crystal display element panel 22. The second tape carrier 23, 24 is made of a material such as polyimide-based Kapton or Ubilex. A large-scale integrated circuit 2, which is an electronic circuit device, is formed on one surface of each tape carrier 23, 24 to drive the liquid crystal display element panel 22.
5.26 are implemented respectively.

大規模集積回路25.26のパネル駆動信号用端子25
a、26aは、テープキャリア23.24上に形成され
、銅箔等から成る複数本のパネル駆動信号配線用リード
27.28と電気的に接続される。このリード27.2
8は、パネル22の縁部22a、22bにおいて半田付
、あるいはヒートシール接続等により、パネル22の端
子と電気的に接続される。
Panel drive signal terminal 25 of large-scale integrated circuit 25 and 26
a, 26a are formed on the tape carrier 23.24 and electrically connected to a plurality of panel drive signal wiring leads 27.28 made of copper foil or the like. This lead 27.2
8 is electrically connected to the terminals of the panel 22 at the edges 22a, 22b of the panel 22 by soldering, heat seal connection, or the like.

一方、予めテープキャリア23.24の一表面上には、
複数本の入力信号配線用リード2つ、30が形成される
。このリード29は、テープキャリア23上に実装され
た大規模集積回路25に入カイ3号を導くだけでなく、
隣接するテープキャリア24のリード30にもまた入力
信号を導くいわゆる送り配線の役割も果たす。リード3
0もまたリード29と同様の役割を有する。
On the other hand, on one surface of the tape carrier 23.24,
Two leads 30 for input signal wiring are formed. This lead 29 not only guides the input circuit 3 to the large-scale integrated circuit 25 mounted on the tape carrier 23, but also
The leads 30 of the adjacent tape carriers 24 also play the role of so-called feed wiring for guiding input signals. lead 3
0 also has a role similar to lead 29.

リード29.30は受は部分29a、30aと送り部分
29b、30bとから成り、送り部分29b、30 b
は、屈曲して形成され、受は部分29a、30aを横切
る形で大災y&集積回路25.26の入力信号用端子2
5b=26bに接続される。送り部分29b、30b上
には、絶縁層31.32を介して接続手段である導体層
33.34が積層して形成される。この導体層33.3
4は、リード29.30と同様の機能を有する配線パタ
ーンであり、その一方の端部は受は部分29a、30a
と接続され、他方の端部は送り部分29b、30bと選
択的に接続される。これによって受は部分29a、30
aは、送り部分29b、30b、および大規模集積回路
25.26の入力信号用端子25&、26bと電気的に
接続される。また送り部分29b、30bと、導体層3
3.34との間には、絶縁層31.32が介在され、こ
れによって両者はいわゆる立体交差して配置されるため
、テープキャリア23.24の一表面上に複数本形I&
されたリード29.30が相互に短絡接触することが防
がれる。絶縁層31゜32は、絶縁樹脂等が印刷されて
形成されてもよく、また導体層33.34は銀ペースト
等の印刷、あるいはf:AM等の貼着等によって形成さ
れてもよI/1゜ 上述のようにして構成されたテープキャリア23.24
において、テープキャリア23に形成されたリード29
の送り部分29bは、テープキャリア23の緑から延設
されており、隣り合うテープキャリア24に形成された
り−ド30の受は部分30aを覆うようにして電気的に
接続される。
The lead 29.30 consists of receiving parts 29a, 30a and feeding parts 29b, 30b.
is bent and formed, and the receiver crosses the portions 29a and 30a to connect the input signal terminal 2 of the catastrophe y & integrated circuit 25, 26.
Connected to 5b=26b. Conductor layers 33.34, which serve as connection means, are laminated and formed on the feeding portions 29b, 30b via insulating layers 31.32. This conductor layer 33.3
4 is a wiring pattern having the same function as the leads 29 and 30, and one end of the wiring pattern has receiver portions 29a and 30a.
The other end is selectively connected to the feeding portions 29b, 30b. As a result, the receiver parts 29a, 30
a is electrically connected to the feed portions 29b, 30b and the input signal terminals 25&, 26b of the large-scale integrated circuits 25, 26. In addition, the feeding portions 29b and 30b and the conductor layer 3
3.34, an insulating layer 31.32 is interposed between the tape carrier 23.34 and the tape carrier 23.24.
This prevents the connected leads 29, 30 from coming into short-circuiting contact with each other. The insulating layers 31 and 32 may be formed by printing insulating resin or the like, and the conductor layers 33 and 34 may be formed by printing silver paste or the like or pasting f:AM or the like. 1° Tape carrier 23.24 configured as described above
, the leads 29 formed on the tape carrier 23
The feeding portion 29b extends from the green part of the tape carrier 23, and the receivers of the leads 30 formed on the adjacent tape carriers 24 are electrically connected so as to cover the portion 30a.

同様にテープキャリア24の送り部分30bは、隣り合
うテープキャリアの受は部分と接続される。
Similarly, the feeding section 30b of the tape carrier 24 is connected to the receiving section of an adjacent tape carrier.

このようにして各テープキャリア23.24は、順次的
に共通入力配線され、大規模集積回路25゜26の入力
信号用端子25b、26bは、映像信号源や電源等に選
択的に接続され、液晶表示素子・ネル22が表示駆動さ
れる。
In this way, each tape carrier 23, 24 is sequentially connected to common input wiring, and the input signal terminals 25b, 26b of the large-scale integrated circuits 25, 26 are selectively connected to a video signal source, a power source, etc. The liquid crystal display element/channel 22 is driven for display.

第2図は、本発明の他の実施例の接続方式を用いた液晶
表示装置41の一部分の分解斜視図である。この実施例
は前述の実施例に類似し、対応する部分には同一の参照
符を付す。この実施例では、リード29.30の受は部
分29a、30aと送り部分29+)、30+1との間
には、接続手段である微小7レキンプルプリント基板4
2.43が介在される。この微小7レキシプルプリント
基板42.43は、電気絶縁性の基材44.45の一表
面上に配線パターン4G、47が形成されて成る。こう
して受は部分29a、30aは、送り部分29b、30
b、および大規模集積回路25.26の入力信号用端子
25b、26bと選択的に接続され、液晶表示素子パネ
ル22が表示駆動される。また送り部分29b、30b
と、配線パターン46.47との間には基材44,45
が介在され、これによって両者はいわゆる立体交差して
配置されるため、テープキャリア23.24の一表面上
に複数本形成されたリード29.30が相互に短絡接触
することが防がれる。
FIG. 2 is an exploded perspective view of a portion of a liquid crystal display device 41 using a connection method according to another embodiment of the present invention. This embodiment is similar to the previous embodiment and corresponding parts are provided with the same reference numerals. In this embodiment, the receptacles of the leads 29, 30 are connected between the portions 29a, 30a and the feed portions 29+), 30+1, with a micro 7 rekin pull printed circuit board 4 serving as a connection means.
2.43 is interposed. This micro 7 lexical printed circuit board 42.43 is made up of wiring patterns 4G, 47 formed on one surface of an electrically insulating base material 44.45. Thus, the receiving portions 29a, 30a are replaced by the feeding portions 29b, 30.
b, and input signal terminals 25b and 26b of the large-scale integrated circuits 25 and 26, and the liquid crystal display element panel 22 is driven for display. Also, the feeding parts 29b, 30b
There are base materials 44 and 45 between the wiring patterns 46 and 47.
are interposed therebetween, and as a result, they are arranged in a so-called three-dimensional intersection, thereby preventing the plurality of leads 29, 30 formed on one surface of the tape carrier 23, 24 from coming into short-circuit contact with each other.

第3図は、本発明のさらに他の実施例の接続方式を用い
た液晶表示装置51の一部分の分解斜視図である。この
実施例は前述の実施例にM似し、対応する部分には同一
の参照符を付す。この実施例では、入力信号配線用リー
ド52.53の受は部分52a、53aと、送り部分5
2b、53bとは連続して形成され、大災Is積回路2
5.2Gの入力信号用端子25b、2(3bは、導体層
54.55を介して、このリード52.53と選択的に
接続される。導体Jr!J54.55は、リード52.
53といわゆる立体交差して配置され、両者間には絶縁
層56.57が介在される。したがってテープキャリア
23.24上に複数本形成されたリード52゜53と導
体Wi54,55とが相互に短vr接触することが防が
れる。導体WI54.55は、絶縁層56.57に形成
された導通孔58.59を通してリード52.53と接
続される。こうして大規模集積回路25.26の入力信
号用端子251)、2 G bは、リード52.53と
選択的に接続され、液晶表示素子パネル22が表示駆動
される。
FIG. 3 is an exploded perspective view of a portion of a liquid crystal display device 51 using a connection method according to still another embodiment of the present invention. This embodiment is similar to the previously described embodiment, and corresponding parts are provided with the same reference numerals. In this embodiment, the receivers of the input signal wiring leads 52, 53 have portions 52a, 53a and feed portions 5.
2b and 53b are formed continuously, and the catastrophe Is product circuit 2
The 5.2G input signal terminals 25b, 2 (3b) are selectively connected to this lead 52.53 via the conductor layer 54.55.The conductor Jr!J54.55 is connected to the lead 52.55.
53, and insulating layers 56 and 57 are interposed between the two. Therefore, the plurality of leads 52, 53 formed on the tape carrier 23, 24 and the conductors Wi 54, 55 are prevented from coming into short vr contact with each other. Conductor WI54.55 is connected to lead 52.53 through conductive hole 58.59 formed in insulating layer 56.57. In this way, the input signal terminals 251) and 2Gb of the large-scale integrated circuits 25 and 26 are selectively connected to the leads 52 and 53, and the liquid crystal display element panel 22 is driven for display.

第4図は、本発明の他の実施例の接続方式を用いた液晶
表示装F161の一部分の分解斜視図である。この実施
例は、第3図に示された実施例に預臥し、対応する部分
には同一の参照符を付す。注目すべきは、大規模集積回
路25.26の入力信号用端子251+、26bは、微
小フレキシブルプリント基板62.63によって、入力
信号配線用リード52.53と選択的に接続されること
である。
FIG. 4 is an exploded perspective view of a portion of a liquid crystal display device F161 using a connection method according to another embodiment of the present invention. This embodiment is a prerequisite to the embodiment shown in FIG. 3, and corresponding parts are given the same reference numerals. What should be noted is that the input signal terminals 251+, 26b of the large-scale integrated circuit 25.26 are selectively connected to the input signal wiring leads 52.53 by the micro flexible printed circuit board 62.63.

この微小7レキシプルプリント基板62.f33は、電
気絶縁性の基材6G、67の一表面に配線パターン68
.69が形成されて成る。したがってテープキャリア2
3.24上に複数本形成されたリード52.53と配線
パターン68.69とが相互に短絡接触することが防が
れる。こうして大規模集積回路25.26の入力信号用
端子25b、26bは、リード52.53と選択的に接
続され、液晶表示素子パネル22が表示駆動される。
This minute 7 lexiple printed circuit board 62. f33 has a wiring pattern 68 on one surface of the electrically insulating base material 6G, 67.
.. 69 is formed. Therefore tape carrier 2
This prevents the plurality of leads 52, 53 formed on 3.24 and the wiring patterns 68, 69 from coming into short-circuit contact with each other. In this way, the input signal terminals 25b, 26b of the large-scale integrated circuits 25, 26 are selectively connected to the leads 52, 53, and the liquid crystal display element panel 22 is driven to display.

第5図は、本発明のさらに他の実施例の接続方式を用い
た液晶表示装置71の一部分の分解斜視図である。この
実施例は、第3図に示された実施例にMUし、対応する
部分には同一の参照符を付す。この実施例では、入力信
号配線用リード72゜73の受は部分72a、73aと
送り部分72b、73L+とは、テープキャリア74.
75の裏面に、連続して形成される。テープキャリア?
4,75の一表面上には、導入部7G、77が形成され
、大規模集積回路25.26の入力信号用端子25b。
FIG. 5 is an exploded perspective view of a portion of a liquid crystal display device 71 using a connection method according to still another embodiment of the present invention. This embodiment is similar to the embodiment shown in FIG. 3, and corresponding parts are given the same reference numerals. In this embodiment, the receiving portions 72a and 73a of the input signal wiring leads 72 and 73 and the feeding portions 72b and 73L+ are connected to the tape carrier 74.
75 and is continuously formed on the back surface of 75. Tape carrier?
Introducing portions 7G, 77 are formed on one surface of the large-scale integrated circuits 25, 75, and input signal terminals 25b of the large-scale integrated circuits 25, 26.

26bは、この導入部7f3,77を介して、リード7
2.73と選択的に接続される。導入部76.77は、
リード72.73といわゆる立体交差して配置され、両
者はテープキャリア74.75に形成された導通孔78
.79を通して接続される。
26b is connected to the lead 7 through the introducing portions 7f3 and 77.
2.73 is selectively connected. The introduction part 76.77 is
The leads 72 and 73 are arranged in a so-called three-dimensional intersection, and both are connected to the conductive holes 78 formed in the tape carrier 74 and 75.
.. Connected through 79.

したがってテープキャリア74.75の裏面に複数本形
成されたリード72.73と導入部76.77とが相互
に短絡接触することが防がれる。こうして大規模集積回
路25.26の入力信号用端子25b、26bは、リー
ド72.73と選択的に接続され、液晶表示素子パネル
22が表示i動される。
Therefore, the plurality of leads 72.73 formed on the back surface of the tape carrier 74.75 and the introduction portion 76.77 are prevented from coming into short-circuit contact with each other. In this way, the input signal terminals 25b, 26b of the large-scale integrated circuits 25, 26 are selectively connected to the leads 72, 73, and the liquid crystal display element panel 22 is displayed.

以上各実施例で示されたように、テーブキャ1゜ア23
,24,74.75  上で、大規模集積回路25.2
Gの入力ラインと送り配線ラインとがいゎつる立体交差
して形成されるため、複数本で構成されたラインが相互
に短絡接触することなく配線することができる。
As shown in each of the above embodiments, the table carrier 1°a 23
, 24, 74.75 on large-scale integrated circuits 25.2
Since the G input line and the sending wiring line are formed in a vertically intersecting manner, a plurality of lines can be wired without short-circuiting and contacting each other.

上述の各実施例では、液晶表示素子パネル2が用いられ
たが、他の表示素子パネル(たとえばブフXマ、EL等
)が用いられでもよい。また表示素子パネルに限らず各
種集積回路素子が実装された印刷配線基板について広〈
実施される。
Although the liquid crystal display element panel 2 is used in each of the above-mentioned embodiments, other display element panels (for example, Buchxma, EL, etc.) may be used. In addition to display element panels, we also provide wide-ranging information about printed wiring boards on which various integrated circuit elements are mounted.
Implemented.

効  果 以上のように本発明によれば、各印刷配線基板内には共
通ラインが形成され、各印刷配線基板に実装された電子
回路装置の入力端子はそれらと選択的に接続される。ま
た、共通ラインの端部は、印刷配線基板の周縁部より外
方へ延設されており、隣接する印刷配線基板の共通ライ
ンの端部と重ねられて接続されるようにしたので、共通
ラインを形成するために、別途に基板を設ける必要がな
く、vt成が簡略化され、薄型化が可能となる。
Effects As described above, according to the present invention, common lines are formed in each printed wiring board, and input terminals of electronic circuit devices mounted on each printed wiring board are selectively connected to them. In addition, the end of the common line extends outward from the peripheral edge of the printed wiring board, and is overlapped and connected to the end of the common line of an adjacent printed wiring board, so that the common line There is no need to provide a separate substrate in order to form this, simplifying the Vt formation and making it possible to reduce the thickness.

【図面の簡単な説明】[Brief explanation of the drawing]

ptS1図は本発明の一実施例の接続方式を用いた液晶
表示装r!121の一部分の分解斜視図、第2図は本発
明の他の実施例の接続方式を用いた液晶表示装r!14
1の一部分の分解斜視図、第3図は本発明のさらに他の
実施例の接続方式を用いた液晶表示装置51の一部分の
分解斜視図、第4図は本発明の池の実施例の接続方式を
泪いた液晶表示装置61の一部分の分解斜視図、Pt5
5図は本発明のさらに他の実施例の接続方式を用いた液
晶表示装置71の一部分の分解斜視図、第6図は従来技
術の接続方式を用いた液晶表示装置1の一部分の分解斜
視図である。
ptS1 diagram shows a liquid crystal display r! using the connection method of one embodiment of the present invention. FIG. 2 is an exploded perspective view of a portion of 121, and FIG. 2 is a liquid crystal display device using a connection method according to another embodiment of the present invention. 14
FIG. 3 is an exploded perspective view of a portion of a liquid crystal display device 51 using a connection method according to still another embodiment of the present invention, and FIG. An exploded perspective view of a portion of the liquid crystal display device 61 showing the method, Pt5
FIG. 5 is an exploded perspective view of a portion of a liquid crystal display device 71 using a connection method according to another embodiment of the present invention, and FIG. 6 is an exploded perspective view of a portion of a liquid crystal display device 1 using a connection method of the prior art. It is.

Claims (1)

【特許請求の範囲】  複数の入出力端子を有する電子回路装置が実装され、
信号源に連結されて電子回路装置の入力端子に接続され
た共通ラインが印刷配線され、該共通ラインの端部は周
縁部より外方へ延設された複数の印刷配線基板を含み、 共通ラインの上記外方へ延設された部分が、隣接する印
刷配線基板の共通ラインの端部と重ねられて各共通ライ
ンが互いに接続され、 各印刷配線基板ごとに、電子回路装置の入力端子と共通
ラインとは個別に接続手段で電気的に接続されることを
特徴とする印刷配線基板の接続方式。
[Claims] An electronic circuit device having a plurality of input/output terminals is mounted,
A common line connected to the signal source and connected to the input terminal of the electronic circuit device is printed and wired, the ends of the common line including a plurality of printed wiring boards extending outward from the periphery, the common line The outwardly extending portions of the above are overlapped with the ends of the common lines of adjacent printed wiring boards so that the common lines are connected to each other, and the common lines are connected to the input terminals of the electronic circuit device for each printed wiring board. A printed wiring board connection method characterized by electrically connecting lines with individual connection means.
JP27239586A 1986-11-14 1986-11-14 Interconnection system of printed wiring board Granted JPS63126292A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP27239586A JPS63126292A (en) 1986-11-14 1986-11-14 Interconnection system of printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27239586A JPS63126292A (en) 1986-11-14 1986-11-14 Interconnection system of printed wiring board

Publications (2)

Publication Number Publication Date
JPS63126292A true JPS63126292A (en) 1988-05-30
JPH0556877B2 JPH0556877B2 (en) 1993-08-20

Family

ID=17513296

Family Applications (1)

Application Number Title Priority Date Filing Date
JP27239586A Granted JPS63126292A (en) 1986-11-14 1986-11-14 Interconnection system of printed wiring board

Country Status (1)

Country Link
JP (1) JPS63126292A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04489A (en) * 1990-04-17 1992-01-06 Sharp Corp Display device
US5592199A (en) * 1993-01-27 1997-01-07 Sharp Kabushiki Kaisha Assembly structure of a flat type device including a panel having electrode terminals disposed on a peripheral portion thereof and method for assembling the same
US7327090B2 (en) 2002-08-30 2008-02-05 Seiko Epson Corporation Electronic module, methods of manufacturing and driving the same, and electronic instrument

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04489A (en) * 1990-04-17 1992-01-06 Sharp Corp Display device
US5592199A (en) * 1993-01-27 1997-01-07 Sharp Kabushiki Kaisha Assembly structure of a flat type device including a panel having electrode terminals disposed on a peripheral portion thereof and method for assembling the same
US5670994A (en) * 1993-01-27 1997-09-23 Sharp Kabushiki Kaisha Assembly structure of a flat type device including a panel having electrode terminals disposed on a peripheral portion
EP1221717A3 (en) * 1993-01-27 2004-05-12 Sharp Kabushiki Kaisha Assembly structure of a flat type device including a panel having electrode terminals disposed on a peripheral portion thereof and method for assembling the same
US7327090B2 (en) 2002-08-30 2008-02-05 Seiko Epson Corporation Electronic module, methods of manufacturing and driving the same, and electronic instrument
US7924275B2 (en) 2002-08-30 2011-04-12 Seiko Epson Corporation Electronic module, methods of manufacturing and driving the same, and electronic instrument
US8432382B2 (en) 2002-08-30 2013-04-30 Seiko Epson Corporation Electronic module, methods of manufacturing and driving the same, and electronic instrument

Also Published As

Publication number Publication date
JPH0556877B2 (en) 1993-08-20

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