JPS6255693B2 - - Google Patents
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- Publication number
- JPS6255693B2 JPS6255693B2 JP53143643A JP14364378A JPS6255693B2 JP S6255693 B2 JPS6255693 B2 JP S6255693B2 JP 53143643 A JP53143643 A JP 53143643A JP 14364378 A JP14364378 A JP 14364378A JP S6255693 B2 JPS6255693 B2 JP S6255693B2
- Authority
- JP
- Japan
- Prior art keywords
- film
- pattern
- photoresist pattern
- semiconductor substrate
- photoresist
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
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- 239000004065 semiconductor Substances 0.000 claims description 30
- 239000000758 substrate Substances 0.000 claims description 22
- 238000000034 method Methods 0.000 claims description 21
- 239000004020 conductor Substances 0.000 claims description 9
- 238000004519 manufacturing process Methods 0.000 claims description 8
- 239000012298 atmosphere Substances 0.000 claims description 7
- 239000011347 resin Substances 0.000 claims description 6
- 229920005989 resin Polymers 0.000 claims description 6
- 238000005187 foaming Methods 0.000 claims description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 53
- 239000007789 gas Substances 0.000 description 12
- 238000000151 deposition Methods 0.000 description 7
- 238000010438 heat treatment Methods 0.000 description 6
- 229910004298 SiO 2 Inorganic materials 0.000 description 5
- 230000008021 deposition Effects 0.000 description 4
- 238000000206 photolithography Methods 0.000 description 4
- 239000002344 surface layer Substances 0.000 description 4
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000001000 micrograph Methods 0.000 description 2
- 229910052786 argon Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- 239000006260 foam Substances 0.000 description 1
- 239000001307 helium Substances 0.000 description 1
- 229910052734 helium Inorganic materials 0.000 description 1
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 239000012466 permeate Substances 0.000 description 1
- 230000007261 regionalization Effects 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 229910052724 xenon Inorganic materials 0.000 description 1
- FHNFHKCVQCLJFQ-UHFFFAOYSA-N xenon atom Chemical compound [Xe] FHNFHKCVQCLJFQ-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Weting (AREA)
- Drying Of Semiconductors (AREA)
Description
【発明の詳細な説明】
本発明は、半導体装置の製造方法、特に、半導
体集積回路（LSI）の製造に必要とされる微細加
工に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device, and in particular to microfabrication required for manufacturing a semiconductor integrated circuit (LSI).
従来から、半導体装置の製造において、導体膜
のパターンを形成する方法として、感光性樹脂膜
（以下、ホトレジストという）を用いたリフトオ
フ法によつて導体膜のパターンを形成する方法が
ある。 Conventionally, in the manufacture of semiconductor devices, there is a method of forming a pattern of a conductor film by a lift-off method using a photosensitive resin film (hereinafter referred to as photoresist).
まず、導体膜、特にAl膜の従来のパターン形
成法についての一例を第１図により説明する。 First, an example of a conventional pattern forming method for a conductive film, particularly an Al film, will be explained with reference to FIG.
その工程は、酸化膜（以下、SiO2膜という）
２の形成された半導体基板１上にホトリソ技術に
よりホトレジストパターン３を形成する（第１図
ａ）。次に、半導体基板１上にAl膜４を全面に蒸
着したのち（第１図ｂ）、レジスト剥離液により
ホトレジストパターン３′を除去すると同時にホ
トレジストパターン３′上のAl膜４を除去するこ
とによつてAlパターン５を形成する（第１図
ｃ）。 The process involves forming an oxide film (hereinafter referred to as SiO 2 film)
A photoresist pattern 3 is formed on the semiconductor substrate 1 on which the pattern 2 is formed by photolithography (FIG. 1a). Next, after depositing an Al film 4 on the entire surface of the semiconductor substrate 1 (FIG. 1b), the photoresist pattern 3' is removed using a resist stripping solution, and at the same time, the Al film 4 on the photoresist pattern 3' is removed. Thus, an Al pattern 5 is formed (FIG. 1c).
しかるに、上記のようなリフトオフ法において
は、Al膜４を蒸着した際、ホトレジストパター
ン３′側面部にはAl膜４が薄くしか蒸着されず、
しかもピンホールが非常に多く存在する状態にす
ることが必要である。 However, in the above lift-off method, when the Al film 4 is deposited, the Al film 4 is only thinly deposited on the side surface of the photoresist pattern 3';
Moreover, it is necessary to create a state in which there are a large number of pinholes.
その理由は、Al膜４を蒸着した後、Alパター
ンを形成するためにホトレジストパターン３′を
レジスト剥離液により除去するが、この場合、
Al膜４のピンホールを通じて、レジスト剥離液
がホトレジストパターン３′内に浸透することに
よりホトレジストパターン３′の除去が行なわれ
る。それと同時にホトレジストパターン３′上の
Al膜４も除去されることによりAlパターン５を
形成するためである。 The reason for this is that after depositing the Al film 4, the photoresist pattern 3' is removed using a resist stripping solution in order to form an Al pattern.
The resist stripping liquid permeates into the photoresist pattern 3' through the pinholes in the Al film 4, thereby removing the photoresist pattern 3'. At the same time, on the photoresist pattern 3'
This is because the Al pattern 5 is formed by removing the Al film 4 as well.
しかし、上記方法においては、Al膜４の蒸着
時における半導体基板１の温度上昇によりホトレ
ジストパターン３′が軟化し、パターン巾が拡が
るとともにホトレジストパターン３′のエツジ部
分が丸みをおびる。そのため、第１図ｃに示すよ
うにエツジ部分が丸みをおびているホトレジスト
パターン３′上にAl膜４を形成しても、ホトレジ
ストパターン３′側面部には他の領域の膜厚と同
様に膜厚の厚いAl膜４が形成される。したがつ
て、Al膜の膜厚が厚くなれば、ホトレジストパ
ターン側面部のAl膜の膜厚が厚くなるため、Al
膜のピンホールが少なくなりレジスト剥離液によ
つてホトレジストパターンを除去しようとしても
レジスト剥離液がAl膜のピンホールを通じて浸
透しにくいため、リフトオフが困難で歩留りの悪
いものであつた。たとえば、膜厚が1.5μｍのホ
トレジストパターンを用いてリフトオフにより
Alパターンを形成する場合、Al膜の膜厚が0.5μ
ｍ以下でなければリフトオフすることが困難であ
つた。また、このような方法によつて形成した
Alパターンは、リフトオフに用いたホトレジス
トパターンのパターン巾が拡がるとともエツジ部
分が丸みをおびているため所望のパターン巾を得
ることが困難であつた。 However, in the above method, the photoresist pattern 3' softens due to the temperature rise of the semiconductor substrate 1 during the deposition of the Al film 4, the pattern width increases, and the edges of the photoresist pattern 3' become rounded. Therefore, even if the Al film 4 is formed on the photoresist pattern 3' with rounded edges as shown in FIG. A thick Al film 4 is formed. Therefore, as the thickness of the Al film increases, the thickness of the Al film on the side surfaces of the photoresist pattern also increases.
As the number of pinholes in the film decreases, even if an attempt is made to remove the photoresist pattern with a resist stripper, the resist stripper has difficulty penetrating through the pinholes in the Al film, making lift-off difficult and resulting in poor yield. For example, by using a photoresist pattern with a film thickness of 1.5 μm,
When forming an Al pattern, the thickness of the Al film is 0.5μ
It was difficult to lift off unless it was less than m. In addition, the material formed by this method
With the Al pattern, it was difficult to obtain a desired pattern width because the edge portions were rounded as the pattern width of the photoresist pattern used for lift-off increased.
本発明の目的は、比較的膜厚の厚い導体膜でも
微細パターンの形成法留りが高く、しかも、正確
な導体パターンが形成でき、工程の簡略化のでき
る微細加工の方法を提供することである。 An object of the present invention is to provide a microfabrication method that can form a fine pattern even with a relatively thick conductor film, has a high retention rate, can form an accurate conductor pattern, and can simplify the process. be.
すなわち、本発明はホトリソ技術により半導体
基板上にホトレジストパターンを形成し、たとえ
ばガスプラズマにより上記ホトレジストパターン
表面を硬化した後、導電膜を全面に蒸着し、半導
体基板に適度な熱処理を施してホトレジストパタ
ーンを発泡させた後リフトオフ剤として用いて導
体膜のパターンを形成する方法を提供することで
ある。 That is, the present invention forms a photoresist pattern on a semiconductor substrate by photolithography, hardens the surface of the photoresist pattern by, for example, gas plasma, deposits a conductive film on the entire surface, and subjects the semiconductor substrate to appropriate heat treatment to form the photoresist pattern. An object of the present invention is to provide a method for forming a pattern of a conductive film by foaming the foam and using it as a lift-off agent.
本発明は、半導体基板上に形成されたホトレジ
ストパターンをたとえばガスプラズマ中で数分間
熱処理することによりホトレジストパターンと半
導体基板との密着を良くした。同時に、本発明で
はホトレジストパターン表面を硬化することによ
り導体膜例えば、Al膜蒸着時における半導体基
板の温度上昇によるホトレジストパターンの変形
をなくし、Al膜を蒸着した際、ホトレジストパ
ターン側面部にはAl膜が薄くしか蒸着されない
ようにした。さらに、本発明ではAl膜を蒸着し
た後、半導体基板に適度な熱処理を施すことによ
りAl膜と半導体基板との密着を良くすると同時
に、ホトレジストパターンを発泡させ、ホトレジ
ストパターン上のAl膜及びホトレジストパター
ン側面部の膜厚の薄いAl膜に多くピンホールを
存在させた状態でホトレジストパターンをリフト
オフ剤として用いることを特徴とする製造方法で
ある。 The present invention improves the adhesion between the photoresist pattern and the semiconductor substrate by heat-treating the photoresist pattern formed on the semiconductor substrate in, for example, gas plasma for several minutes. At the same time, in the present invention, by hardening the surface of the photoresist pattern, deformation of the photoresist pattern due to the temperature rise of the semiconductor substrate during deposition of a conductor film, for example, an Al film, is eliminated, and when the Al film is deposited, the side surface of the photoresist pattern is covered with an Al film. is deposited only thinly. Furthermore, in the present invention, after depositing the Al film, the semiconductor substrate is subjected to appropriate heat treatment to improve the adhesion between the Al film and the semiconductor substrate, and at the same time, the photoresist pattern is foamed, and the Al film on the photoresist pattern and the photoresist pattern are This manufacturing method is characterized by using a photoresist pattern as a lift-off agent with many pinholes present in the thin Al film on the side surface.
本発明は、微細な例えばAl膜のパターン形成
においてプロセス歩留りを大巾に改善し、工程の
簡略化を可能としたものであり、以下本発明を実
施例とともに説明する。 The present invention greatly improves the process yield and simplifies the process in forming fine patterns of, for example, Al films.The present invention will be described below with reference to Examples.
第２図は、ホトレジストを用いてリフトオフに
より半導体基板上にAlパターンを形成する本発
明の一実施例の工程を示す。 FIG. 2 shows the steps of an embodiment of the present invention in which an Al pattern is formed on a semiconductor substrate by lift-off using a photoresist.
熱酸化法によりSiO2膜１１が形成された半導
体基板１０上にホトリソ技術により所望のホトレ
ジストパターン１２を形成する（第２図ａ）。本
実施例では、ポジタイプのホトレジストを用い、
膜厚を1.5〜2.0μｍとした。次に、上記半導体基
板１０を例えば0.6〜0.8Torr、150〜300WのN2が
スプラズマ雰囲気あるいは0.4〜0.6Torr、20〜
40WのCF4ガスプラズマ雰囲気中で１〜10分間程
度熱処理を施す。この工程によりホトレジストパ
ターン１２′は熱処理されSiO2膜１１との密着性
が良好な状態となつた。それと同時に、ホトレジ
ストパターン１２′の表面層１３が硬化した状態
となつた（第２図ｂ）。このとき、ホトレジスト
パターン１２′の変形はなく、断面形状はホトリ
ソ技術により形成した後の形状と同様であつた。
その後、半導体基板１０上にAl膜１４を全面に
蒸着した（第２図ｃ）。本実施例では電子ビーム
蒸着装置を用いて1.0〜1.2μｍ程度のAl膜を蒸着
したが、ホトレジストパターン１２′の表面層１
３が硬化していることによりAl膜蒸着時におけ
る半導体基板１０の温度上昇によるホトレジスト
パターン１２′の変形はなく、ホトレジストパタ
ーン１２′の側面部１５には薄くしかAl膜が蒸着
されず、しかも、ここのAl膜はピンホールの多
いものであつた。 A desired photoresist pattern 12 is formed by photolithography on the semiconductor substrate 10 on which the SiO 2 film 11 has been formed by thermal oxidation (FIG. 2a). In this example, positive type photoresist is used,
The film thickness was set to 1.5 to 2.0 μm. Next, the semiconductor substrate 10 is placed in a N 2 plasma atmosphere of 0.6 to 0.8 Torr, 150 to 300 W, or in a plasma atmosphere of 0.4 to 0.6 Torr, 20 to 300 W.
Heat treatment is performed for about 1 to 10 minutes in a 40W CF 4 gas plasma atmosphere. Through this step, the photoresist pattern 12' was heat-treated and its adhesion to the SiO 2 film 11 became good. At the same time, the surface layer 13 of the photoresist pattern 12' became hardened (FIG. 2b). At this time, there was no deformation of the photoresist pattern 12', and the cross-sectional shape was the same as the shape after being formed by photolithography.
Thereafter, an Al film 14 was deposited over the entire surface of the semiconductor substrate 10 (FIG. 2c). In this example, an Al film of about 1.0 to 1.2 μm was deposited using an electron beam evaporator, but the surface layer 1 of the photoresist pattern 12'
3 is cured, the photoresist pattern 12' is not deformed due to the temperature rise of the semiconductor substrate 10 during Al film deposition, and the Al film is only thinly deposited on the side surface 15 of the photoresist pattern 12'. The Al film here had many pinholes.
次に、半導体基板１０にガスプラズマ雰囲気中
による熱処理及びAl膜蒸着時における半導体基
板の温度上昇より高い温度で、例えば、N2ガス
雰囲中で200〜400℃程度の熱処理を数秒間施した
（第２図ｄ）。この工程により、Al膜４とSiO2膜
１１との密着が良好な状態となつた。それと同時
に、ホトレジストパターン１２′の表面層１３以
外の部分が、熱処理によりホトレジスト中の溶剤
が外部に出ようとするために膨張（気泡ができる
ため）し、ホトレジストパターン１２′上のAl膜
１４′にピンホールを発生させる。しかも、ホト
レジストパターン１２′の側面部１５の膜厚の薄
い部分のAl膜１４′では、ピンホールの大きさが
拡大されホトレジストがAl膜１４上に、はみ出
した状態となつた。次にレジスト剥離液により上
記ホトレジストパターン１２′を除去することに
よつてホトレジストパターン１２′上のAl膜１
４′を除去しAlパターン１６を形成した（第２図
ｅ）。 Next, the semiconductor substrate 10 is subjected to heat treatment in a gas plasma atmosphere and heat treatment for several seconds at a temperature higher than the temperature rise of the semiconductor substrate during Al film deposition, for example, at about 200 to 400° C. in an N 2 gas atmosphere. (Figure 2d). Through this step, good adhesion between the Al film 4 and the SiO 2 film 11 was achieved. At the same time, the portion of the photoresist pattern 12' other than the surface layer 13 expands (due to the formation of bubbles) as the solvent in the photoresist tries to come out due to the heat treatment, and the Al film 14' on the photoresist pattern 12' expands. generates a pinhole. Furthermore, in the thin Al film 14' on the side surface 15 of the photoresist pattern 12', the size of the pinhole was enlarged and the photoresist protruded onto the Al film 14. Next, by removing the photoresist pattern 12' with a resist stripping solution, the Al film 1 on the photoresist pattern 12' is removed.
4' was removed to form an Al pattern 16 (FIG. 2e).
第３図ａ，ｂ，ｃは、第２図ｃ，ｄ，ｅでの平
面パターン写真を示し、第３図a′，b′，c′はそれ
ぞれ第３図ａ，ｂ，ｃのＡ―A′，Ｂ―B′，Ｃ―
C′線断面図を示し第２図ｃ，ｄ，ｅの状態と同
じである。第３図ａ，ｂ，ｃは、800倍の表面顕
微鏡写真を示し、ホトレジストパターンのストラ
イプ部のパターン巾は５μｍで、パターン間隔も
５μｍである。この図から明らかなように、第３
図ｃのごとく、膜厚が1.0〜1.2μｍのAl膜でもパ
ターン巾５μｍを有するAlパターン１６を正確
に形成することができる。 Figures 3a, b, and c show plane pattern photographs in Figures 2c, d, and e, and Figures 3a', b', and c' are A--, respectively, in Figures 3a, b, and c. A', B-B', C-
The cross-sectional view taken along line C' is the same as that shown in FIGS. 2c, d, and e. FIGS. 3a, b, and c show surface micrographs magnified 800 times, and the pattern width of the striped portion of the photoresist pattern is 5 μm, and the pattern interval is also 5 μm. As is clear from this figure, the third
As shown in FIG. c, even with an Al film having a thickness of 1.0 to 1.2 μm, an Al pattern 16 having a pattern width of 5 μm can be accurately formed.
したがつて、第２図のような方法においては、
ホトレジストパターン側面部に蒸着されたAl膜
は薄く、且つ、非常にピンホールが多く、しか
も、ホトレジストがはみ出しているためレジスト
剥離液によつて容易にホトレジストパターン除去
ができ、さらにAl膜が段切れをおこしているた
めホトレジストパターン上のAl膜のリフトオフ
が容易になつた。また、ホトレジストパターンの
パターン変形がないため所望のパターン巾を有す
るAlパターンを形成することができ、且つ、プ
ロセス歩留りも高く半導体集積回路の製造に極め
て好都合である。 Therefore, in the method shown in Figure 2,
The Al film deposited on the side of the photoresist pattern is thin and has many pinholes, and since the photoresist protrudes, the photoresist pattern can be easily removed with a resist stripping solution, and the Al film is cut off. This made it easier to lift off the Al film on the photoresist pattern. Further, since there is no pattern deformation of the photoresist pattern, an Al pattern having a desired pattern width can be formed, and the process yield is high, which is extremely convenient for manufacturing semiconductor integrated circuits.
なお、上記実施例では、Al膜のリフトオフに
ついて説明したが、Mo膜等の金属体も同様にホ
トレジストを用いてリフトオフすることができ、
良好な結果を得ることができた。また、ガスプラ
ズマのガスとしてN2ガスあるいはCF4ガスを用い
て説明したが、アルゴンガス、キセノンガス、ヘ
リウムガス等の不活性ガスを用いても良い。 In the above embodiment, lift-off of the Al film was explained, but metal bodies such as Mo films can also be lifted-off using photoresist.
Good results were obtained. Further, although the description has been made using N 2 gas or CF 4 gas as the gas of the gas plasma, an inert gas such as argon gas, xenon gas, helium gas, etc. may also be used.
第１図はａ〜ｃは従来のホトレジストを用いて
リフトオフによりAlパターンを形成する方法の
一実施例の工程図、第２図ａ〜ｅは本発明にかか
るAlパターンの形成工程図、第３図ａ，ｂ，ｃ
は第２図ｃ，ｄ，ｅにおける半導体装置の平面の
顕微鏡写真、第３図a′，b′，c′はそれぞれ同第３
図ａ，ｂ，ｃのＡ―A′，Ｂ―B′，Ｃ―C′線断面
図である。
１０…半導体基板、１１…SiO2膜、１２，１
２…ホトレジストパターン、１３…表面層、１４
…Al膜、１６…Alパターン。
1A to 1C are process diagrams of an embodiment of a method for forming an Al pattern by lift-off using a conventional photoresist; FIGS. 2A to 2E are process diagrams of an Al pattern formation process according to the present invention; Figures a, b, c
are micrographs of the plane of the semiconductor device in Fig. 2 c, d, and e, and Fig. 3 a', b', and c' are the same photomicrographs, respectively.
FIG. 3 is a cross-sectional view taken along lines A-A', B-B', and C-C' in figures a, b, and c. 10...Semiconductor substrate, 11...SiO 2 film, 12,1
2... Photoresist pattern, 13... Surface layer, 14
...Al film, 16...Al pattern.
Claims (1)
有する感光性樹脂膜パターンを形成する工程と、
前記感光性樹脂膜パターンの少なくとも表面をガ
スプラズマ雰囲気中で処理して硬化させるととも
に耐熱性を向上する工程と、前記半導体基板上全
面に導体膜を形成する工程と、前記半導体基板に
熱処理を施し前記感光性樹脂膜を、前記感光性樹
脂膜パターン側面部の前記導体膜にピンホールを
形成する程度に発泡させる工程と、前記感光性樹
脂膜パターンを除去して、前記導体膜のパターン
を形成する工程とを備えたことを特徴とする半導
体装置の製造方法。 ２ 半導体基板に熱処理を施す工程が、ガスプラ
ズマ雰囲気中による熱処理及び導体膜形成時にお
ける温度よりも高い温度で熱処理を施すことを特
徴とする特許請求の範囲第１項に記載の半導体装
置の製造方法。 ３ 導体膜が、Al膜であることを特徴とする特
許請求の範囲第１項に記載の半導体装置の製造方
法。[Claims] 1. Forming a photosensitive resin film pattern having a desired pattern width on one main surface of a semiconductor substrate;
a step of treating at least the surface of the photosensitive resin film pattern in a gas plasma atmosphere to cure it and improve heat resistance; a step of forming a conductor film on the entire surface of the semiconductor substrate; and a step of heat-treating the semiconductor substrate. foaming the photosensitive resin film to the extent that pinholes are formed in the conductor film on the side surface of the photosensitive resin film pattern; and removing the photosensitive resin film pattern to form a pattern of the conductor film. A method for manufacturing a semiconductor device, comprising the steps of: 2. Manufacturing a semiconductor device according to claim 1, wherein the step of heat-treating the semiconductor substrate is heat-treating in a gas plasma atmosphere and at a temperature higher than the temperature at which the conductor film is formed. Method. 3. The method of manufacturing a semiconductor device according to claim 1, wherein the conductor film is an Al film.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14364378A JPS5570028A (en) | 1978-11-20 | 1978-11-20 | Fabricating method of semiconductor device |
| US06/047,241 US4253888A (en) | 1978-06-16 | 1979-06-11 | Pretreatment of photoresist masking layers resulting in higher temperature device processing |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14364378A JPS5570028A (en) | 1978-11-20 | 1978-11-20 | Fabricating method of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5570028A JPS5570028A (en) | 1980-05-27 |
| JPS6255693B2 true JPS6255693B2 (en) | 1987-11-20 |
Family
ID=15343543
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14364378A Granted JPS5570028A (en) | 1978-06-16 | 1978-11-20 | Fabricating method of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5570028A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR920002028B1 (en) * | 1988-07-21 | 1992-03-09 | 삼성반도체통신 주식회사 | Lift-off process using by-product |
| JP2744356B2 (en) * | 1991-03-06 | 1998-04-28 | 富士通株式会社 | Method for manufacturing semiconductor device |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5346281A (en) * | 1976-10-08 | 1978-04-25 | Matsushita Electric Ind Co Ltd | Mask for semiconductor device and production of semiconductor device using the same |
| JPS5373073A (en) * | 1976-12-11 | 1978-06-29 | Fujitsu Ltd | Treatment method for photo resist |
-
1978
- 1978-11-20 JP JP14364378A patent/JPS5570028A/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5346281A (en) * | 1976-10-08 | 1978-04-25 | Matsushita Electric Ind Co Ltd | Mask for semiconductor device and production of semiconductor device using the same |
| JPS5373073A (en) * | 1976-12-11 | 1978-06-29 | Fujitsu Ltd | Treatment method for photo resist |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5570028A (en) | 1980-05-27 |
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