JPS6251881U - - Google Patents

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Publication number
JPS6251881U
JPS6251881U JP14315385U JP14315385U JPS6251881U JP S6251881 U JPS6251881 U JP S6251881U JP 14315385 U JP14315385 U JP 14315385U JP 14315385 U JP14315385 U JP 14315385U JP S6251881 U JPS6251881 U JP S6251881U
Authority
JP
Japan
Prior art keywords
signal
mixing
television video
video signal
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14315385U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP14315385U priority Critical patent/JPS6251881U/ja
Publication of JPS6251881U publication Critical patent/JPS6251881U/ja
Pending legal-status Critical Current

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  • Television Systems (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本考案の映像信号処理装置のブロツク
図、第２図及び第３図はそのタイミングチヤート
である。 １…再生手段、２…処理回路、３…光源、４…
ハーフミラー、５…ビデオデイスク、６…光検出
器、７…ヘツドアンプ、８…周波数検波器、９…
カラーバースト分離回路、１０…垂直同期分離回
路、１１…水平同期分離回路、１２…垂直ブラン
キング処理回路、１３…位相比較器、１４，２０
…補償増幅器、１５…ミラードライバ、１６…ア
クチユエータ、１７，３８…基準信号発生器、１
８…周波数位相比較器、１９…加算器、２１…ス
ピンドルドライバ、２２…スピンドルモータ、３
１…クランプ回路、３２…混合回路、３３…カウ
ンタ、３４…中央処理装置、３５…データカウン
タ、３６…シフトレジスタ、３７…アドレスセレ
クタ、３９…アドレスカウンタ、４０…メモリ。 FIG. 1 is a block diagram of the video signal processing device of the present invention, and FIGS. 2 and 3 are timing charts thereof. DESCRIPTION OF SYMBOLS 1... Reproducing means, 2... Processing circuit, 3... Light source, 4...
Half mirror, 5...video disk, 6...photodetector, 7...head amplifier, 8...frequency detector, 9...
Color burst separation circuit, 10... Vertical synchronization separation circuit, 11... Horizontal synchronization separation circuit, 12... Vertical blanking processing circuit, 13... Phase comparator, 14, 20
...compensation amplifier, 15...mirror driver, 16...actuator, 17, 38...reference signal generator, 1
8... Frequency phase comparator, 19... Adder, 21... Spindle driver, 22... Spindle motor, 3
DESCRIPTION OF SYMBOLS 1... Clamp circuit, 32... Mixing circuit, 33... Counter, 34... Central processing unit, 35... Data counter, 36... Shift register, 37... Address selector, 39... Address counter, 40... Memory.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 記録媒体に記録されているテレビジヨン映像信
号を再生する再生手段と、該再生手段により再生
された該テレビジヨン映像信号をクランプするク
ランプ回路と、該クランプ回路によりクランプさ
れた該テレビジヨン映像信号に２値情報信号を混
合する混合回路と、該テレビジヨン映像信号から
同期信号を分離する同期信号分離手段と、該同期
信号分離手段により分離された該同期信号を基準
として、該２値情報信号を混合する位置に対応し
た位置信号を生成するカウンタと、該２値情報信
号を記憶するメモリと、該カウンタが出力する該
位置信号に対応して、該メモリに記憶されている
該２値情報信号を該混合回路に供給するシフトレ
ジスタとを備えることを特徴とする映像信号処理
装置。 A reproduction means for reproducing a television video signal recorded on a recording medium, a clamp circuit for clamping the television video signal reproduced by the reproduction means, and a clamp circuit for clamping the television video signal clamped by the clamp circuit. a mixing circuit for mixing binary information signals; a sync signal separating means for separating a sync signal from the television video signal; a counter that generates a position signal corresponding to a mixing position; a memory that stores the binary information signal; and a binary information signal stored in the memory corresponding to the position signal output by the counter. and a shift register that supplies the mixing circuit with a shift register.
JP14315385U 1985-09-19 1985-09-19 Pending JPS6251881U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14315385U JPS6251881U (en) 1985-09-19 1985-09-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14315385U JPS6251881U (en) 1985-09-19 1985-09-19

Publications (1)

Publication Number Publication Date
JPS6251881U true JPS6251881U (en) 1987-03-31

Family

ID=31052564

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14315385U Pending JPS6251881U (en) 1985-09-19 1985-09-19

Country Status (1)

Country Link
JP (1) JPS6251881U (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5627579A (en) * 1979-08-13 1981-03-17 Matsushita Electric Ind Co Ltd Video signal processor
JPS58136184A (en) * 1982-02-08 1983-08-13 Hitachi Ltd Video recorder and reproducer
JPS59132285A (en) * 1982-10-22 1984-07-30 ジヨ−ジ・フアン・フアルケンブルグ Device and method for generating and inserting additional information to video signal
JPS60130971A (en) * 1983-12-20 1985-07-12 Matsushita Electric Ind Co Ltd Synchronizing signal separating circuit

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5627579A (en) * 1979-08-13 1981-03-17 Matsushita Electric Ind Co Ltd Video signal processor
JPS58136184A (en) * 1982-02-08 1983-08-13 Hitachi Ltd Video recorder and reproducer
JPS59132285A (en) * 1982-10-22 1984-07-30 ジヨ−ジ・フアン・フアルケンブルグ Device and method for generating and inserting additional information to video signal
JPS60130971A (en) * 1983-12-20 1985-07-12 Matsushita Electric Ind Co Ltd Synchronizing signal separating circuit

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