JPS6249626A - Semiconductor manufacturing equipment - Google Patents

Semiconductor manufacturing equipment

Info

Publication number
JPS6249626A
JPS6249626A JP18845285A JP18845285A JPS6249626A JP S6249626 A JPS6249626 A JP S6249626A JP 18845285 A JP18845285 A JP 18845285A JP 18845285 A JP18845285 A JP 18845285A JP S6249626 A JPS6249626 A JP S6249626A
Authority
JP
Japan
Prior art keywords
insulating
anode
substrate
film
semiconductor manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18845285A
Other languages
Japanese (ja)
Inventor
Haruji Shinada
品田 春治
Hiroshi Tamura
宏 田村
Kazuhiro Kawajiri
和廣 川尻
Akio Azuma
昭男 東
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujifilm Holdings Corp
Original Assignee
Fuji Photo Film Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Photo Film Co Ltd filed Critical Fuji Photo Film Co Ltd
Priority to JP18845285A priority Critical patent/JPS6249626A/en
Publication of JPS6249626A publication Critical patent/JPS6249626A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To form a uniform thin film on a substrate without deteriorating the surface of an anode by applying a voltage through an insulating material, an insulating plate or an insulating film, which is inserted inside the anode. CONSTITUTION:A substrate 1 is attached to a cathode 2 which is grounded to the earth, placed in parallel with an anode 3 which is applied with high voltage and is provided in a vacuum chamber 4. After the vacuum chamber 4 is exhausted, a gas is introduced and a raw material gas is decomposed by glow discharge generated by a high frequency power source 5 and the electrodes 2, 3 and an insulating thin film is formed on the surface of the substrate 1. In this case, an insulating plate 6 is inserted inside the anode 3 and a voltage is applied through the insulating plate 6. This forms a well reproducible, uniform and homogeneous thin film on the substrate 1 without deteriorating the surface conditions of the anode 3.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は、いわゆるプラズマCVD法(化学的気相析出
法)により半導体薄膜等を形成する半導体製造装置に関
し、特にグロー放電により半導体ガスを分解して、層間
絶縁膜、パッシベーション膜等の絶縁性薄膜を形成する
ときの電極構造を改善したものである。
Detailed Description of the Invention [Industrial Field of Application] The present invention relates to a semiconductor manufacturing apparatus for forming semiconductor thin films etc. by the so-called plasma CVD method (chemical vapor deposition method), and in particular, the present invention relates to a semiconductor manufacturing apparatus for forming semiconductor thin films etc. by the so-called plasma CVD method (chemical vapor deposition method). This improves the electrode structure when forming insulating thin films such as interlayer insulating films and passivation films.

[従来の較術] プラズマCVD法は周知のように、減圧容器中でガス種
の非平衡プラズマを作り、分解堆積を行うものである。
[Conventional Technique] As is well known, the plasma CVD method creates a non-equilibrium plasma of gas species in a reduced pressure container and performs decomposition and deposition.

このようなプラズマCVD法を用いた従来の半導体製造
装置としては、第2図に示すものが一般的であり、 I
Cを構成するシリコンウェハ等の基板lは大地接地した
カソード側電極2に取付けられて、高圧印加のアノード
側電極3と面を平行にして対設し、これら1〜3が反応
室である真空槽(チャン/す4の内部に配設されている
As a conventional semiconductor manufacturing apparatus using such a plasma CVD method, the one shown in FIG. 2 is common.
A substrate l such as a silicon wafer constituting C is attached to a grounded cathode electrode 2, and is placed parallel to and facing an anode electrode 3 to which high voltage is applied, and these 1 to 3 are in a vacuum which is a reaction chamber. It is arranged inside the tank (Chang/Su4).

真空槽4の排気はロータリーポンプもしくはメカニカル
ブースターポンプや拡散ポンプ等を併用して行われ、そ
の後に使用ガスが真空槽4に導入される。高周波電源5
と電極2,3によって発生したグロー放電により原料ガ
スを分解して、基板lの表面に層間絶縁膜、パッシベー
ション膜等の絶縁性薄膜を形成する。
The vacuum chamber 4 is evacuated using a rotary pump, a mechanical booster pump, a diffusion pump, etc., and then the gas to be used is introduced into the vacuum chamber 4. High frequency power supply 5
The raw material gas is decomposed by the glow discharge generated by the electrodes 2 and 3, and an insulating thin film such as an interlayer insulating film or a passivation film is formed on the surface of the substrate l.

[発明が解決しようとする問題点] しかし、従来ではアノード側電極3およびカソード側電
極2にはアルミニウムやステンレス等の金属を使用して
いたので、アノード側電極3偏に使用により付着した塵
芥や染み等のよごれにより、電極2.3の平行平板間に
かかる電界のかかり方に不均一が生じた。基板l上の絶
縁膜の形成は平行平板の電極の対向電界により影響を受
けるので、その電界の不均一に対応して絶縁膜に不均一
性が生ずるという問題点があった。
[Problems to be Solved by the Invention] However, in the past, metals such as aluminum and stainless steel were used for the anode side electrode 3 and the cathode side electrode 2, so dust and dirt that adhered to the anode side electrode 3 due to use were easily removed. Due to dirt such as stains, non-uniformity occurred in the way the electric field was applied between the parallel plates of the electrodes 2.3. Since the formation of the insulating film on the substrate l is affected by the opposing electric field of the parallel plate electrodes, there is a problem in that non-uniformity occurs in the insulating film corresponding to the non-uniformity of the electric field.

本発明は、上述の問題点に鑑み、アノード側電極の表面
状態にかかられす、再現性良く、均一で、均質な膜を形
成できる半導体製造装置を提供することを目的とする。
SUMMARY OF THE INVENTION In view of the above-mentioned problems, an object of the present invention is to provide a semiconductor manufacturing apparatus that can form a uniform and homogeneous film with good reproducibility, regardless of the surface condition of the anode side electrode.

[問題点を解決するための手段] 本目的を達成するために、本発明は平行平板の大地接地
したカソード側電極と、高圧印加のアノード側電極から
成るプラズマCVDによる半導体製造装置において、ア
ノード側電極の内側表面を覆う絶縁部材を具備したこと
を特徴とする。
[Means for Solving the Problems] In order to achieve the present object, the present invention provides a plasma CVD semiconductor manufacturing apparatus comprising a parallel plate grounded cathode electrode and a high voltage applied anode electrode. It is characterized by comprising an insulating member that covers the inner surface of the electrode.

[作 用] 本発明では、アノード側電極の基板と対向する側(内側
)に、石英板のような絶縁抵抗の比較的大きな絶縁部材
を挿入配設し、この絶縁部材を間に介して電圧を印加す
るようにしている。絶縁部材は絶縁抵抗が大きく、容量
も大きいので塵芥等の影響を受けない、従って、本発明
によればアノード側電極の使用による劣化が防止でき、
アノード側電極の表面状態の影響を受けずに再現性およ
び均一性、均質の良好な絶縁性薄膜を基板上に形成する
ことが回部となる。
[Function] In the present invention, an insulating member having a relatively high insulation resistance, such as a quartz plate, is inserted into the side (inner side) of the anode side electrode facing the substrate, and a voltage is applied through this insulating member. is applied. Since the insulating member has a high insulation resistance and a large capacity, it is not affected by dust, etc. Therefore, according to the present invention, deterioration due to the use of the anode side electrode can be prevented,
The goal is to form an insulating thin film with good reproducibility, uniformity, and homogeneity on a substrate without being affected by the surface condition of the anode side electrode.

[実施例] 以下、図面を参照して本発明の実施例を詳細に説明する
[Example] Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

第1図は本発明半導体製造装置の実施例の構成を示す、
本図において、6は基板lと対向したアノード側電極3
の内側表面を全面に覆って@置した平らな石英板のよう
な絶縁板である。その他の構成は第2図で示した従来例
と同様なので、その詳細な説明は省略する。
FIG. 1 shows the configuration of an embodiment of the semiconductor manufacturing apparatus of the present invention.
In this figure, 6 is an anode side electrode 3 facing the substrate l.
It is an insulating plate like a flat quartz plate that is placed over the entire inner surface of the quartz plate. The rest of the configuration is the same as the conventional example shown in FIG. 2, so detailed explanation thereof will be omitted.

絶縁板6は膜の形成に必要な空間を確保できればアノー
ド側電極3から浮かせて良く、その電極3に密着させる
必要はない、このようにアノード側電極3の内側に設置
した石英板等の絶縁板6を介してグロー放電をさせてい
るが、石英板の如き絶縁板6は絶縁抵抗が大きく、容量
も大きいので残塵等の影響をほとんど受けない、すなわ
ち、絶縁板6に付着した絶縁性薄膜の残渣等のよごれの
影響も、アノード側電極3の導体を直接露出させたもの
に比べて容量の変化が生じないので、極めて少ない、ま
た、絶縁板6を挿入したことによる電圧効果は、絶縁板
6の容量がプラズマ中の容量に比べて大きいため、問題
とならないほど少なく、無視できる。従って、本例によ
れば、アノード側電極3の表面の状態の変化を受けず、
また絶縁板6のよごれの多少にかかわらず、電極2.3
の平行平板間の電界のかかり方が常に均一化し、そのた
め再現性、均一性、均質性の良好な絶縁性膜を基板1に
形成することが回部となる。
The insulating plate 6 may be floated above the anode side electrode 3 if the space necessary for film formation can be secured, and there is no need to make it closely contact the anode side electrode 3. Glow discharge is caused through the plate 6, but since the insulating plate 6, such as a quartz plate, has high insulation resistance and large capacity, it is hardly affected by residual dust, etc. The effect of dirt such as thin film residue is extremely small, as there is no change in capacitance compared to when the conductor of the anode side electrode 3 is directly exposed.Furthermore, the voltage effect due to the insertion of the insulating plate 6 is Since the capacitance of the insulating plate 6 is larger than the capacitance in the plasma, it is so small that it does not pose a problem and can be ignored. Therefore, according to this example, there is no change in the surface state of the anode side electrode 3;
Moreover, regardless of the degree of dirt on the insulating plate 6, the electrode 2.3
The application of the electric field between the parallel plates is always uniform, so that an insulating film with good reproducibility, uniformity, and homogeneity can be formed on the substrate 1.

例えば、使用ガスとしてSin、を30SCGNおよび
NH3を24O5CCN使用し、0.7Torrで、5
■■の厚さのアノード側電極3に25Wを印加する通常
のプラズマCVDの条件下で、3インチウェハのシリコ
ン基板上に窒化膜を形成した場合、第2図に示すような
従来?tRでは、第3図に示すように中央部の膜厚0.
5俸脂〜l俸■に対して端部の膜厚が約3倍の1.51
L■〜31L層となる不均一な膜厚となるが、同一の条
件下で絶縁板6として0.4m層〜0.51朧の厚さの
石英板を用いた本発明実施例では、窒化膜の中央部と端
部との膜厚差が常に略±5%以内におさまることが実験
により確認された。
For example, using Sin as the gas used, 30SCGN and NH3 as 24O5CCN, at 0.7 Torr, 5
When a nitride film is formed on a 3-inch wafer silicon substrate under normal plasma CVD conditions in which 25 W is applied to the anode side electrode 3 with a thickness of ■■, the conventional ? At tR, as shown in FIG. 3, the film thickness at the center is 0.
The film thickness at the edge is about 3 times as much as 1.51 compared to 5 yen to 1 yen.
Although the film thickness is non-uniform as L■ to 31L layers, in the embodiment of the present invention in which a quartz plate with a thickness of 0.4 m to 0.51 m is used as the insulating plate 6 under the same conditions, the nitrided It was confirmed through experiments that the difference in film thickness between the center and end portions of the film was always within approximately ±5%.

なお、絶縁板6の代りにlやステンレスからなるアノー
ド側電極3の金属表面上に、石英(Si02 )のよう
な絶縁部材により絶縁被膜を直接形成してもよいのは勿
論である。しかし、このような絶縁被膜を形成するのに
比べて、絶縁板6を配設する場合は、取替が格段に楽で
あり、メンテナンス作業が容易である利点を有する。ま
た、初めから金属電極に被膜を形成したものを使用する
と、アノード側にも分解ガスによる膜が付着し、何回も
使用している内にそれがしみむら等となってデボート条
件が変わり、再現性が得られなくなるという問題点もあ
る。
Of course, instead of the insulating plate 6, an insulating film may be formed directly on the metal surface of the anode side electrode 3 made of quartz or stainless steel using an insulating material such as quartz (Si02). However, compared to forming such an insulating film, providing the insulating plate 6 has the advantage that replacement is much easier and maintenance work is easier. Additionally, if you use a metal electrode with a film formed on it from the beginning, a film of decomposed gas will also adhere to the anode side, and as it is used many times, it will become stained and uneven, and the deboot conditions will change. There is also the problem that reproducibility cannot be obtained.

[発明の効果1 以上説明したように、本発明によれば、大地接地したカ
ソード側電極と高圧印加のアノード側電極から成る平行
平板型のプラズマCVDによる半導体装造装置において
、アノード側電極の内側に絶縁板または絶縁膜の絶縁部
材を挿入設置し、この絶縁部材を介して電圧を印加する
ようにしたので、使用によるアノード側電極の表面状態
の劣化を受けずに、再現性良く、均一で均質な薄膜を基
板上に形成することができる効果が得られる。
[Effects of the Invention 1] As explained above, according to the present invention, in a parallel plate plasma CVD semiconductor device comprising a grounded cathode electrode and a high voltage applied anode electrode, the inner side of the anode electrode An insulating member such as an insulating plate or an insulating film is inserted into the insulating member, and a voltage is applied through this insulating member. Therefore, the surface condition of the anode side electrode does not deteriorate due to use, and it can be reproducibly and uniformly applied. The effect is that a homogeneous thin film can be formed on the substrate.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明実施例装置の構成を示す模式第2図は従
来装置の構成を示す模式図、第3図は従来装置での膜形
成結果を示す断面図である。 l・・・基板、2・・・カソード側電極、3・・・アノ
ード側電極、4・・・真空槽、5・・・電源、6・・・
絶縁板。
FIG. 1 is a schematic diagram showing the configuration of an apparatus according to an embodiment of the present invention, FIG. 2 is a schematic diagram showing the configuration of a conventional apparatus, and FIG. 3 is a cross-sectional view showing the result of film formation using the conventional apparatus. l... Substrate, 2... Cathode side electrode, 3... Anode side electrode, 4... Vacuum chamber, 5... Power supply, 6...
Insulating board.

Claims (1)

【特許請求の範囲】 1)a)平行平板の大地接地したカソード側電極と、高
圧印加のアノード側電極から成るプラズマCVDによる
半導体製造装置において、b)前記アノード側電極の内
側表面を覆う絶縁部材を具備したことを特徴とする半導
体製造装置。 2)特許請求の範囲第1項記載の装置において、前記絶
縁部材は前記カソード側電極に取付けた基板と前記アノ
ード側電極間に介挿された絶縁板、または前記アノード
側電極の内側表面を被膜する絶縁膜であることを特徴と
する半導体製造装置。
[Scope of Claims] 1) A plasma CVD semiconductor manufacturing apparatus comprising: a) a grounded cathode electrode of a parallel plate; and an anode electrode to which a high voltage is applied; b) an insulating member covering the inner surface of the anode electrode. A semiconductor manufacturing device characterized by comprising: 2) In the device according to claim 1, the insulating member is an insulating plate inserted between a substrate attached to the cathode electrode and the anode electrode, or a coating on the inner surface of the anode electrode. A semiconductor manufacturing device characterized in that the insulating film is
JP18845285A 1985-08-29 1985-08-29 Semiconductor manufacturing equipment Pending JPS6249626A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18845285A JPS6249626A (en) 1985-08-29 1985-08-29 Semiconductor manufacturing equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18845285A JPS6249626A (en) 1985-08-29 1985-08-29 Semiconductor manufacturing equipment

Publications (1)

Publication Number Publication Date
JPS6249626A true JPS6249626A (en) 1987-03-04

Family

ID=16223942

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18845285A Pending JPS6249626A (en) 1985-08-29 1985-08-29 Semiconductor manufacturing equipment

Country Status (1)

Country Link
JP (1) JPS6249626A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6446936A (en) * 1987-08-17 1989-02-21 Nippon Telegraph & Telephone Growth method of thin film
US5012770A (en) * 1989-07-24 1991-05-07 Nissan Motor Co., Ltd. Intake apparatus for internal combustion engine

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6446936A (en) * 1987-08-17 1989-02-21 Nippon Telegraph & Telephone Growth method of thin film
US5012770A (en) * 1989-07-24 1991-05-07 Nissan Motor Co., Ltd. Intake apparatus for internal combustion engine

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