JPS62261136A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS62261136A
JPS62261136A JP61105357A JP10535786A JPS62261136A JP S62261136 A JPS62261136 A JP S62261136A JP 61105357 A JP61105357 A JP 61105357A JP 10535786 A JP10535786 A JP 10535786A JP S62261136 A JPS62261136 A JP S62261136A
Authority
JP
Japan
Prior art keywords
bonding pad
film
semiconductor device
insulating
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61105357A
Other languages
Japanese (ja)
Inventor
Sazuku Kamata
鎌田 授
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP61105357A priority Critical patent/JPS62261136A/en
Publication of JPS62261136A publication Critical patent/JPS62261136A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05554Shape in top view being square
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To prevent occurrence of cracks due to the needle pressure of a metallic probe at the time of characteristic inspection and short circuits between a bonding pad and a semiconductor substrate and to enhance the yield rate of products and reliability, by forming an insulating protecting film at a part separated from the bonding pad. CONSTITUTION:An insulating protecting film 1 comprising an oxide film and a nitride film is formed on a metallic film at a part separated by a distance (d). It is desirable that the distance (d) is slightly larger than the diameter of the tip of a metallic probe, which is contacted with a the bonding pad 2 in the inspecting process of a semiconductor device. Even if the metallic probe of a prober is positioned on the bonding pad 2 and slipped laterally in the inspecting process of the semiconductor device, the tip of the metallic probe is stopped at a side wall 6 of the insulating protecting film 1, which is separated from the bonding pad 2. Therefore, even if cracks occur in an insulating film 3 beneath the stopped position, the short circuit between the bonding pad 2 and a semiconductor substrate 4 is avoided by migration, which is yielded in the bonding pad 2.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a semiconductor device.

〔従来の技術〕[Conventional technology]

従来、トランジスタや集積回路(IC)等の半導体装置
のボンティングパッド部の構造は第2図に示すごとく、
千尋体基板4上に絶縁膜3が形成され、この絶縁膜3の
上に金属膜からなる配線及びポンティングパッド2を形
成した後、表面捕獲の為、ボンディングパッド2の一部
を除く表面に絶縁保護膜lが被覆されているものであっ
た。
Conventionally, the structure of the bonding pad portion of semiconductor devices such as transistors and integrated circuits (ICs) is as shown in Figure 2.
An insulating film 3 is formed on a chihiro body substrate 4, and after forming wiring made of a metal film and bonding pads 2 on this insulating film 3, the surface except for a part of the bonding pads 2 is coated to capture the surface. It was covered with an insulating protective film l.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述した従来のボンディングパッド部を有する半導体装
置では、第2図で示したように半導体基板4に素子を形
成後、自動プローバ等を使用した金属探針5を接触させ
て、特性検査を行うが、自動プローバの装置の設定から
通常、全組探針5には圧力(以下針圧という)が加わる
。この為ボンディングパッド2には凹部が形成されたり
、又はボンディングパッド2が突き抜かれ金属探針5が
ボンディングパッド下の絶縁膜3上に達し、さらに金属
性探針5の弾力性から絶縁膜3よシ柔かいボンディング
パッドの横力向へとすべるという現象が生じていた。す
なわち、第2図において金属探針5が矢印の方向にすペ
ク、絶縁保護膜1の壁6偽所に移動するという現象であ
る。
In the conventional semiconductor device having the above-mentioned bonding pad section, after forming an element on the semiconductor substrate 4 as shown in FIG. 2, a characteristic test is performed by contacting it with a metal probe 5 using an automatic prober or the like. Normally, pressure (hereinafter referred to as needle pressure) is applied to all sets of probes 5 due to the settings of the automatic prober device. For this reason, a recess is formed in the bonding pad 2, or the bonding pad 2 is pierced and the metal probe 5 reaches the top of the insulating film 3 under the bonding pad. A phenomenon occurred in which the soft bonding pad slipped in the direction of the lateral force. That is, in FIG. 2, the metal probe 5 moves in the direction of the arrow to the wall 6 of the insulating protective film 1.

金属探針5がポンティングパッドの中央付近に位置合わ
せされている場合には数十μm程度の横すベシがあって
も特に影響鉱ないが、金属探針5がボンディングパッド
2の端の方へ位置合わせになると、針圧による横すべり
は、絶縁保護膜1の壁6で停止させられる。これにより
これまで横方向と下方向へと二分でれてい友針圧は下方
向だけに集中する為、絶縁膜3は針圧に耐えきれず、ク
ラック7が生じてしまう。このクラック7の生じたボン
ディングパッド2に電圧が印加されると、ボンディング
パッド2の一部にマイグレーションが発生し、ボンディ
ングパッド2は半導体基板4に短絡してしまい、半導体
装置の製造歩留りや信頼性を低下させるという問題があ
った。
If the metal probe 5 is aligned near the center of the bonding pad 2, there will be no particular influence even if there is a horizontal bevel of several tens of μm, but if the metal probe 5 is positioned near the edge of the bonding pad 2. When the position is aligned, the lateral sliding caused by the stylus pressure is stopped by the wall 6 of the insulating protective film 1. As a result, the needle pressure is concentrated only in the downward direction, whereas it has been divided into two in the lateral direction and the downward direction, so that the insulating film 3 cannot withstand the needle pressure, and cracks 7 occur. When a voltage is applied to the bonding pad 2 with this crack 7, migration occurs in a part of the bonding pad 2, and the bonding pad 2 is short-circuited to the semiconductor substrate 4, which reduces the manufacturing yield and reliability of the semiconductor device. There was a problem of lowering the .

本発明の目的は、製造歩留りと信頼性の向上した半導体
装#を提供することにある。
An object of the present invention is to provide a semiconductor device with improved manufacturing yield and reliability.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の半導体装ti!、は、半導体基板上に絶縁膜を
介して金PA[からなる配線とボンディングパッドを形
成し、その上面に絶縁保護膜を形成してなる半導体装置
であって、絶縁保護膜をポンチインクハツトより離して
形成したものでるる。
Semiconductor device of the present invention ti! is a semiconductor device in which wiring and bonding pads made of gold PA are formed on a semiconductor substrate via an insulating film, and an insulating protective film is formed on the upper surface of the wiring, and the insulating protective film is formed using a punch ink hat. It is formed separately.

〔実施例〕〔Example〕

次に本発明の実施例について図面を診照して説明する。 Next, embodiments of the present invention will be described with reference to the drawings.

第1図(a) 、 (b)は本発明の一実施例の平面図
及びA−A’線断面である。
FIGS. 1(a) and 1(b) are a plan view and a cross section taken along the line AA' of an embodiment of the present invention.

第1図(al 、 (b)において、半導体基板4の上
面には酸化シリコン等からなる絶縁膜3が0.5〜1.
0μmの厚さに形成されており、この絶縁膜3上には、
金属膜からなるボンディングパッド2とこれに接続する
配[2Aとが形成されている。そしてこの金属膜上には
酸化膜や窒化膜からなる絶縁保護膜1が形成されている
がこの絶縁保護膜1はボンディングパッド2より距離d
だけ離れて形成されている。
In FIGS. 1A and 1B, an insulating film 3 made of silicon oxide or the like is formed on the upper surface of a semiconductor substrate 4 with a thickness of 0.5 to 1.
It is formed to a thickness of 0 μm, and on this insulating film 3,
A bonding pad 2 made of a metal film and a wiring 2A connected thereto are formed. An insulating protective film 1 made of an oxide film or a nitride film is formed on this metal film, and this insulating protective film 1 is separated by a distance d from the bonding pad 2.
Only formed apart.

この距離dは半導体装置の検査工程においてボンディン
グパッド2に接触する金属探針先端の直径よシやや大き
いことが望ましい。
It is desirable that this distance d is slightly larger than the diameter of the tip of the metal probe that comes into contact with the bonding pad 2 in the semiconductor device testing process.

このように形成された本実施例においては、半導体装置
の検査工程におけるプローバの金属探針が、ボンディン
グパッド2の端部に位置合せされて横すべりを起したと
しても、金属探針の先端はボンティングパッド2より離
れた絶縁保護膜1の側壁6で停止する。従って、停止位
置下の絶縁膜3にクラックが生じたとしても、ボンディ
ングパッド2に発生するマイグレーションにより、ボン
ディングパッド2と半導体基板4との短絡は抑制された
ものとなる。
In this embodiment formed in this way, even if the metal probe of the prober in the semiconductor device testing process is aligned with the end of the bonding pad 2 and causes a side slip, the tip of the metal probe will remain in the bonding pad 2. It stops at the side wall 6 of the insulating protective film 1 which is away from the tipping pad 2. Therefore, even if a crack occurs in the insulating film 3 below the stop position, the short circuit between the bonding pad 2 and the semiconductor substrate 4 is suppressed due to migration occurring in the bonding pad 2.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、ボンティングパッドから
離して絶縁保護膜を形成することによジボンディングパ
ッド上での金属探針の横すべりを停止させた絶縁保護膜
の障壁が除かれ、特性検査時の金属探針の針圧による絶
縁膜のクラックの発生及びボンディングパッドと半導体
基板との短絡を防止し、製造歩留と製品の信頼性を高め
た半導体装置が得られる効果がある。
As explained above, in the present invention, by forming an insulating protective film away from the bonding pad, the barrier of the insulating protective film that stops the horizontal sliding of the metal probe on the bonding pad is removed, and the characteristic test This has the effect of preventing cracks in the insulating film and short circuits between the bonding pad and the semiconductor substrate due to the pressure of the metal probe at the time of use, and providing a semiconductor device with improved manufacturing yield and product reliability.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(al 、 jbJは本発明の一実施例の平面図
及びA−A’もρ断面図第2図は従来の半導体装置のボ
ンティングパッド部の断面図である。 1・・・・・・絶縁保護膜、2・・・・・・ボンディン
グパッド、3・・・・・・絶縁膜、4・・・・・・半導
体基板、5・・・・・・金属探針、6・・・・・・壁、
7・・・・・・クラック代理人 弁理士  内 原  
 w  ゛日 ゝ\ 躬1面 第乙 図
FIG. 1 (al, jbJ is a plan view of one embodiment of the present invention, and A-A' is also a ρ cross-sectional view. FIG. 2 is a cross-sectional view of a bonding pad portion of a conventional semiconductor device. 1... ... Insulating protective film, 2 ... Bonding pad, 3 ... Insulating film, 4 ... Semiconductor substrate, 5 ... Metal probe, 6 ... ····wall,
7... Crack agent Patent attorney Uchihara
w ゛日ゝ\ 躬 1st page 2nd figure

Claims (1)

【特許請求の範囲】[Claims] 半導体基板上に絶縁膜を介して金属膜からなる配線とボ
ンディングパッドを形成し、その上面に絶縁保護膜を形
成してなる半導体装置に於いて、前記絶縁保護膜は前記
ボンディングパッドより離れて形成されていることを特
徴とする半導体装置。
In a semiconductor device in which wiring and bonding pads made of a metal film are formed on a semiconductor substrate via an insulating film, and an insulating protective film is formed on the upper surface thereof, the insulating protective film is formed at a distance from the bonding pad. A semiconductor device characterized by:
JP61105357A 1986-05-07 1986-05-07 Semiconductor device Pending JPS62261136A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61105357A JPS62261136A (en) 1986-05-07 1986-05-07 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61105357A JPS62261136A (en) 1986-05-07 1986-05-07 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS62261136A true JPS62261136A (en) 1987-11-13

Family

ID=14405472

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61105357A Pending JPS62261136A (en) 1986-05-07 1986-05-07 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS62261136A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20050020708A (en) * 2003-08-22 2005-03-04 소니 가부시끼 가이샤 Electric circuit board
JP2005294676A (en) * 2004-04-02 2005-10-20 Matsushita Electric Ind Co Ltd Semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20050020708A (en) * 2003-08-22 2005-03-04 소니 가부시끼 가이샤 Electric circuit board
JP2005294676A (en) * 2004-04-02 2005-10-20 Matsushita Electric Ind Co Ltd Semiconductor device
JP4525143B2 (en) * 2004-04-02 2010-08-18 パナソニック株式会社 Semiconductor device

Similar Documents

Publication Publication Date Title
US7168163B2 (en) Full wafer silicon probe card for burn-in and testing and test system including same
JPH0369131A (en) Probe for semiconductor integrated circuit test use; manufacture of semiconductor device including test process using same probe
CN101281893A (en) Semiconductor device
US6759858B2 (en) Integrated circuit test probe having ridge contact
JPS62261136A (en) Semiconductor device
TW543117B (en) Bonding pad
US5867032A (en) Process for testing a semiconductor device
JPH0748511B2 (en) Inspection method of semiconductor integrated circuit device
JP3334659B2 (en) Probe card
JPS62261139A (en) Semiconductor device
JP2008047643A (en) Semiconductor device
JPH05164785A (en) Probe for semiconductor integrated circuit tester
US5981370A (en) Method for maximizing interconnection integrity and reliability between integrated circuits and external connections
US7535240B2 (en) Semiconductor device
JPH04130643A (en) Semiconductor device
JPS59148345A (en) Lsi chip measuring prober
JP3753023B2 (en) Bumped chip for measuring bonding damage
JP3337400B2 (en) Sensor electrode extraction structure
JPH03280444A (en) Inspection of discrete semiconductor device
JP2000269277A (en) Probe for testing wafers and method of testing wafers
JPS63239835A (en) Testing probing card for semiconductor wafer
TWI467180B (en) Probe card
JPS58145A (en) Probe card device
JPS63204622A (en) Semiconductor integrated circuit device
JPH0314250A (en) Semiconductor device