JPS62173797A - Ceramic multilayer wiring substrate - Google Patents
Ceramic multilayer wiring substrateInfo
- Publication number
- JPS62173797A JPS62173797A JP61015154A JP1515486A JPS62173797A JP S62173797 A JPS62173797 A JP S62173797A JP 61015154 A JP61015154 A JP 61015154A JP 1515486 A JP1515486 A JP 1515486A JP S62173797 A JPS62173797 A JP S62173797A
- Authority
- JP
- Japan
- Prior art keywords
- weight
- ceramic
- composition
- multilayer wiring
- ceramic multilayer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000919 ceramic Substances 0.000 title claims description 60
- 239000000758 substrate Substances 0.000 title description 16
- 239000000203 mixture Substances 0.000 claims description 47
- 239000000463 material Substances 0.000 claims description 29
- 229910052709 silver Inorganic materials 0.000 claims description 4
- 229910052763 palladium Inorganic materials 0.000 claims description 2
- 239000010410 layer Substances 0.000 description 28
- KDLHZDBZIXYQEI-UHFFFAOYSA-N palladium Substances [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 23
- 239000004020 conductor Substances 0.000 description 19
- 238000010304 firing Methods 0.000 description 13
- 229910000679 solder Inorganic materials 0.000 description 12
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 10
- 239000011521 glass Substances 0.000 description 9
- 239000000843 powder Substances 0.000 description 6
- 239000003990 capacitor Substances 0.000 description 5
- 238000011156 evaluation Methods 0.000 description 5
- 229910052751 metal Inorganic materials 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- 238000000034 method Methods 0.000 description 5
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- 238000004458 analytical method Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 238000000635 electron micrograph Methods 0.000 description 4
- 239000010931 gold Substances 0.000 description 4
- WOCIAKWEIIZHES-UHFFFAOYSA-N ruthenium(iv) oxide Chemical compound O=[Ru]=O WOCIAKWEIIZHES-UHFFFAOYSA-N 0.000 description 4
- 238000012360 testing method Methods 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 239000007772 electrode material Substances 0.000 description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- 229910052759 nickel Inorganic materials 0.000 description 3
- SWELZOZIOHGSPA-UHFFFAOYSA-N palladium silver Chemical compound [Pd].[Ag] SWELZOZIOHGSPA-UHFFFAOYSA-N 0.000 description 3
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 2
- 229910001252 Pd alloy Inorganic materials 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 239000010953 base metal Substances 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000002474 experimental method Methods 0.000 description 2
- 238000010030 laminating Methods 0.000 description 2
- 229910052750 molybdenum Inorganic materials 0.000 description 2
- 239000011733 molybdenum Substances 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 238000005211 surface analysis Methods 0.000 description 2
- -1 titanium tin barium borate Chemical compound 0.000 description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 239000010937 tungsten Substances 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 241000286209 Phasianidae Species 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 238000002788 crimping Methods 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000007598 dipping method Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 238000000921 elemental analysis Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 229910000510 noble metal Inorganic materials 0.000 description 1
- 239000010970 precious metal Substances 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000010998 test method Methods 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
Landscapes
- Compositions Of Oxide Ceramics (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、電子機器等に使用されるセラミック多層配線
基板に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a ceramic multilayer wiring board used in electronic equipment and the like.
従来の技術
従来、グリーンシート積層法によるセラミック多層配線
基板に於ては、絶縁層にアルミナ、導電配線材料にはタ
ングステン、あるいはモリブデンを使用し還元雰囲気で
約1500〜16oO℃の温度で焼成を行っていた。最
近では、低温焼成用材料として、絶縁材料にガラス系材
料やホウ酸チタンスズバリウム系材料(通称BSB)を
用い、導電配線材料には金、銀パラジウム、銅、ニッケ
ルを使用し1000℃以下で焼成できるセラミック多層
配線基板の報告(エレクトロニク・セラミクス1985
年3月号)がされている0
発明が解決しようとする問題点
ところがアルミナ系の多層基板に於ては、アルミナとタ
ングステンあるいはモリブデンの温度−収縮曲線が似て
いる為に、基板の変形や反りのない多層基板が得られる
が、焼成温度が高くかつ還元雰囲気で焼成される為に焼
成に要する工程費用が高くついてしまう欠点を有してい
る。また、より高密度で多機能のセラミック多層基板を
得る為に、回路内の受動素子である抵抗体、コンデンサ
等を各層内に形成する必要があるが、現状のアルミナ系
多層基板では、焼成温度が16oO〜1600℃と高温
の為、層内に同時に実用的な受動素子を形成することは
、技術的、コスト的に困難が大きいという問題点がある
。上記の問題点を解決する為に、低温焼成セラミ’)り
多層配線基板の開発が行われている。しかしこの開発を
進めるにあたり、従来のアルミナ系多層基板では思いも
よらぬ問題点が存在する事がわかった。Conventional technology Conventionally, in ceramic multilayer wiring boards produced by the green sheet lamination method, alumina is used for the insulating layer, tungsten or molybdenum is used as the conductive wiring material, and firing is performed in a reducing atmosphere at a temperature of approximately 1500 to 160°C. was. Recently, as materials for low-temperature firing, glass materials and titanium tin barium borate materials (commonly known as BSB) are used as insulating materials, and gold, silver palladium, copper, and nickel are used as conductive wiring materials. Report on ceramic multilayer wiring board that can be fired (Electronic Ceramics 1985)
0 Problems to be Solved by the Invention However, in alumina-based multilayer substrates, the temperature-shrinkage curves of alumina and tungsten or molybdenum are similar, so the substrate may be deformed or Although a multilayer substrate without warping can be obtained, the firing temperature is high and the firing is performed in a reducing atmosphere, which has the disadvantage that the process cost required for firing is high. In addition, in order to obtain higher-density, multi-functional ceramic multilayer substrates, it is necessary to form resistors, capacitors, etc., which are passive elements in the circuit, in each layer. Since the temperature is as high as 1600° C. to 1600° C., there is a problem in that it is technically and economically difficult to simultaneously form practical passive elements in the layer. In order to solve the above problems, a multilayer wiring board made of low-temperature firing ceramics has been developed. However, as we proceeded with this development, we discovered that there were unexpected problems with conventional alumina-based multilayer substrates.
第1の問題点として、基板材料と導電配線材料の温度−
収縮曲線が異なる為に多層基板の反り、変形が生じてし
まう事である。低温焼成用基板材料の報告や特許出願が
多くなされているが、この最も重要な問題について詳細
な報告はほとんどみられない。実際に実用化しようとし
た場合、セラミンク組成を固定すると使用可能な導電配
線材料は限定される筈であり、逆に導電配線材料を固定
すると使用可能なセラミック組成の範囲は限定される筈
である。The first problem is that the temperature of the substrate material and conductive wiring material -
The difference in shrinkage curves causes warping and deformation of the multilayer substrate. Although many reports and patent applications have been made regarding substrate materials for low-temperature firing, there are almost no detailed reports on this most important issue. If we try to put it into practical use, fixing the ceramic composition will limit the range of conductive wiring materials that can be used, and conversely, fixing the conductive wiring material will limit the range of ceramic compositions that can be used. .
第2の問題点としては、最外層の導電配線材料の半田ぬ
れ性である。電気回路用配線基板として使用する場合、
この問題も非常に重要であり、これは導電配線材料の種
類のみならず、セラミック基板の組成も半田ぬれ性に大
きな影響を与える。この詳細については後述するが、セ
ラミック基板のある成分が最外層の導電配線材料に拡散
してゆき、半田ぬれ性を阻害してしまう。従って最外層
の導電配線材料の半田ぬれ性についても、セラミック組
成と導電配線材料は相互に限定されてしまう。The second problem is the solder wettability of the conductive wiring material of the outermost layer. When used as a wiring board for electric circuits,
This problem is also very important because not only the type of conductive wiring material but also the composition of the ceramic substrate has a great influence on solderability. As will be described in detail later, certain components of the ceramic substrate diffuse into the conductive wiring material of the outermost layer, impeding solder wettability. Therefore, the solder wettability of the conductive wiring material of the outermost layer is also limited by the ceramic composition and the conductive wiring material.
また、半田ぬれ性を改善する為に、NiやCuメッキを
施したとしても、次の工程でRu O2系の抵抗ペース
トを印刷し、空気中で850℃焼成を行う為にメッキ部
分は侵れてしまう。また、Auメッキを施した場合には
コストは高くなり工程費用も必要となってしまう。In addition, even if Ni or Cu plating is applied to improve solder wettability, the plated parts will erode because the next step is to print RuO2-based resistance paste and bake it in air at 850°C. I end up. Furthermore, if Au plating is applied, the cost will be high and process costs will be required.
第3の問題点として、高価な導電配線材料を使用しなけ
ればならないという事である。第1表に各種金属の相場
両路を示す。A third problem is that expensive conductive wiring materials must be used. Table 1 shows the market prices for various metals.
第 1 表
86o℃〜1000℃で焼成できる導電配線材料として
安価なCu、Ni等の卑金属材料を使用すると、これら
卑金属材料は還元雰囲気が必要であり、工程に於るラン
ニングコストが高くつき、まだアルミナ系多層基板の欠
点で先述した様に抵抗やコンデンサ等の受動素子を層内
に形成しようとすると、Ru O2系の抵抗では還元さ
れてしまい抵抗体としての機能を失う、現在報告されて
いるコンデンサもほとんど酸化物系のものである為に還
元雰囲気焼成ではコンデンサとしての機能を失ってしま
う。Table 1 When cheap base metal materials such as Cu and Ni are used as conductive wiring materials that can be fired at temperatures between 86oC and 1000oC, these base metal materials require a reducing atmosphere, which increases the running cost of the process, and it is still difficult to use. As mentioned earlier about the disadvantages of alumina-based multilayer substrates, it is currently reported that when passive elements such as resistors and capacitors are formed within the layers, RuO2-based resistors are reduced and lose their function as resistors. Since most capacitors are oxide-based, they lose their function as capacitors when fired in a reducing atmosphere.
空気中で焼成可能な導電配線材料は貴金属に多く。Most conductive wiring materials that can be fired in air are precious metals.
金、銀、銀パラジウム合金が使用可能であるが、金につ
いてはコストが非常に高くコンピューター関係以外の一
般電気機器にセラミック多層配線基板を採用しようとし
た場合、コストの面で実用化されない場合が多い。また
、貴金属の中では安価なAgは、セラミック基板中に拡
散してゆき信頼性に劣る報告が数多くある。但し、この
時の信頼性はセラミック組成やセラミック絶縁層の厚み
に影響されることはいうまでもない。銀パラジウム合金
の場合、通常ハイブリッドICに使用されているように
、Agの含有量が重量比が70%以上であれば、コスト
、インピーダンス共に実用化が可能である。Gold, silver, and silver-palladium alloys can be used, but the cost of gold is extremely high, and if a ceramic multilayer wiring board is used in general electrical equipment other than computers, it may not be practical due to the cost. many. Furthermore, there are many reports that Ag, which is inexpensive among noble metals, is inferior in reliability because it diffuses into the ceramic substrate. However, it goes without saying that the reliability at this time is affected by the ceramic composition and the thickness of the ceramic insulating layer. In the case of a silver-palladium alloy, as is usually used in hybrid ICs, if the weight ratio of Ag is 70% or more, it can be put to practical use in terms of cost and impedance.
以上の様に真に実用化しようとした場合、上記問題点を
全て解決する必要があり、本発明のセラミツク多層配線
基板は従来の問題点を全て解消するものである。As described above, if the present invention is to be put to practical use, it is necessary to solve all of the above-mentioned problems, and the ceramic multilayer wiring board of the present invention solves all of the conventional problems.
問題点と解決する為の手段
本発明のセラミック多層配線基板は、セラミック絶縁層
が、A12O345〜60重量%、b s 0224〜
33重量%、E 2O s 2.4〜3.3重量%、N
a 2O1−2〜1 、66重量%、K2O0J3〜
11重量% 、 Ca、CaO3.2〜4.4重量%、
MqO1,2〜1.65重量係、pbo 7.2〜9.
9重量%の組成範囲で総量100重量係となるように選
んだ組成物であり、内部層の導電配線材料が、A(J7
0〜100重量係、Pd o〜30重量饅の組成範囲で
総量100重量%となるように選んだ組成物であり、最
外層の導電配線材料がAg 70−95重量%、Pd
5〜3Q重量%の組成範囲でa量100重量%となるよ
うに選んだ組成物により構成されている。Problems and Means for Solving the Problems The ceramic multilayer wiring board of the present invention has a ceramic insulating layer containing A12O345-60% by weight, b s 0224-60% by weight.
33% by weight, E2Os 2.4-3.3% by weight, N
a2O1-2~1, 66% by weight, K2O0J3~
11% by weight, Ca, CaO 3.2-4.4% by weight,
MqO 1,2-1.65 weight ratio, pbo 7.2-9.
The composition was selected so that the total amount was 100% by weight within the composition range of 9% by weight, and the conductive wiring material of the internal layer was A (J7
The composition was selected so that the total amount was 100% by weight in the composition range of 0 to 100% by weight and Pd o to 30% by weight, and the conductive wiring material of the outermost layer was 70 to 95% by weight of Ag and Pd.
It is composed of a composition selected such that the a content is 100% by weight within the composition range of 5 to 3Q% by weight.
作 用
本発明のセラミンク多層配線基板は、空気中でかつ例え
ば900’Cという低温で焼成可能である為に、従来の
アルミナ系の多層基板と比較して焼成工程が簡単でかつ
省エネルギーが図れる。また、本発明におけるセラミッ
ク絶縁層を形成するセラミック組成物と導電配線材料と
の適合性は良く、反り、変形のないセラミック多層配線
基板が得られ、かつ最上層の導電配線材料は牛田ぬれ性
に浸れている。また導電配線材料のコスト、インピーダ
ンス共に十分実用化しうるものである。Function: Since the ceramic multilayer wiring board of the present invention can be fired in air at a low temperature of, for example, 900'C, the firing process is simpler and energy saving can be achieved compared to conventional alumina multilayer boards. Further, the compatibility between the ceramic composition forming the ceramic insulating layer and the conductive wiring material in the present invention is good, and a ceramic multilayer wiring board without warping or deformation can be obtained, and the conductive wiring material of the top layer has good Ushida wettability. I'm soaked in it. In addition, both the cost and impedance of the conductive wiring material are sufficient for practical use.
実施例
第1図は、本発明のセラミック多層配線基板の一実施例
を示す一部切欠斜視図であり、1a。Embodiment FIG. 1 is a partially cutaway perspective view showing an embodiment of the ceramic multilayer wiring board of the present invention, and is 1a.
1b、1c、1dはセラミ’7り絶縁層、2は内部導電
層、3は外部導電層であり、これらの配置には何らの特
徴はないものである。第2表に今回実験に使用した3種
類のガラス粉末A、B、Cの組成を示す。(単位は重量
%)
第 2 表
第3表には、基板のセラミック組成と多層配線基板とし
ての評価結果を一覧表にして示す(組成の単位は重量%
)。1b, 1c, and 1d are ceramic insulating layers, 2 is an internal conductive layer, and 3 is an external conductive layer, and there is no particular feature in their arrangement. Table 2 shows the compositions of the three types of glass powders A, B, and C used in this experiment. (The unit is weight %) Table 2 Table 3 lists the ceramic composition of the board and the evaluation results as a multilayer wiring board (The unit of composition is weight %)
).
第2表に示されているセラミック組成は、第2表に示し
た平均粒径が約2μmのガラス粉末A、B。The ceramic compositions shown in Table 2 are glass powders A and B having an average particle size of about 2 μm shown in Table 2.
Cに、平均粒径が約1.8711111 のアルミナを
混合したもので、表3中の試料番号1〜5の組成はガラ
ス粉末Aとアルミナを混合した系で、例えば試料番号1
のセラミック組成はガラス粉末Aとアルミナを重量比で
60対4oに混合したものである。The composition of sample numbers 1 to 5 in Table 3 is a mixture of glass powder A and alumina.For example, sample number 1
The ceramic composition is a mixture of glass powder A and alumina in a weight ratio of 60:4.
同様に、試料番号6〜10については、ガラス粉末Bと
アルミナを混合した系で、試料番号11〜16について
はガラス粉末Cとアルミナを混合した系である。Similarly, sample numbers 6 to 10 are a mixture of glass powder B and alumina, and sample numbers 11 to 16 are a mixture of glass powder C and alumina.
表3に示す評価項目の中で、内部導体との適合性につい
ては、第3図に示すように8B巾の内部導体層2が21
間隔をもって形成された7 0 mn X35 yap
X O,25+IIl++のグリーンシート4を6枚
積層した試験サンプルを作成し、第2図に示す焼成プロ
ファイルにより空気中で焼成を行い、セラミック多層基
板の反り、変形について評価を行った0この時使用した
内部導体層2は、金属成分が重量比でAg/Pd= 1
0010 、95 /s、90/10゜80/2O、T
o/30の6種類であり、これら5種類の全ての内部導
体との適合性に満足するセラミック組成にOの評価を与
え、たとえ1種類の内部導体とも適合しないセラミック
組成はXの評価を与えた。Among the evaluation items shown in Table 3, regarding compatibility with the internal conductor, as shown in Figure 3, the internal conductor layer 2 with a width of 8B is
70 mn x35 yap formed with intervals
A test sample was prepared by laminating 6 green sheets 4 of In the internal conductor layer 2, the metal component has a weight ratio of Ag/Pd=1
0010, 95/s, 90/10°80/2O, T
There are six types of O/30, and ceramic compositions that are compatible with all five types of internal conductors are given an O rating, and ceramic compositions that are not compatible with any one type of internal conductor are given an X rating. Ta.
第4図イ5口、ハに、第3中のセラミックの試料番号3
,8.11とAg100%の適合性を示す。適合性の悪
い組合せでは、第4図ノ・の如く基板は変形する。表3
に示す評価項目の中で、半田ぬれ性については各セラミ
ック組成のグリーンシートに、金属成分が重量比で、A
g/Pd=95/6.90/10.80/2O,70/
30の導体ペーストを印刷、乾燥し、これらのグリーン
シートを積層圧着後、第2図に示す焼成プロファイルば
て焼成を行い、得られた基板を260℃の半田槽に約2
秒間浸漬して最外層導体の半田ぬれ性を試験した。上記
4種類の導体表面の全面に半田がついているセラミ、り
組成には0の評価を与え、たとえ上記1種類の導体表面
の全面に半田がついていなければ×の評価を与えた。Figure 4 A5, C, ceramic sample number 3 in No. 3
, 8.11 and Ag100% compatibility. If the combination is incompatible, the substrate will be deformed as shown in FIG. Table 3
Among the evaluation items shown in , for solder wettability, the green sheet of each ceramic composition has a metal component in weight ratio, A
g/Pd=95/6.90/10.80/2O,70/
After printing and drying 30 conductor pastes, laminating and crimping these green sheets, firing was performed using the firing profile shown in Figure 2, and the obtained board was placed in a solder bath at 260°C for approximately 2 hours.
The solder wettability of the outermost layer conductor was tested by dipping for a second. Ceramic compositions with solder on the entire surface of the four types of conductors mentioned above were given a rating of 0, and even if one type of conductor had no solder on the entire surface, they were given a rating of x.
実験の結果からセラミック組成の試料番号1〜4のみ著
しく半田付性が悪かった0この原因を調べる為に、試料
番号3と8について、最外層導体として金属成分が重量
比でAg/Pd= 80 /2Oを使用した時の最外層
導体の表面元素分析をオージェ分析法にて行った。その
結果を第5図、第6図に示す。From the results of the experiment, only sample numbers 1 to 4 with ceramic composition had extremely poor solderability.To investigate the cause of this, for sample numbers 3 and 8, the metal component as the outermost layer conductor had a weight ratio of Ag/Pd = 80. Surface elemental analysis of the outermost layer conductor when /2O was used was conducted by Auger analysis. The results are shown in FIGS. 5 and 6.
第6図は、セラミック組成の試料番号3とAg/Pd=
80/2Oの組合せで、Ag/Pdの表面分析を行った
結果を示すチャート図である0第6図は、セラミック組
成の試料番号8とAg/Pd=80/2Oの組合せで、
Ag/Pdの表面分析を行った結果を示すチャート図で
ある。いづれもス・くツタリング速度は160人/Mi
Nで分析を行ったので、第6図、第6図共にX軸のスノ
<・ツタリング時間が10分の所は11.q/Pdの表
面から1500人の深さであることを示す。第5図と第
6図を比較すると大きな違いがあることに気づく0第6
1図ではAg/Pdの表面にはS iO2が多量に存在
し、o2の量も多い事が判る0第6図ではAg/Pdの
表面部にStが存在するが、表面から1500への深さ
の部分にij S i○2が存在しない事が判明した0
また、これらのAg/Pd表面の電子顕微鏡写真(倍率
4000倍)を第7図、第8図に示す。Figure 6 shows ceramic composition sample number 3 and Ag/Pd=
Figure 6 is a chart showing the results of surface analysis of Ag/Pd with the combination of 80/2O and the combination of ceramic composition sample number 8 with Ag/Pd=80/2O.
It is a chart figure showing the result of surface analysis of Ag/Pd. In both cases, the speed of speed is 160 people/Mi.
Since the analysis was carried out with N, in both Figures 6 and 6, the area where the snow <・tutting time on the X axis is 10 minutes is 11. It shows that the depth is 1500 people from the surface of q/Pd. If you compare Figures 5 and 6, you will notice a big difference. 6
In Figure 1, it can be seen that a large amount of SiO2 exists on the surface of Ag/Pd, and there is also a large amount of O2. In Figure 6, St exists on the surface of Ag/Pd, but the depth from the surface to 1500 mm is It turned out that ij S i○2 does not exist in the part of 0
Furthermore, electron micrographs (4000x magnification) of these Ag/Pd surfaces are shown in FIGS. 7 and 8.
第7図は、セラミック基成の試料番号3とAg/Pd=
so/2o(重量比)の組合せで、Ag/Pdの表面の
電子顕微鏡写真(倍率4000倍)であり、第8図はセ
ラミック組成の試料番号8とAg/Pd=80/2O(
重量比)の組合せで、Ag/Pd0表面の電子顕微鏡写
真(倍率4000倍)である。Figure 7 shows ceramic-based sample number 3 and Ag/Pd=
This is an electron micrograph (magnification: 4000x) of the surface of Ag/Pd with the combination of so/2o (weight ratio), and Figure 8 shows ceramic composition sample number 8 and Ag/Pd=80/2O (
This is an electron micrograph (4000x magnification) of the Ag/Pd0 surface.
第7図と第8図を比較すると顕著な差がある事が判る。Comparing Figures 7 and 8, it can be seen that there is a significant difference.
第7図では、Ag/Pdの表面にガラス質のような物が
全体を覆っているようにみえるが、第8図ではAg/P
ci粒子しか確認できない。これは、セラミック組成の
試料番号3すなわち、ガラスA系の組成ではセラミック
基板中の非晶質のガラスがAg/Pd内に拡散して半田
ぬれ性を阻害しているものと考えられる。In Fig. 7, it appears that the surface of Ag/Pd is covered with a glass-like substance, but in Fig. 8, Ag/Pd
Only ci particles can be confirmed. This is considered to be because in ceramic composition Sample No. 3, that is, glass A-based composition, amorphous glass in the ceramic substrate diffuses into Ag/Pd and inhibits solder wettability.
以上の様に、セラミック基板の組成は最外層導体の半田
ぬれ性に大きな影響を与える。As described above, the composition of the ceramic substrate has a large effect on the solderability of the outermost layer conductor.
表2に示す評価項目の中で、層間の信頼性の評価に使用
した試験サンプルは、焼成後に約2O01の厚みのセラ
ミック絶縁層の両側に約2 cm X 2mの面積で対
向電極が形成されるように作成した0この時使用した対
向電極の材料は金属成分が重量比でAg/Pd= 10
o、’o、9515.90/10゜80/2O.70
/30の計6種類で、1つのセラミック組成について上
記5種類の電極材料にて試験を行った。試験方法は、対
向電極に1oOvの電圧を加え試験サンプルを86℃、
85%RHの環境下に1000時間放置した後、室内に
サンプルを戻し、対向電極にsoV印加して絶縁抵抗を
測定する。このとき、1つのセラミック組成に対し上記
5種類の電極材料の組合せで、絶縁抵抗値が全て101
09以上のセラミック組成にはOの評価を与え、たとえ
1つの電極材料について絶縁抵抗が10109を下回る
と、そのセラミック組成には×の評価を与えた。Among the evaluation items shown in Table 2, the test sample used to evaluate interlayer reliability had counter electrodes with an area of about 2 cm x 2 m formed on both sides of a ceramic insulating layer with a thickness of about 200 mm after firing. The material of the counter electrode used at this time had a metal component in a weight ratio of Ag/Pd = 10.
o, 'o, 9515.90/10°80/2O. 70
Tests were conducted using the above five types of electrode materials for one ceramic composition, with a total of six types of /30. The test method was to apply a voltage of 1oOv to the counter electrode and heat the test sample at 86℃.
After being left in an environment of 85% RH for 1000 hours, the sample was returned to the room, and soV was applied to the counter electrode to measure the insulation resistance. At this time, the insulation resistance value is 101 for all combinations of the above five types of electrode materials for one ceramic composition.
Ceramic compositions of 09 or higher were given a rating of O, and even if the insulation resistance of one electrode material was less than 10109, the ceramic composition was given a rating of x.
以上、実験結果をまとめてみるとセラミック多層配線基
板として実用可能なセラミック組成はセラミック組成の
試料番号6〜9の範囲内である。Summarizing the experimental results above, the ceramic compositions that can be practically used as ceramic multilayer wiring boards are within the range of ceramic composition sample numbers 6 to 9.
発明の効果
以上のように、本発明のセラミック多層配線基、 板は
空気中で、例えば9001:という低温で焼成できる為
に省エネルギーが図れ、かつ抵抗やコンデンサ等の受動
素子を内蔵できる可能性をもち、焼成後に基板の反りゃ
変形がなく、最外層導体の半田ぬれ性も良好である。ま
た、内部層導体にAg100%を使用しても層間に於る
Agのマイグレーションはなく、導体の電気抵抗が低い
ために高信頼性かつ低コストのセラミック多層配線基板
を提供できる実用上きわめて有用なものである。Effects of the Invention As described above, the ceramic multilayer wiring board and board of the present invention can be fired in air at a low temperature of, for example, 9001°C, thereby saving energy and offering the possibility of incorporating passive elements such as resistors and capacitors. There is no warping or deformation of the board after holding and firing, and the solder wettability of the outermost layer conductor is also good. Furthermore, even if 100% Ag is used for the internal layer conductor, there is no migration of Ag between the layers, and the electrical resistance of the conductor is low, making it extremely useful in practice as it can provide a highly reliable and low-cost ceramic multilayer wiring board. It is something.
第1図は、本発明のセラミック多層配線基板の一実施例
の一部切欠斜視図、第2図は、セラミック多層配線基板
の焼成プロファイルを示す図、第3図は、セラミック組
成と内部導体との適合性を評価する為の評価用サンプル
の斜視図、第4図は、セラミック組成と内部導体の適合
性を評価した結果の一例を示す平面図、第5図は、半田
ぬれ件の悪いAg/Pd表面のオージェ分析結果を示す
図、第6図は、半田ぬれ性の良いAg/Pd表面のオー
ジェ分析結果を示す図、第7図は、半田ぬれ性の悪いA
g/Pd表面の電子顕微鏡写真図、第8図は、半田ぬれ
性の良いAg/Pd表面の電子顕微鏡写真図である。
1a、1b、1c、1d・・・・・・セラミック絶縁層
、2・・・・・・内部導体、3・・・・・・最外層導体
、4・・・・・・グリーンシート。
代理人の氏名 弁理士 中 尾 敏 男 ほか1名、’
n、Ib、Ic、/l −−−eうZlりIeJ12〜
・内部4惨
第1図 、−東7゜■う□4−−−
グリーノψト
卆
洸 1
!pr 閉 (旧
第 3 図
第4図
(イ) (ロ)
(ハノ第5図
又パノクリノグは関0n
手続補正書(扛9
昭和ご7年な 月24日
2発明の名称
セラミック多層配線基板
3補正をする者
事件との関係 特 許 出 願
人任 所9 大阪府門真市大字門真10063地名
称 (582)松下電器産業株式会比代表者
谷 井 昭 雉4代理人 〒57
1
住 所 大阪府門真市大字門真1006番地松下電器
産業株式会社内
5補正命令の日付
6、補正の内容
(1)明細書第18頁第3行目〜第7行目の「・・・を
示す図、・・・である。」を「・・・を示す図である。
」に補正します。
(2)図面第7図、第8図を抹消します。FIG. 1 is a partially cutaway perspective view of an embodiment of the ceramic multilayer wiring board of the present invention, FIG. 2 is a diagram showing the firing profile of the ceramic multilayer wiring board, and FIG. 3 is a diagram showing the ceramic composition and internal conductor. Fig. 4 is a plan view showing an example of the results of evaluating the compatibility of the ceramic composition and the internal conductor, and Fig. 5 is a perspective view of an evaluation sample for evaluating the compatibility of the Figure 6 is a diagram showing the results of Auger analysis of Ag/Pd surface with good solderability, and Figure 7 is a diagram showing the results of Auger analysis of Ag/Pd surface with good solderability.
FIG. 8 is an electron micrograph of an Ag/Pd surface with good solder wettability. 1a, 1b, 1c, 1d...ceramic insulating layer, 2...inner conductor, 3...outermost layer conductor, 4...green sheet. Name of agent: Patent attorney Toshio Nakao and one other person.
n, Ib, Ic, /l ---eUZlIeJ12~
・Internal 4 disasters Figure 1, -East 7゜■U□4---
Greeno ψ to book 1! pr closed (formerly Figure 3 Figure 4 (A) (B)
(Hano Figure 5 and Panocrinog are related to 0n Procedural amendment (1933, 1935) 2. Name of the invention Ceramic multilayer wiring board 3. Relationship with the person who made the amendment Patent application Office 9. Osaka 10063 Kadoma, Fukadoma City Place name (582) Matsushita Electric Industrial Co., Ltd. Representative
Akira Tanii Pheasant 4 agent 〒57
1 Address: Matsushita Electric Industrial Co., Ltd., 1006 Oaza Kadoma, Kadoma City, Osaka Prefecture 5 Date of amendment order 6 Contents of amendment (1) "..." in lines 3 to 7 of page 18 of the specification Corrects "A figure showing..." to "A figure showing...". (2) Delete drawings 7 and 8.
Claims (2)
0重量%、SiO_2 24〜33重量%、B_2O_
3 2.4〜3.3重量%、Na_2O 1.2〜1.
65重量%、K_2O 0.8〜1.1重量%、CaO
3.2〜4.4重量%、MgO 1.2〜1.65重
量%、Pb O 7.2〜9.9重量%の組成範囲で総
量100重量%となるように選んだ組成物であり、内部
層の導電配線材料が、Ag 70〜100重量%、Pd
0〜30重量%の組成範囲で総量100重量%となる
ように選んだ組成物であり、最外層の導電配線材料が、
Ag 70〜95重量%、Pd 5〜30重量%の組成
範囲で総量100重量%となるように選んだ組成物によ
って構成されることを特徴とするセラミック多層配線基
板。(1) Ceramic insulating layer is Al_2O_3 45-6
0% by weight, SiO_2 24-33% by weight, B_2O_
3 2.4-3.3% by weight, Na_2O 1.2-1.
65% by weight, K_2O 0.8-1.1% by weight, CaO
The composition was selected so that the total amount was 100% by weight with a composition range of 3.2 to 4.4% by weight, MgO 1.2 to 1.65% by weight, and PbO 7.2 to 9.9% by weight. , the conductive wiring material of the internal layer is 70 to 100% by weight of Ag, Pd
The composition is selected so that the total amount is 100% by weight in the composition range of 0 to 30% by weight, and the conductive wiring material of the outermost layer is
1. A ceramic multilayer wiring board characterized in that it is made of a composition selected to have a composition range of 70 to 95% by weight of Ag and 5 to 30% by weight of Pd so that the total amount is 100% by weight.
ることを特徴とする特許請求の範囲第1項記載のセラミ
ック多層配線基板。(2) The ceramic multilayer wiring board according to claim 1, wherein the conductive wiring material of the internal layer is 100% by weight Ag.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61015154A JPS62173797A (en) | 1986-01-27 | 1986-01-27 | Ceramic multilayer wiring substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61015154A JPS62173797A (en) | 1986-01-27 | 1986-01-27 | Ceramic multilayer wiring substrate |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS62173797A true JPS62173797A (en) | 1987-07-30 |
JPH0447476B2 JPH0447476B2 (en) | 1992-08-04 |
Family
ID=11880878
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP61015154A Granted JPS62173797A (en) | 1986-01-27 | 1986-01-27 | Ceramic multilayer wiring substrate |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62173797A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01231398A (en) * | 1988-03-11 | 1989-09-14 | Matsushita Electric Ind Co Ltd | Ceramic multilayer interconnection board and preparation thereof |
EP1153896A1 (en) | 2000-04-26 | 2001-11-14 | Matsushita Electric Industrial Co., Ltd. | Dielectric ceramic composition, method for producing the same and device for communication apparatus using the same |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5717474A (en) * | 1980-06-30 | 1982-01-29 | Nippon Electric Co | Multilayer ceramic substrate |
JPS58156552A (en) * | 1982-03-11 | 1983-09-17 | Nec Corp | Inorganic composition for insulating ceramic paste |
JPS599992A (en) * | 1982-07-08 | 1984-01-19 | 株式会社日立製作所 | Method of producing multilayer circuit board |
JPS60257195A (en) * | 1984-06-01 | 1985-12-18 | 鳴海製陶株式会社 | Hybrid substrate and method of producing same |
-
1986
- 1986-01-27 JP JP61015154A patent/JPS62173797A/en active Granted
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5717474A (en) * | 1980-06-30 | 1982-01-29 | Nippon Electric Co | Multilayer ceramic substrate |
JPS58156552A (en) * | 1982-03-11 | 1983-09-17 | Nec Corp | Inorganic composition for insulating ceramic paste |
JPS599992A (en) * | 1982-07-08 | 1984-01-19 | 株式会社日立製作所 | Method of producing multilayer circuit board |
JPS60257195A (en) * | 1984-06-01 | 1985-12-18 | 鳴海製陶株式会社 | Hybrid substrate and method of producing same |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01231398A (en) * | 1988-03-11 | 1989-09-14 | Matsushita Electric Ind Co Ltd | Ceramic multilayer interconnection board and preparation thereof |
EP1153896A1 (en) | 2000-04-26 | 2001-11-14 | Matsushita Electric Industrial Co., Ltd. | Dielectric ceramic composition, method for producing the same and device for communication apparatus using the same |
US6579817B2 (en) | 2000-04-26 | 2003-06-17 | Matsushita Electric Industrial Co., Ltd. | Dielectric ceramic composition and method for producing the same, and device for communication apparatus using the same |
Also Published As
Publication number | Publication date |
---|---|
JPH0447476B2 (en) | 1992-08-04 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TWI345245B (en) | Electronic component and method of manufacturing the same | |
JPH0378798B2 (en) | ||
EP0257193A2 (en) | Low-temperature burnt conductive paste and method of manufacturing printed circuit board | |
JPH0569319B2 (en) | ||
JPS62173797A (en) | Ceramic multilayer wiring substrate | |
JP2658509B2 (en) | Method of forming electronic component, electrode paste and terminal electrode | |
JPS5830194A (en) | Ceramic multilayer circuit board and method of producing same | |
JPS5874030A (en) | Electronic part, conductive film composition and method of producing same | |
JP2862650B2 (en) | Base metal composition for external electrode of chip type multilayer capacitor | |
JPS63122295A (en) | Multilayer ceramic board with built-in electronic component | |
JPS62122103A (en) | Manufacture of laminated chip varistor | |
JP2816742B2 (en) | Circuit board | |
JPH01289231A (en) | Leadless chip component | |
JPH05221686A (en) | Conductive paste composition and wiring substrate | |
JPS635842B2 (en) | ||
JPS6158296A (en) | Ceramic multilayer circuit board | |
JPS58107605A (en) | Method of producing chip resistor | |
JPS62242324A (en) | Chip capacitor | |
JPS6346595B2 (en) | ||
JP2965646B2 (en) | Base metal composition for external electrode of chip type multilayer capacitor | |
JP3556377B2 (en) | Wiring board | |
JP2931910B2 (en) | Circuit board | |
JPS63169798A (en) | Multilayer ceramic board with built-in electronic parts | |
JPS6085598A (en) | Multilayer circuit board | |
JP2000260654A (en) | Ultra-small chip type electronic component |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
EXPY | Cancellation because of completion of term |