JPH0447476B2 - - Google Patents
Info
- Publication number
- JPH0447476B2 JPH0447476B2 JP61015154A JP1515486A JPH0447476B2 JP H0447476 B2 JPH0447476 B2 JP H0447476B2 JP 61015154 A JP61015154 A JP 61015154A JP 1515486 A JP1515486 A JP 1515486A JP H0447476 B2 JPH0447476 B2 JP H0447476B2
- Authority
- JP
- Japan
- Prior art keywords
- weight
- ceramic
- composition
- conductive wiring
- wiring material
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000000919 ceramic Substances 0.000 claims description 59
- 239000000203 mixture Substances 0.000 claims description 46
- 239000000463 material Substances 0.000 claims description 29
- 229910052751 metal Inorganic materials 0.000 claims description 7
- 239000002184 metal Substances 0.000 claims description 7
- 229910018072 Al 2 O 3 Inorganic materials 0.000 claims description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims 2
- 229910052681 coesite Inorganic materials 0.000 claims 1
- 229910052906 cristobalite Inorganic materials 0.000 claims 1
- 239000000377 silicon dioxide Substances 0.000 claims 1
- 235000012239 silicon dioxide Nutrition 0.000 claims 1
- 229910052682 stishovite Inorganic materials 0.000 claims 1
- 229910052905 tridymite Inorganic materials 0.000 claims 1
- 239000010410 layer Substances 0.000 description 28
- KDLHZDBZIXYQEI-UHFFFAOYSA-N palladium Substances [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 23
- 239000004020 conductor Substances 0.000 description 19
- 229910000679 solder Inorganic materials 0.000 description 13
- 239000000758 substrate Substances 0.000 description 13
- 238000010304 firing Methods 0.000 description 12
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 11
- 239000011521 glass Substances 0.000 description 9
- 238000011156 evaluation Methods 0.000 description 6
- 239000000843 powder Substances 0.000 description 6
- 239000003990 capacitor Substances 0.000 description 5
- 238000000034 method Methods 0.000 description 5
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- 239000007772 electrode material Substances 0.000 description 4
- 239000010931 gold Substances 0.000 description 4
- 238000009413 insulation Methods 0.000 description 4
- 238000012360 testing method Methods 0.000 description 4
- 229910004298 SiO 2 Inorganic materials 0.000 description 3
- 238000004458 analytical method Methods 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000000635 electron micrograph Methods 0.000 description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 229910052759 nickel Inorganic materials 0.000 description 3
- SWELZOZIOHGSPA-UHFFFAOYSA-N palladium silver Chemical compound [Pd].[Ag] SWELZOZIOHGSPA-UHFFFAOYSA-N 0.000 description 3
- 239000002245 particle Substances 0.000 description 3
- 229910052709 silver Inorganic materials 0.000 description 3
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 2
- 229910001252 Pd alloy Inorganic materials 0.000 description 2
- 239000010953 base metal Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000010030 laminating Methods 0.000 description 2
- 229910052750 molybdenum Inorganic materials 0.000 description 2
- 239000011733 molybdenum Substances 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 238000005211 surface analysis Methods 0.000 description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 239000010937 tungsten Substances 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 238000002788 crimping Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 238000000921 elemental analysis Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 229910000510 noble metal Inorganic materials 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 239000010970 precious metal Substances 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000010998 test method Methods 0.000 description 1
- -1 titanium tin barium borate Chemical compound 0.000 description 1
Landscapes
- Compositions Of Oxide Ceramics (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Description
産業上の利用分野
本発明は、電子機器等に使用されるセラミツク
多層配線基板に関するものである。
従来の技術
従来、グリーンシート積層法によるセラミツク
多層配線基板に於ては、絶縁層にアルミナ、導電
配線材料にはタングステン、あるいはモリブデン
を使用し還元雰囲気で約1500〜1600℃の温度で焼
成を行つていた。最近では、低温焼成用材料とし
て、絶縁材料にガラス系材料やホウ酸チタンスズ
バリウム系材料（通称BSB）を用い、導電配線
材料には金、銀パラジウム、銅、ニツケルを使用
し1000℃以下で焼成できるセラミツク多層配線基
板の報告（エレクトロニク・セラミクス1985年３
月号）がされている。
発明が解決しようとする問題点
ところがアルミナ系の多層基板に於ては、アル
ミナとタングステンあるいはモリブデンの温度−
収縮曲線が似ている為に、基板の変形や反りのな
い多層基板が得られるが、焼成温度が高くかつ還
元雰囲気で焼成される為に焼成に要する工程費用
が高くついてしまう欠点を有している。また、よ
り高密度で多機能のセラミツク多層基板を得る為
に、回路内の受動素子である抵抗体、コンデンサ
等を各層内に形成する必要があるが、現状のアル
ミナ系多層基板では、焼成温度が1500〜1600℃と
高温の為、層内に同時に実用的な受動素子を形成
することは、技術的、コスト的に困難が大きいと
いう問題点がある。上記の問題点を解決する為
に、低温焼成セラミツク多層配線基板の開発が行
われている。しかしこの開発を進めるにあたり、
従来のアルミナ系多層基板では思いもよらぬ問題
点が存在する事がわかつた。
第１の問題点として、基板材料と導電配線材料
の温度−収縮曲線が異なる為に多層基板の反り、
変形が生じてしまう事である。低温焼成用基板材
料の報告や特許出願が多くなされているが、この
最も重要な問題について詳細な報告はほとんどみ
られない。実際に実用化しようとした場合、セラ
ミツク組成を固定すると使用可能な導電配線材料
は限定される筈であり、逆に導電配線材料を固定
すると使用可能なセラミツク組成の範囲は限定さ
れる筈である。
第２の問題点としては、最外層の導電配線材料
の半田ぬれ性である。電気回路用配線基板として
使用する場合、この問題も非常に重要であり、こ
れは導電配線材料の種類のみならず、セラミツク
基板の組成も半田ぬれ性に大きな影響を与える。
この詳細については後述するが、セラミツク基板
のある成分が最外層の導電配線材料に拡散してゆ
き、半田ぬれ性を阻害してしまう。従つて最外層
の導電配線材料の半田ぬれ性についても、セラミ
ツク組成と導電配線材料は相互に限定されてしま
う。また、半田ぬれ性を改善する為に、NiやCu
メツキを施したとしても、次の工程でRuO2系の
抵抗ペーストを印刷し、空気中で850℃焼成を行
う為にメツキ部分は侵れてしまう。また、Auメ
ツキを施した場合にはコストは高くなり工程費用
も必要となつてしまう。
第３の問題点として、高価な導電配線材料を使
用しなければならないという事である。第１表に
各種金属の相場価格を示す。
INDUSTRIAL APPLICATION FIELD The present invention relates to a ceramic multilayer wiring board used in electronic devices and the like. Conventional technology Conventionally, ceramic multilayer wiring boards produced using the green sheet lamination method use alumina for the insulating layer and tungsten or molybdenum for the conductive wiring material, and are fired at a temperature of approximately 1500 to 1600°C in a reducing atmosphere. It was on. Recently, as materials for low-temperature firing, glass materials and titanium tin barium borate materials (commonly known as BSB) are used as insulating materials, and gold, silver palladium, copper, and nickel are used as conductive wiring materials. Report on ceramic multilayer wiring board that can be fired (Electronic Ceramics March 1985)
Monthly issue) has been published. Problems to be Solved by the Invention However, in alumina-based multilayer substrates, the temperature of alumina and tungsten or molybdenum -
Because the shrinkage curves are similar, it is possible to obtain a multilayer substrate without deformation or warping of the substrate, but the disadvantage is that the firing process costs are high because the firing temperature is high and firing is performed in a reducing atmosphere. There is. In addition, in order to obtain higher-density, multi-functional ceramic multilayer substrates, it is necessary to form resistors, capacitors, etc., which are passive elements in the circuit, in each layer. Since the temperature is as high as 1,500 to 1,600°C, there is a problem in that it is technically and economically difficult to simultaneously form practical passive elements within the layer. In order to solve the above problems, low temperature fired ceramic multilayer wiring boards are being developed. However, in proceeding with this development,
It has been discovered that there are unexpected problems with conventional alumina multilayer substrates. The first problem is that the temperature-contraction curves of the board material and conductive wiring material are different, causing warping of the multilayer board.
This results in deformation. Although many reports and patent applications have been made regarding substrate materials for low-temperature firing, there are almost no detailed reports on this most important issue. If we try to put it into practical use, fixing the ceramic composition will limit the range of conductive wiring materials that can be used, and conversely, fixing the conductive wiring material will limit the range of ceramic compositions that can be used. . The second problem is the solder wettability of the conductive wiring material of the outermost layer. When used as a wiring board for electric circuits, this problem is also very important, as not only the type of conductive wiring material but also the composition of the ceramic board has a great influence on solderability.
The details of this will be described later, but certain components of the ceramic substrate diffuse into the conductive wiring material of the outermost layer, impeding solder wettability. Therefore, the solder wettability of the conductive wiring material of the outermost layer is also limited by the ceramic composition and the conductive wiring material. In addition, in order to improve solder wettability, Ni and Cu
Even if plated, the next step is to print a RuO 2 -based resistance paste and bake it in air at 850°C, so the plated area will erode. Furthermore, if Au plating is applied, the cost will be high and process costs will be required. A third problem is that expensive conductive wiring materials must be used. Table 1 shows the market prices of various metals.
【表】
850℃〜1000℃で焼成できる導電配線材料とし
て安価なCu、Ni等の卑金属材料を使用すると、
これら卑金属材料は還元雰囲気が必要であり、工
程に於るランニングコストが高くつき、またアル
ミナ系多層基板の欠点で先述した様に抵抗やコン
デンサ等の受動素子を層内に形成しようとする
と、RuO2系の抵抗では還元されてしまい抵抗体
としての機能を失う、現在報告されているコンデ
ンサもほとんど酸化物系のものである為に還元雰
囲気焼成ではコンデンサとしての機能を失つてし
まう。空気中で焼成可能な導電配線材料は貴金属
に多く、金、銀、銀パラジウム合金が使用可能で
あるが、金についてはコストが非常に高くコンピ
ユーター関係以外の一般電気機器にセラミツク多
層配線基板を採用しようとした場合、コストの面
で実用化されない場合が多い。また、貴金属の中
では安価なAgは、セラミツク基板中に拡散して
ゆき信頼性に劣る報告が数多くある。但し、この
時の信頼性はセラミツク組成やセラミツク絶縁層
の厚みに影響されることはいうまでもない。銀パ
ラジウム合金の場合、通常ハイブリツドICに使
用されているように、Agの含有量が重量比が70
％以上であれば、コスト、インピーダンス共に実
用化が可能である。
以上の様に真に実用化しようとした場合、上記
問題点を全て解決する必要があり、本発明のセラ
ミツク多層配線基板は従来の問題点を全て解消す
るものである。
問題点を解決する為の手段
本発明のセラミツク多層配線基板は、セラミツ
ク絶縁層が、Al2O345〜60重量％、SiO224〜33重
量％、B2O32.4〜3.3重量％、Na2O1.2〜1.65重量
％、K2O0.8〜1.1重量％、CaO3.2〜4.4重量％、
MgO1.2〜1.65重量％、PbO7.2〜9.9重量％の組成
範囲で総量100重量％となるように選んだ組成物
であり、内部層の導電配線材料が、Ag70〜100重
量％、Pd0〜30重量％の組成範囲で総量100重量
％となるように選んだ組成物であり、最外層の導
電配線材料がAg70〜95重量％、Pd5〜30重量％
の組成範囲で総量100重量％となるように選んだ
組成物により構成されている。
作 用
本発明のセラミツク多層配線基板は、空気中で
かつ例えば900℃という低温で焼成可能である為
に、従来のアルミナ系の多層基板と比較して焼成
工程が簡単でかつ省エネルギーが図れる。また、
本発明におけるセラミツク絶縁層を形成するセラ
ミツク組成物と導電配線材料との適合性は良く、
反り、変形のないセラミツク多層配線基板が得ら
れ、かつ最上層の導電配線材料は半田ぬれ性に優
れている。また導電配線材料のコスト、インピー
ダンス共に十分実用化しうるものである。
実施例
第１図は、本発明のセラミツク多層配線基板の
一実施例を示す一部切欠斜視図であり、１ａ，１
ｂ，１ｃ，１ｄはセラミツク絶縁層、２は内部導
電層、３は外部導電層であり、これらの配置には
何らの特徴はないものである。第２表に今回実験
に使用した３種類のガラス粉末Ａ，Ｂ，Ｃの組成
を示す。（単位は重量％）[Table] When cheap base metal materials such as Cu and Ni are used as conductive wiring materials that can be fired at 850℃ to 1000℃,
These base metal materials require a reducing atmosphere, which increases the running cost of the process.Also, as mentioned earlier with the disadvantages of alumina-based multilayer substrates, when trying to form passive elements such as resistors and capacitors in the layers, RuO 2 -type resistors are reduced and lose their function as resistors, and most of the currently reported capacitors are oxide-based, so they lose their function as capacitors when fired in a reducing atmosphere. Most conductive wiring materials that can be fired in air are precious metals, such as gold, silver, and silver-palladium alloys, but the cost of gold is extremely high, so ceramic multilayer wiring boards are used in general electrical equipment other than computer-related equipment. However, in many cases, it is not practical due to cost. Furthermore, there are many reports that Ag, which is inexpensive among noble metals, has poor reliability because it diffuses into ceramic substrates. However, it goes without saying that the reliability at this time is affected by the ceramic composition and the thickness of the ceramic insulating layer. In the case of silver-palladium alloys, the Ag content is 70% by weight, as is usually used in hybrid ICs.
% or more, practical use is possible in terms of both cost and impedance. As described above, if the present invention is to be put to practical use, it is necessary to solve all of the above-mentioned problems, and the ceramic multilayer wiring board of the present invention solves all of the conventional problems. Means for Solving the Problems The ceramic multilayer wiring board of the present invention has a ceramic insulating layer containing 45 to 60% by weight of Al 2 O 3 , 24 to 33% by weight of SiO 2 , 2.4 to 3.3% by weight of B 2 O 3 . Na2O1.2 ~1.65wt%, K2O0.8 ~1.1wt%, CaO3.2~4.4wt%,
The composition is selected so that the total amount is 100% by weight in the composition range of 1.2 to 1.65% by weight of MgO and 7.2 to 9.9% by weight of PbO, and the conductive wiring material of the internal layer is 70 to 100% by weight of Ag, 7.2 to 9.9% by weight of Pd The composition was selected so that the total amount was 100% by weight within a composition range of 30% by weight, and the conductive wiring material in the outermost layer was 70 to 95% by weight of Ag and 5 to 30% by weight of Pd.
It is composed of a composition selected so that the total amount is 100% by weight within the composition range. Function Since the ceramic multilayer wiring board of the present invention can be fired in air at a low temperature of, for example, 900°C, the firing process is simpler and energy saving can be achieved compared to conventional alumina multilayer boards. Also,
The compatibility between the ceramic composition forming the ceramic insulating layer and the conductive wiring material in the present invention is good;
A ceramic multilayer wiring board without warping or deformation can be obtained, and the conductive wiring material of the uppermost layer has excellent solder wettability. In addition, both the cost and impedance of the conductive wiring material are sufficient for practical use. Embodiment FIG. 1 is a partially cutaway perspective view showing an embodiment of the ceramic multilayer wiring board of the present invention.
b, 1c, and 1d are ceramic insulating layers, 2 is an internal conductive layer, and 3 is an external conductive layer, and there is no particular feature in their arrangement. Table 2 shows the compositions of the three types of glass powders A, B, and C used in this experiment. (Unit is weight%)
【表】
第３表には、基板のセラミツク組成と多層配線
基板としての評価結果を一覧表にして示す（組成
の単位は重量％）。[Table] Table 3 lists the ceramic composition of the board and the evaluation results as a multilayer wiring board (composition units are weight %).
【表】【table】
【表】
第２表に示されているセラミツク組成は、第２
表に示した平均粒径が約2μｍのガラス粉末Ａ，
Ｂ，Ｃに、平均粒径が約1.8μｍのアルミナを混合
したもので、第３表中の試料番号１〜５の組成は
ガラス粉末Ａとアルミナを混合した系で、例えば
試料番号１のセラミツク組成はガラス粉末Ａとア
ルミナを重量比で60対40に混合したものである。
同様に、試料番号６〜10については、ガラス粉末
Ｂとアルミナを混合した系で、試料番号11〜15に
ついてはガラス粉末Ｃとアルミナを混合した系で
ある。
第３表に示す評価項目の中で、内部導体との適
合性については、第３図に示すように８mm巾の内
部導体層２が２mmの間隔をもつて形成された70mm
×35mm×0.25mmのグリーンシート４を５枚積層し
た試験サンプルを作成し、第２図に示す焼成プロ
フアイルにより空気中で焼成を行い、セラミツク
多層基板の反り、変形について評価を行つた。こ
の時使用した内部導体層２は、金属成分が重量比
でAg／Pd＝100／０、95／５、90／10、80／20、
70／30の５種類であり、これら５種類の全ての内
部導体との適合性に満足するセラミツク組成に○
の評価を与え、たとえ１種類の内部導体とも適合
しないセラミツク組成は×の評価を与えた。
第４図イ，ロ，ハに、第３表中のセラミツクの
試料番号３，８，11とAg100％の適合性を示す。
適合性の悪い組合せでは、第４図ハの如く基板は
変形する。第３表に示す評価項目の中で、半田ぬ
れ性については各セラミツク組成のグリーンシー
トに、金属成分が重量比で、Ag／Pd＝95／５、
90／10、80／20、70／30の導体ペーストを印刷、
乾燥し、これらのグリーンシートを積層圧着後、
第２図に示す焼成プロフアイルにて焼成を行い、
得られた基板を260℃の半田槽に約２秒浸漬して
最外層導体の半田ぬれ性を試験した。上記４種類
の導体表面の全面に半田がついているセラミツク
組成には○の評価が与え、たとえ上記１種類の導
体表面の全面に半田がついていなければ×の評価
を与えた。
実験の結果からセラミツク組成の試料番号１〜
４のみ著しく半田付性が悪かつた。この原因を調
べる為に、試料番号３と８について、最外層導体
として金属成分が重量比でAg／Pd＝80／20を使
用した時の最外層導体の表面元素分析をオージエ
分析法にて行つた。その結果を第５図、第６図に
示す。
第５図は、セラミツク組成の試料番号３と
Ag／Pd＝80／20の組合せで、Ag／Pdの表面分
析を行つた結果を示すチヤート図である。第６図
は、セラミツク組成の試料番号８とAg／Pd＝
80／20の組合せで、Ag／Pdの表面分析を行つた
結果を示すチヤート図である。いづれもスパツタ
リング速度は150〓／MiNで分析を行つたので、
第５図、第６図共にＸ軸のスパツタリング時間が
10分の所はAg／Pdの表面から1500Åの深さであ
ることを示す。第５図と第６図を比較すると大き
な違いがあることに気づく。第５図ではAg／Pd
の表面にはSiO2が多量に存在し、O2の量も多い
事が判る。第６図ではAg／Pdの表面部にSiが存
在するが、表面から1500Åの深さの部分には
SiO2が存在しない事が判明した。また、これら
のAg／Pd表面の電子顕微鏡写真（倍率4000倍）
を第７図、第８図に示す。
第７図は、セラミツク組成の試料番号３と
Ag／Pd＝80／20（重量比）の組合せで、Ag／Pd
の表面の電子顕微鏡写真（倍率4000倍）であり、
第８図はセラミツク組成の試料番号８とAg／Pd
＝80／20（重量比）の組合せで、Ag／Pdの表面
の電子顕微鏡写真（倍率4000倍）である。第７図
と第８図を比較すると顕著な差がある事が判る。
第７図では、Ag／Pdの表面にガラス質のような
物が全体を覆つているようにみえるが、第８図で
はAg／Pd粒子しか確認できない。これは、セラ
ミツク組成の試料番号３すなわち、ガラスＡ系の
組成ではセラミツク基板中の非晶質のガラスが
Ag／Pd内に拡散して半田ぬれ性を阻害している
ものと考えられる。
以上の様に、セラミツク基板の組成は最外層導
体の半田ぬれ性に大きな影響を与える。
表２に示す評価項目の中で、層間の信頼性の評
価に使用した試験サンプルは、焼成後に約200μ
の厚みのセラミツク絶縁層の両側に約２cm×２cm
の面積で対向電極が形成されるように作成した。
この時使用した対向電極の材料は金属成分が重量
比でAg／Pd＝100／０、95／５、90／10、80／
20、70／30の計５種類で、１つのセラミツク組成
について上記５種類の電極材料にて試験を行つ
た。試験方法は、対向電極に100Vの電圧を加え
試験サンプルを85℃、85％RHの環境下に1000時
間放置した後、室内にサンプルを戻し、対向電極
に50V印加して絶縁抵抗を測定する。このとき、
１つのセラミツク組成に対し上記５種類の電極材
料の組合せで、絶縁抵抗値が全て1010Ω以上のセ
ラミツク組成には○の評価を与え、たとえ１つの
電極材料について絶縁抵抗が1010Ωを下回ると、
そのセラミツク組成には×の評価を与えた。
以上、実験結果をまとめてみるとセラミツク多
層配線基板として実用可能なセラミツク組成はセ
ラミツク組成の試料番号６〜９の範囲内である。
発明の効果
以上のように、本発明のセラミツク多層配線基
板は空気中で、例えば900℃という低温で焼成で
きる為に省エネルギーが図れ、かつ抵抗やコンデ
ンサ等の受動素子を内蔵できる可能性をもち、焼
成後に基板の反りや変形がなく、最外層導体の半
田ぬれ性も良好である。また、内部層導体に
Ag100％を使用しても層間に於るAgのマイグレ
ーシヨンはなく、導体の電気抵抗が低いために高
信頼性かつ低コストのセラミツク多層配線基板を
提供できる実用上きわめて有用なものである。[Table] The ceramic composition shown in Table 2 is
Glass powder A with an average particle size of about 2 μm shown in the table,
B and C are mixed with alumina having an average particle size of approximately 1.8 μm.The compositions of sample numbers 1 to 5 in Table 3 are a mixture of glass powder A and alumina. The composition is a mixture of glass powder A and alumina in a weight ratio of 60:40.
Similarly, sample numbers 6 to 10 are a mixture of glass powder B and alumina, and sample numbers 11 to 15 are a mixture of glass powder C and alumina. Among the evaluation items shown in Table 3, regarding compatibility with the internal conductor, as shown in Figure 3, the internal conductor layer 2 with a width of 8 mm is
A test sample was prepared by laminating five green sheets 4 of 35 mm x 0.25 mm in size, and fired in air according to the firing profile shown in FIG. 2 to evaluate warping and deformation of the ceramic multilayer substrate. The internal conductor layer 2 used at this time had metal components in weight ratios of Ag/Pd=100/0, 95/5, 90/10, 80/20,
There are five types of 70/30, and the ceramic composition that satisfies the compatibility with all five types of internal conductors is ○.
Ceramic compositions that were not compatible with even one type of internal conductor were given a rating of x. Figure 4 A, B, and C show the compatibility of ceramic samples 3, 8, and 11 in Table 3 with 100% Ag.
If the combination is incompatible, the substrate will be deformed as shown in FIG. 4C. Among the evaluation items shown in Table 3, regarding solder wettability, green sheets of each ceramic composition had metal components in weight ratios of Ag/Pd=95/5,
Printing 90/10, 80/20, 70/30 conductive paste,
After drying and laminating and crimping these green sheets,
Firing was performed using the firing profile shown in Figure 2.
The obtained board was immersed in a solder bath at 260° C. for about 2 seconds to test the solder wettability of the outermost layer conductor. Ceramic compositions with solder all over the surfaces of the four types of conductors mentioned above were given a rating of ○, and even if one type of conductor had no solder all over the surfaces, a rating of × was given. From the experimental results, ceramic composition sample number 1~
Only No. 4 had extremely poor solderability. In order to investigate the cause of this, surface elemental analysis of the outermost layer conductor was conducted using the Auger analysis method for sample numbers 3 and 8 when the metal component was used as the outermost layer conductor at a weight ratio of Ag/Pd = 80/20. Ivy. The results are shown in FIGS. 5 and 6. Figure 5 shows sample number 3 of ceramic composition.
FIG. 2 is a chart showing the results of surface analysis of Ag/Pd with a combination of Ag/Pd=80/20. Figure 6 shows ceramic composition sample number 8 and Ag/Pd=
FIG. 2 is a chart showing the results of surface analysis of Ag/Pd using a combination of 80/20. In all cases, the sputtering speed was 150〓/MiN, so
Sputtering time on the X axis for both Figures 5 and 6
The 10 minute point indicates a depth of 1500 Å from the Ag/Pd surface. If you compare Figures 5 and 6, you will notice a big difference. In Figure 5, Ag/Pd
It can be seen that there is a large amount of SiO 2 on the surface and a large amount of O 2 . In Figure 6, Si exists on the surface of Ag/Pd, but at a depth of 1500 Å from the surface
It was found that SiO 2 did not exist. In addition, electron micrographs of these Ag/Pd surfaces (4000x magnification)
are shown in FIGS. 7 and 8. Figure 7 shows sample number 3 of ceramic composition.
With the combination of Ag/Pd=80/20 (weight ratio), Ag/Pd
This is an electron micrograph (4000x magnification) of the surface of
Figure 8 shows ceramic composition sample number 8 and Ag/Pd.
This is an electron micrograph (4000x magnification) of the surface of Ag/Pd with a combination of =80/20 (weight ratio). Comparing Figures 7 and 8, it can be seen that there is a significant difference.
In Fig. 7, it appears that the Ag/Pd surface is covered with a glass-like substance, but in Fig. 8, only Ag/Pd particles can be seen. This is because in ceramic composition sample number 3, that is, glass A-based composition, the amorphous glass in the ceramic substrate is
It is thought that it diffuses into Ag/Pd and inhibits solder wettability. As described above, the composition of the ceramic substrate has a large effect on the solderability of the outermost layer conductor. Among the evaluation items shown in Table 2, the test sample used for the evaluation of interlayer reliability was approximately 200 μm after firing.
Approximately 2cm x 2cm on both sides of the ceramic insulation layer with a thickness of
It was created so that the counter electrode was formed with an area of .
The material of the counter electrode used at this time has a metal component in weight ratio of Ag/Pd=100/0, 95/5, 90/10, 80/
A total of five types of electrode materials, 20 and 70/30, were tested for one ceramic composition using the above five types of electrode materials. The test method is to apply a voltage of 100V to the counter electrode, leave the test sample in an environment of 85℃ and 85% RH for 1000 hours, then return the sample to the room, apply 50V to the counter electrode, and measure the insulation resistance. At this time,
Ceramic compositions in which insulation resistance values are all 10 10 Ω or more when combining the above five types of electrode materials for one ceramic composition are given a rating of ○, and even if the insulation resistance of one electrode material is less than 10 10 Ω. and,
The ceramic composition was given a rating of x. Summarizing the above experimental results, the ceramic compositions that can be practically used as ceramic multilayer wiring boards are within the range of ceramic composition samples Nos. 6 to 9. Effects of the Invention As described above, the ceramic multilayer wiring board of the present invention can be fired in the air at a low temperature of, for example, 900°C, so it can save energy and has the possibility of incorporating passive elements such as resistors and capacitors. There is no warpage or deformation of the board after firing, and the solder wettability of the outermost layer conductor is also good. In addition, the inner layer conductor
Even when 100% Ag is used, there is no migration of Ag between layers, and the electrical resistance of the conductor is low, making it extremely useful in practice as it can provide a highly reliable and low-cost ceramic multilayer wiring board.
第１図は、本発明のセラミツク多層配線基板の
一実施例の一部切欠斜視図、第２図は、セラミツ
ク多層配線基板の焼成プロフアイルを示す図、第
３図は、セラミツク組成と内部導体との適合性を
評価する為の評価用サンプルの斜視図、第４図
は、セラミツク組成と内部導体の適合性を評価し
た結果の一例を示す平面図、第５図は、半田ぬれ
性の悪いAg／Pd表面のオージエ分析結果を示す
図、第６図は、半田ぬれ性の良いAg／Pd表面の
オージエ分析結果を示す図である。
１ａ，１ｂ，１ｃ，１ｄ……セラミツク絶縁
層、２……内部導体、３……最外層導体、４……
グリーンシート。
FIG. 1 is a partially cutaway perspective view of an embodiment of the ceramic multilayer wiring board of the present invention, FIG. 2 is a diagram showing the firing profile of the ceramic multilayer wiring board, and FIG. 3 is a diagram showing the ceramic composition and internal conductor. Fig. 4 is a plan view showing an example of the results of evaluating the compatibility between the ceramic composition and the internal conductor, and Fig. 5 is a perspective view of an evaluation sample for evaluating the compatibility of the ceramic composition with the internal conductor. FIG. 6 is a diagram showing the results of Auger analysis of the Ag/Pd surface, which shows the results of Auger analysis of the Ag/Pd surface with good solder wettability. 1a, 1b, 1c, 1d...ceramic insulating layer, 2...inner conductor, 3...outermost layer conductor, 4...
green sheet.
Claims (1)
SiO224〜33重量％、B2O32.4〜3.3重量％、
Na2O1.2〜1.65重量％、K2O0.8〜11重量％、
CaO3.2〜4.4重量％、MgO1.2〜1.65重量％、
PbO7.2〜9.9重量％、の組成範囲で総量100重量
％となるように選んだ組成物であり、内部層の導
電配線材料の金属成分が重量比でAg／Pd＝
100／０〜70／30、最外層の導電配線材料の金属
成分が重量比でAg／Pd＝95／５〜70／30の組成
範囲となるように選んだ組成物によつて構成され
ることを特徴とするセラミツク多層配線基板。 ２ 内部層の導電配線材料がAg100重量％である
ことを特徴とする特許請求の範囲第１項に記載の
セラミツク多層配線基板。[Claims] 1. The ceramic insulating layer contains 45 to 60% by weight of Al 2 O 3 ;
SiO2 24-33% by weight, B2O3 2.4-3.3 % by weight,
Na2O1.2 ~1.65wt%, K2O0.8 ~11wt%,
CaO3.2-4.4% by weight, MgO1.2-1.65% by weight,
The composition was selected so that the total amount was 100% by weight in the composition range of 7.2 to 9.9% by weight of PbO, and the metal component of the conductive wiring material in the internal layer was in a weight ratio of Ag/Pd =
100/0 to 70/30, and be composed of a composition selected so that the metal component of the outermost conductive wiring material has a weight ratio of Ag/Pd = 95/5 to 70/30. A ceramic multilayer wiring board featuring: 2. The ceramic multilayer wiring board according to claim 1, wherein the conductive wiring material of the internal layer is 100% by weight Ag.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61015154A JPS62173797A (en) | 1986-01-27 | 1986-01-27 | Ceramic multilayer wiring substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61015154A JPS62173797A (en) | 1986-01-27 | 1986-01-27 | Ceramic multilayer wiring substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62173797A JPS62173797A (en) | 1987-07-30 |
| JPH0447476B2 true JPH0447476B2 (en) | 1992-08-04 |
Family
ID=11880878
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61015154A Granted JPS62173797A (en) | 1986-01-27 | 1986-01-27 | Ceramic multilayer wiring substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62173797A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0728128B2 (en) * | 1988-03-11 | 1995-03-29 | 松下電器産業株式会社 | Ceramic multilayer wiring board and manufacturing method thereof |
| US6579817B2 (en) | 2000-04-26 | 2003-06-17 | Matsushita Electric Industrial Co., Ltd. | Dielectric ceramic composition and method for producing the same, and device for communication apparatus using the same |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5717474A (en) * | 1980-06-30 | 1982-01-29 | Nippon Electric Co | Multilayer ceramic substrate |
| JPS58156552A (en) * | 1982-03-11 | 1983-09-17 | Nec Corp | Inorganic composition for insulating ceramic paste |
| JPS599992A (en) * | 1982-07-08 | 1984-01-19 | 株式会社日立製作所 | Method of producing multilayer circuit board |
| JPS60257195A (en) * | 1984-06-01 | 1985-12-18 | 鳴海製陶株式会社 | Hybrid substrate and method of producing same |
-
1986
- 1986-01-27 JP JP61015154A patent/JPS62173797A/en active Granted
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5717474A (en) * | 1980-06-30 | 1982-01-29 | Nippon Electric Co | Multilayer ceramic substrate |
| JPS58156552A (en) * | 1982-03-11 | 1983-09-17 | Nec Corp | Inorganic composition for insulating ceramic paste |
| JPS599992A (en) * | 1982-07-08 | 1984-01-19 | 株式会社日立製作所 | Method of producing multilayer circuit board |
| JPS60257195A (en) * | 1984-06-01 | 1985-12-18 | 鳴海製陶株式会社 | Hybrid substrate and method of producing same |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS62173797A (en) | 1987-07-30 |
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