JPS62145337U - - Google Patents
Info
- Publication number
- JPS62145337U JPS62145337U JP1986032787U JP3278786U JPS62145337U JP S62145337 U JPS62145337 U JP S62145337U JP 1986032787 U JP1986032787 U JP 1986032787U JP 3278786 U JP3278786 U JP 3278786U JP S62145337 U JPS62145337 U JP S62145337U
- Authority
- JP
- Japan
- Prior art keywords
- hole
- attached
- semiconductor device
- semiconductor
- electrically insulating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims description 5
- 239000008188 pellet Substances 0.000 claims description 3
- 239000002184 metal Substances 0.000 claims description 2
- 239000000758 substrate Substances 0.000 claims description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15151—Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Die Bonding (AREA)
Description
第1図は本考案の実施例を示す縦断面図である
。 ここに、1…電気絶縁性基板、2…半導体ペレ
ツト、3…電気絶縁性フレーム、4…金属細線、
5…メタライズ層、6…接着材、7…貫通孔、8
…結線。
。 ここに、1…電気絶縁性基板、2…半導体ペレ
ツト、3…電気絶縁性フレーム、4…金属細線、
5…メタライズ層、6…接着材、7…貫通孔、8
…結線。
Claims (1)
- 電気絶縁性基板に半導体ペレツトを取付ける構
造の半導体装置において、半導体ペレツトを取付
ける部分はメタライズされており、かつ該部分に
は貫通穴が設けられており、該貫通穴には金属層
が設けられていることを特徴とする半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1986032787U JPH0739234Y2 (ja) | 1986-03-07 | 1986-03-07 | 半導体装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1986032787U JPH0739234Y2 (ja) | 1986-03-07 | 1986-03-07 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS62145337U true JPS62145337U (ja) | 1987-09-12 |
JPH0739234Y2 JPH0739234Y2 (ja) | 1995-09-06 |
Family
ID=30839797
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1986032787U Expired - Lifetime JPH0739234Y2 (ja) | 1986-03-07 | 1986-03-07 | 半導体装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0739234Y2 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6344745A (ja) * | 1986-08-11 | 1988-02-25 | Ibiden Co Ltd | 電子部品搭載用基板 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5836500A (ja) * | 1981-08-28 | 1983-03-03 | マックス株式会社 | 製図ヘッドの符号化用ディスク取付装置 |
JPS6218084A (ja) * | 1985-07-16 | 1987-01-27 | 新藤電子工業株式会社 | 半導体素子実装用プリント配線板の製造方法 |
JPS6239032A (ja) * | 1985-08-14 | 1987-02-20 | Matsushita Electric Works Ltd | 電子素子用チツプキヤリア |
-
1986
- 1986-03-07 JP JP1986032787U patent/JPH0739234Y2/ja not_active Expired - Lifetime
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5836500A (ja) * | 1981-08-28 | 1983-03-03 | マックス株式会社 | 製図ヘッドの符号化用ディスク取付装置 |
JPS6218084A (ja) * | 1985-07-16 | 1987-01-27 | 新藤電子工業株式会社 | 半導体素子実装用プリント配線板の製造方法 |
JPS6239032A (ja) * | 1985-08-14 | 1987-02-20 | Matsushita Electric Works Ltd | 電子素子用チツプキヤリア |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6344745A (ja) * | 1986-08-11 | 1988-02-25 | Ibiden Co Ltd | 電子部品搭載用基板 |
Also Published As
Publication number | Publication date |
---|---|
JPH0739234Y2 (ja) | 1995-09-06 |