JPS62140742U - - Google Patents
Info
- Publication number
- JPS62140742U JPS62140742U JP1986028407U JP2840786U JPS62140742U JP S62140742 U JPS62140742 U JP S62140742U JP 1986028407 U JP1986028407 U JP 1986028407U JP 2840786 U JP2840786 U JP 2840786U JP S62140742 U JPS62140742 U JP S62140742U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- mounting structure
- protrusion
- substrate
- utility
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 7
- 239000000758 substrate Substances 0.000 claims description 3
- 239000011347 resin Substances 0.000 claims description 2
- 229920005989 resin Polymers 0.000 claims description 2
- 229920001187 thermosetting polymer Polymers 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/741—Apparatus for manufacturing means for bonding, e.g. connectors
- H01L2224/743—Apparatus for manufacturing layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83385—Shape, e.g. interlocking features
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Die Bonding (AREA)
Description
第1図aは本考案の半導体装置の取付構造の一
実施例を示す平面図、第1図bは同図aのA―A
′線断面図、第2図は本考案の他の実施例を示す
平面図、第3図は本考案のその他の実施例を示す
断面図、第4図a,b,cは半導体装置のダイボ
ンデイング工程を説明するための概略図である。 1:被着基板、2:熱硬化性樹脂ペースト、3
:半導体装置、6:突起部。
実施例を示す平面図、第1図bは同図aのA―A
′線断面図、第2図は本考案の他の実施例を示す
平面図、第3図は本考案のその他の実施例を示す
断面図、第4図a,b,cは半導体装置のダイボ
ンデイング工程を説明するための概略図である。 1:被着基板、2:熱硬化性樹脂ペースト、3
:半導体装置、6:突起部。
Claims (1)
- 【実用新案登録請求の範囲】 (1) 半導体装置を熱硬化性樹脂ペーストを用い
て被着基板上に接着する半導体装置の取付構造に
おいて、前記半導体装置を平行に維持できるよう
に前記被着基板上に突起部を設けたことを特徴と
する半導体装置の取付構造。 (2) 前記突起部は断面略半球状に形成されてい
ることを特徴とする実用新案登録請求の範囲第1
項に記載の半導体装置の取付構造。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1986028407U JPS62140742U (ja) | 1986-02-27 | 1986-02-27 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1986028407U JPS62140742U (ja) | 1986-02-27 | 1986-02-27 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62140742U true JPS62140742U (ja) | 1987-09-05 |
Family
ID=30831339
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1986028407U Pending JPS62140742U (ja) | 1986-02-27 | 1986-02-27 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62140742U (ja) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH118335A (ja) * | 1997-02-17 | 1999-01-12 | Anam Ind Co Inc | 回路基板及びその製造方法とこれを用いた半導体パッケージの製造方法 |
JP2006332686A (ja) * | 2006-07-03 | 2006-12-07 | Matsushita Electric Ind Co Ltd | 固体撮像装置 |
JP2009087964A (ja) * | 2007-09-27 | 2009-04-23 | Kyocera Corp | 電子部品 |
JP6068645B2 (ja) * | 2013-07-30 | 2017-01-25 | 京セラ株式会社 | 配線基板および電子装置 |
JP2017199762A (ja) * | 2016-04-26 | 2017-11-02 | 京セラ株式会社 | 印刷配線板およびその製造方法 |
JP2018107181A (ja) * | 2016-12-22 | 2018-07-05 | 京セラ株式会社 | 電子装置および電子モジュール |
JPWO2020175619A1 (ja) * | 2019-02-28 | 2021-12-16 | 京セラ株式会社 | 電子部品搭載用パッケージ、電子装置及び発光装置 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS50109676A (ja) * | 1974-02-04 | 1975-08-28 |
-
1986
- 1986-02-27 JP JP1986028407U patent/JPS62140742U/ja active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS50109676A (ja) * | 1974-02-04 | 1975-08-28 |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH118335A (ja) * | 1997-02-17 | 1999-01-12 | Anam Ind Co Inc | 回路基板及びその製造方法とこれを用いた半導体パッケージの製造方法 |
JP2006332686A (ja) * | 2006-07-03 | 2006-12-07 | Matsushita Electric Ind Co Ltd | 固体撮像装置 |
JP2009087964A (ja) * | 2007-09-27 | 2009-04-23 | Kyocera Corp | 電子部品 |
JP6068645B2 (ja) * | 2013-07-30 | 2017-01-25 | 京セラ株式会社 | 配線基板および電子装置 |
JPWO2015016289A1 (ja) * | 2013-07-30 | 2017-03-02 | 京セラ株式会社 | 配線基板および電子装置 |
JP2017199762A (ja) * | 2016-04-26 | 2017-11-02 | 京セラ株式会社 | 印刷配線板およびその製造方法 |
JP2018107181A (ja) * | 2016-12-22 | 2018-07-05 | 京セラ株式会社 | 電子装置および電子モジュール |
JPWO2020175619A1 (ja) * | 2019-02-28 | 2021-12-16 | 京セラ株式会社 | 電子部品搭載用パッケージ、電子装置及び発光装置 |