JPS62124731A - Heat treatment method of semiconductor thin-film - Google Patents
Heat treatment method of semiconductor thin-filmInfo
- Publication number
- JPS62124731A JPS62124731A JP26387385A JP26387385A JPS62124731A JP S62124731 A JPS62124731 A JP S62124731A JP 26387385 A JP26387385 A JP 26387385A JP 26387385 A JP26387385 A JP 26387385A JP S62124731 A JPS62124731 A JP S62124731A
- Authority
- JP
- Japan
- Prior art keywords
- film
- semiconductor thin
- thin film
- heat treatment
- polycrystalline
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Recrystallisation Techniques (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体薄膜の熱処理方法に関するもので、特に
Ｔ Ｐ Ｔ （Ｔｈｉｎ Ｆｉｌｍ Ｔｒａｎｓｉｓｔ
ｏｒ）を形成するのに最適な半導体薄膜を得る方法に関
する。[Detailed Description of the Invention] [Industrial Field of Application] The present invention relates to a method for heat treatment of semiconductor thin films, and in particular, to a method for heat treatment of semiconductor thin films.
The present invention relates to a method for obtaining a semiconductor thin film that is optimal for forming an or).
本発明は、半導体薄膜の特性を熱処理により向上させる
方法において、半導体薄膜に中性元素イオンを５ Ｘ
１０ ”／ｃ！以上の濃度になるようにイオン注入して
上記半導体薄膜を非晶質化させた後、熱処理雰囲気ガス
の侵入を防ぐキャップ層を上記半導体薄膜上に形成して
熱処理を行うことによって、ＴＰＴ等を形成するのに最
適な半導体薄膜を得る方法に関するものである。The present invention provides a method for improving the properties of a semiconductor thin film by heat treatment, in which neutral element ions are added to the semiconductor thin film by 5X
After making the semiconductor thin film amorphous by implanting ions to a concentration of 10"/c! or higher, a cap layer is formed on the semiconductor thin film to prevent heat treatment atmosphere gas from entering, and heat treatment is performed. The present invention relates to a method for obtaining a semiconductor thin film that is optimal for forming TPT and the like.
ＬＳＩの微小化に伴って、５ｉＯｚ膜上等に多結晶Ｓｉ
を形成しその改質を向上させて単結晶化させ、そこにＴ
ＰＴ等の素子を形成する技術の重要性が増大している。With the miniaturization of LSI, polycrystalline Si is growing on 5iOz films, etc.
is formed and its modification is improved to make it into a single crystal, and then T
The importance of technology for forming elements such as PT is increasing.
通常ＴＰＴ形成のために使用される多結晶Ｓｉ （又は
非晶質Ｓｉ）膜には３０００人程度０厚さのものが用い
られる。多結晶Ｓｉ膜形成後、イオン注入により多結晶
層中のダングリングボンドを破壊する。このダングリン
グボンドが破壊されたＶをＳｉの場合の結晶回復温度５
５０ ”Ｃ以上例えば６００℃のＮ２等の雰囲気中で熱
処理することによって単結晶が膜内に成長する。Normally, a polycrystalline Si (or amorphous Si) film used for forming TPT has a thickness of about 3,000 mm. After forming the polycrystalline Si film, dangling bonds in the polycrystalline layer are destroyed by ion implantation. When this dangling bond is destroyed, V is the crystal recovery temperature in the case of Si.
A single crystal is grown in the film by heat treatment in an atmosphere of N2 or the like at a temperature of 50"C or more, for example, 600.degree.
多結晶Ｓｔを基板表面上に付着させた後、Ｓｉをイオン
注入して多結晶Ｓｉ膜を非晶質化した後、熱処理を行っ
た後再結晶させている。このときの熱処理温度を高温に
すると、アニール処理後の膜抵抗率が低下してしまう（
Ｎ型になる）問題があった。After depositing polycrystalline St on the substrate surface, Si ions are implanted to make the polycrystalline Si film amorphous, followed by heat treatment and recrystallization. If the heat treatment temperature at this time is set to a high temperature, the film resistivity after annealing will decrease (
There was a problem.
特に半導体薄膜の厚さが３０００Å以上の場合には、こ
の種の影響は大きくないが、厚さが３０００Å以下にな
るとアニール処理の条件が膜抵抗率に大きく影響して来
る。従ってこのような膜にＴＰＴを作り込むと各トラン
ジスタのｖｔｈがばらつくと言う問題があった。In particular, when the thickness of the semiconductor thin film is 3000 Å or more, this type of influence is not large, but when the thickness becomes 3000 Å or less, the annealing treatment conditions have a large effect on the film resistivity. Therefore, when a TPT is formed in such a film, there is a problem in that the vth of each transistor varies.
（問題点を解決するための手段〕
多結晶Ｓｉ （非晶質Ｓｉでも可）を基板表面上に付着
させた後、その多結晶Ｓｉ膜中に中性元素イオンが半導
体薄膜全面に渡って５ Ｘ １０１９／ｃＡ以上の濃度
になるようにイオン注入を行って非晶質化させた後、熱
処理雰囲気ガスの侵入を防ぐキャップ層を上記半導体薄
膜上に形成して熱処理を行うことによって一定な膜抵抗
率の半導体薄膜を得た。(Means for solving the problem) After depositing polycrystalline Si (or amorphous Si) on the substrate surface, neutral element ions are distributed over the entire surface of the semiconductor thin film in the polycrystalline Si film. After ion implantation to a concentration of X 1019/cA or higher to make it amorphous, a cap layer is formed on the semiconductor thin film to prevent the intrusion of heat treatment atmosphere gas, and heat treatment is performed to form a constant film. A resistive semiconductor thin film was obtained.
本願の発明者等が前記問題点の原因を種々検討した結果
、イオン注入を行って非晶質化させた半導体薄膜を６０
０℃以上の高温に置いて熱処理を行うと炉内雰囲気中に
存在するＮ２又は０２（酸化処理中）が半導体薄膜中に
侵入してドナーとなり膜の抵抗率を下げてしまうことが
判明した。このことは従来のように３０００人の厚みの
半導体膜では問題とならなかった。従って本発明に於い
ては熱処理雰囲気ガスの侵入を防ぐキャップ層を上記半
導体薄膜上に形成してアニーリング処理中に雰囲気中の
Ｎ又はＯが半導体基体中に侵入しないようにして抵抗率
の高い膜を得る。As a result of various studies on the causes of the above-mentioned problems, the inventors of the present application found that a semiconductor thin film that had been made amorphous by ion implantation was
It has been found that when heat treatment is performed at a high temperature of 0° C. or higher, N2 or 02 (during oxidation treatment) present in the furnace atmosphere enters the semiconductor thin film and becomes a donor, lowering the resistivity of the film. This did not pose a problem with conventional semiconductor films having a thickness of 3,000 people. Therefore, in the present invention, a cap layer is formed on the semiconductor thin film to prevent the infiltration of heat treatment atmosphere gases, thereby preventing N or O in the atmosphere from entering the semiconductor substrate during annealing treatment, thereby producing a film with high resistivity. get.
減圧ＣＶＤ法により半導体基板上に８００人の厚さに形
成した半導体Ｓｉ多結晶層中にＳｉ”を４０ｋｅｙで加
速して３ Ｘ １０１５ｃｍ−２注入させて多結晶Ｓｉ
半導体層を非晶質化させた後、５ｉＯｚ膜をキャップ層
としてＣＶＤ法により形成してＮ２雰囲気中で３０時間
のアニール処理を行って結晶化を進め、高抵抗の半導体
薄膜を得た。Polycrystalline Si was injected into a semiconductor Si polycrystalline layer formed to a thickness of 800 nm on a semiconductor substrate by low-pressure CVD using a 40-key method to inject 3 x 1015 cm-2 of polycrystalline Si.
After the semiconductor layer was made amorphous, a 5iOz film was formed as a cap layer by the CVD method, and annealing treatment was performed for 30 hours in a N2 atmosphere to promote crystallization, thereby obtaining a high-resistance semiconductor thin film.
上記の実施例のようにして単結晶化した半導体薄膜の比
抵抗はｌＸｌ０６Ω−ｃｍであったが、キャップ層を形
成せずにＮ２ガスの雰囲気中でアニールした半導体薄膜
の比抵抗はＬ Ｘ １０’Ω−ｃｍにしかならなかった
。またキャップ層を形成せずに酸素中の雰囲気でアニー
ルした半導体薄膜の比抵抗はｌＸＩＯ３Ω−ｃｍであっ
た。これから見ても本発明のアニール法により、高抵抗
で抵抗率の一定した半導体薄膜が′Ｍｉ雑な操作を伴わ
ずに得られることが判る。The specific resistance of the semiconductor thin film single crystallized as in the above example was lXl06 Ω-cm, but the specific resistance of the semiconductor thin film annealed in an N2 gas atmosphere without forming a cap layer was L x 10 It was only 'Ω-cm. Further, the specific resistance of the semiconductor thin film annealed in an oxygen atmosphere without forming a cap layer was lXIO3Ω-cm. From this, it can be seen that by the annealing method of the present invention, a semiconductor thin film with high resistance and constant resistivity can be obtained without any complicated operations.
Claims (1)
を非晶質化した後熱処理を行う半導体薄膜の熱処理方法
において、 上記半導体薄膜の上記中性元素イオンの濃度が５×１０
＾１＾９／ｃｍ＾３以上となる様に上記半導体薄膜を非
晶質化した後、熱処理雰囲気ガスの侵入を防ぐキャップ
層を上記半導体薄膜上に形成して熱処理を行う半導体薄
膜の熱処理方法。[Scope of Claims] A heat treatment method for a semiconductor thin film, in which neutral element ions are implanted into a semiconductor thin film to make the semiconductor thin film amorphous, and then heat treatment is performed, wherein the concentration of the neutral element ions in the semiconductor thin film is 5. ×10
A method for heat treatment of a semiconductor thin film, which comprises amorphizing the semiconductor thin film so that the thickness is ^1^9/cm^3 or more, and then forming a cap layer on the semiconductor thin film to prevent intrusion of heat treatment atmosphere gas and performing heat treatment. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP26387385A JPS62124731A (en) | 1985-11-26 | 1985-11-26 | Heat treatment method of semiconductor thin-film |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP26387385A JPS62124731A (en) | 1985-11-26 | 1985-11-26 | Heat treatment method of semiconductor thin-film |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62124731A true JPS62124731A (en) | 1987-06-06 |
Family
ID=17395425
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP26387385A Pending JPS62124731A (en) | 1985-11-26 | 1985-11-26 | Heat treatment method of semiconductor thin-film |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62124731A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5214497A (en) * | 1988-05-25 | 1993-05-25 | Hitachi, Ltd. | Polycrystalline silicon resistor for use in a semiconductor integrated circuit having a memory device |
| US5385863A (en) * | 1991-06-21 | 1995-01-31 | Nec Corporation | Method of manufacturing polysilicon film including recrystallization of an amorphous film |
-
1985
- 1985-11-26 JP JP26387385A patent/JPS62124731A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5214497A (en) * | 1988-05-25 | 1993-05-25 | Hitachi, Ltd. | Polycrystalline silicon resistor for use in a semiconductor integrated circuit having a memory device |
| US5385863A (en) * | 1991-06-21 | 1995-01-31 | Nec Corporation | Method of manufacturing polysilicon film including recrystallization of an amorphous film |
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