JPS6174344A - Packaging process of hybrid integrated circuit - Google Patents

Packaging process of hybrid integrated circuit

Info

Publication number
JPS6174344A
JPS6174344A JP19728184A JP19728184A JPS6174344A JP S6174344 A JPS6174344 A JP S6174344A JP 19728184 A JP19728184 A JP 19728184A JP 19728184 A JP19728184 A JP 19728184A JP S6174344 A JPS6174344 A JP S6174344A
Authority
JP
Japan
Prior art keywords
dip type
substrate
liquid resin
hybrid integrated
packaging
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19728184A
Other languages
Japanese (ja)
Inventor
Toshio Kumai
利夫 熊井
Shigekatsu Kobayashi
小林　茂勝
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP19728184A priority Critical patent/JPS6174344A/en
Publication of JPS6174344A publication Critical patent/JPS6174344A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components

Abstract

PURPOSE:To omit the preparation of various types of cases corresponding to the shapes of substrate by a method wherein a prepregtape is wound around the overall periphery and ends of DIP type substrate to fill the cavity inside the wound up tape with liquid resin. CONSTITUTION:Specified parts 2 are mounted on a DIP type substrate 1 provided with terminals 11 and then a prepregtape 5 made of glass epoxy base resin mixed with stiffener with specified width is wound around the overall periphery of DIP type substrate 1. At this time, stand of with specified length is protruded on the terminal side and up to the length covering the parts 2 on the part loading side before the tape 5 is wound around the substrate 1. Finally the part loading side of substrate 1 may befilled with liquid resin 4 to be solidified.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、混成集積回路等のＤ　Ｉ　Ｐ　（Ｄｕａｌ　
１ｎｌｉｎｅ　　Ｐａｃｋａｇｅ　）型基板の外装方法
に係り、とくにプリプレグテープ（合成樹脂に強化材を
混合したテープ）を用いた簡易な混成集積回路の外装方
法に関するものである。[Detailed Description of the Invention] [Field of Industrial Application] The present invention is applicable to DIP (Dual
The present invention relates to a method for packaging a 1nline Package) type board, and in particular to a method for packaging a simple hybrid integrated circuit using prepreg tape (a tape made of synthetic resin mixed with a reinforcing material).

近年、電子機器は小型、軽量化の要求が強く、したがっ
て、混成集積回路等の基板も高密度実装が余儀なくされ
るので、一般的に、これらの基板はＤＩＰ型が用いられ
ており、このＤＩＰ型、基板に実装された部品は、絶縁
性の樹脂で被覆されるようになっているが、樹脂で被覆
を行なう場合はＤＩＰ型基板の大きさに対応するケース
をそれぞれ用意しなければならないため、ケースを用い
ずに被覆雅行なえるＤＩＰ型基板の外装方法の改善が要
望されている。In recent years, there has been a strong demand for electronic devices to be smaller and lighter, and as a result, boards for hybrid integrated circuits and other devices must be mounted at high density.In general, these boards are of the DIP type. The parts mounted on the mold and board are covered with insulating resin, but when covering with resin, it is necessary to prepare a case corresponding to the size of the DIP board. There is a need for an improved packaging method for DIP type substrates that can be coated without using a case.

【従来の技術〕[Conventional technology]

第２図は、従来のＤＩＰ型基板の外装方竺を説明するた
めの（ａ）は液状樹脂浸漬前の要部断面図。FIG. 2 is a sectional view of a main part before immersion in liquid resin (a) for explaining the packaging method of a conventional DIP type board.

（ｂ）は浸漬後の要部断面図である。(b) is a sectional view of the main part after immersion.

端子１１を具備してなるＤＩＰ型基板１に所定の部品２
を実装したるのち、前記ＤＩＰ型基板ｌに対応する合成
樹脂成型品々１らなるケース３に絶縁性の樹脂液４を所
定量注入する。そして第２図（ａ）に示す如く液状樹脂
４を注入したケース３内に、ＤＩＰ型基型基板部品２を
実装した側から浸漬して、液状樹脂４が凝固した時点で
第２図（ｂ）のごとく端子１１を下にすれば、ケース３
の開口端部がＤＩＰ型基板１より下方に位置し、端子１
１のスタンドオフを形成した形となる。A predetermined component 2 is attached to a DIP type board 1 having a terminal 11.
After mounting, a predetermined amount of an insulating resin liquid 4 is injected into a case 3 consisting of a synthetic resin molded product 1 corresponding to the DIP type substrate 1. Then, as shown in FIG. 2(a), the DIP type base board component 2 is immersed from the mounted side into the case 3 into which the liquid resin 4 is injected, and when the liquid resin 4 solidifies, the liquid resin 4 is injected into the case 3. ), if terminal 11 is facing down, case 3
The open end of the terminal 1 is located below the DIP type substrate 1.
1 standoff is formed.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上記の構成のＤＩＰ型基板の外装方法にあっては、ディ
ップ型基板ｌの形状が変わるごとに、これらに対応する
ケース３を準備しなければならない。即ち合成樹脂成型
に必要な金型、材料、工数等が高価となり、その結果製
品がコスト高になるという問題点があった。In the method for packaging a DIP type substrate with the above configuration, each time the shape of the dip type substrate l changes, a corresponding case 3 must be prepared. That is, the molds, materials, man-hours, etc. necessary for synthetic resin molding are expensive, and as a result, the cost of the product is high.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は、上記の問題点を解決してコストダウンを図っ
たＤＩＰ型基板の外装方法を提供するもので、その手段
は、樹脂の注入によるＤＩＰ型基板の外装方法において
、前記基板の全周端面に沿って所定幅のプリプレグテー
プを巻きつけ、該プリプレグテープ内に液状樹脂を注入
するようにしたことよってなされる。The present invention provides a method for packaging a DIP type board that solves the above-mentioned problems and reduces costs. This is achieved by wrapping a prepreg tape of a predetermined width along the end face and injecting liquid resin into the prepreg tape.

〔作用〕[Effect]

上記ＤＩＰ型基板の外装方法は、強化材を混合したガラ
スエポキシ系樹脂光からなるプリプレグテープをＤＩＰ
型基板の全周に沿って端子側にスタンドオフを突出せし
めて巻きつけたのち、ＤｒＰ型基板の部品搭載側に液状
樹脂を注入して、凝固せしめる安価で簡易な外装方法で
ある。The exterior packaging method for the above DIP type board is to DIP a prepreg tape made of glass epoxy resin light mixed with reinforcing material.
This is an inexpensive and simple packaging method in which standoffs are made to protrude and wrap around the terminal side along the entire circumference of the type board, and then liquid resin is injected into the component mounting side of the DrP type board and solidified.

〔実施例〕〔Example〕

以下図面を参照しながら本発明に係る混成集積回路の外
装方法の実施例について詳細に説明する。Embodiments of a method for packaging a hybrid integrated circuit according to the present invention will be described in detail below with reference to the drawings.

第１図は、本発明に係る混成集積回路の外装方法の一実
施例を説明するための（ａ）はプリプレグテープを巻き
つけた斜視図、　（ｂ）はプリプレグテープを巻きつけ
た枠内に液体樹脂を注入した斜視図で、第２図と同等の
部分については同一符号を付している。1A and 1B are perspective views showing an embodiment of a hybrid integrated circuit packaging method according to the present invention; FIG. This is a perspective view of the liquid resin injected, and the same parts as in FIG. 2 are given the same reference numerals.

端子１１を具備してなるＤＩＰ型基板１に所定の部品２
を実装したるのち、前記ＤＩＰ型基板１の全周に沿って
、所定幅の強化材を混合したエポキシ樹脂光からなるプ
リプレグテープ５を巻つけるのであるが、この場合端子
１１側には所定長さのスタンドオフを突出せしめ、部品
２の搭載側には実装部品２を被覆する長さを突出せしめ
て巻きつけたのち、ＤＩＰ型基型基板部品搭載側に液状
樹脂４を注入して、凝固せしめる構造としたものである
。A predetermined component 2 is attached to a DIP type board 1 having a terminal 11.
After mounting, a pre-preg tape 5 made of epoxy resin mixed with reinforcing material of a predetermined width is wrapped along the entire circumference of the DIP type substrate 1. After making the standoffs protrude and wrap the mounting part 2 so that the length to cover the mounted part 2 is protruded from the mounting side of the part 2, liquid resin 4 is injected into the part mounting side of the DIP type base board and solidified. The structure is designed to encourage

〔発明の効果〕〔Effect of the invention〕

以上の説明から明らかなように、本発明に係る混成集積
回路の外装方法によれば、ＤＩＰ型基板の外形寸法を自
由に変えられ、コストダウンとなる利点がある。As is clear from the above description, the method for packaging a hybrid integrated circuit according to the present invention has the advantage that the external dimensions of the DIP type substrate can be changed freely, resulting in cost reduction.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は、本発明に係る混成集積回路の外装方法の一実
施例を説明するための（ａ）はプリプレグテープを巻き
つけた斜視図、（ｂ）はプリプレグテープを巻きつけた
枠内に液体樹脂を注入した斜視図、第２図は、従来のデ
ィップ型基板の外装方法を説明するための＜ａｔは液状
樹脂浸漬前の要部断面図。 （ｂ）は浸漬後の要部断面図である。 図中、１はＤＩＰ型基板、２は部品、３はケース、４は
液状樹脂、５はプリプレグテープ、１１は端子、をそれ
ぞれ示す。 第１図 （Ｑ）　　　　　　　　　　　　（ｂ）ｌ。 第２図1A and 1B are perspective views showing an embodiment of a method for packaging a hybrid integrated circuit according to the present invention; FIG. FIG. 2 is a perspective view of the liquid resin injected, and FIG. 2 is a sectional view of the main part before being immersed in the liquid resin, for explaining a conventional method for packaging a dip-type substrate. (b) is a sectional view of the main part after immersion. In the figure, 1 is a DIP type board, 2 is a component, 3 is a case, 4 is a liquid resin, 5 is a prepreg tape, and 11 is a terminal. Figure 1 (Q) (b)l. Figure 2

Claims (1)

【特許請求の範囲】[Claims] 樹脂の注入によるＤＩＰ型混成集積回路基板の外装方法
において、前記基板の全周端面に沿って所定幅のプリプ
レグテープを巻きつけ、該プリプレグテープ内に液状樹
脂を注入するようにしたことを特徴とする混成集積回路
の外装方法。A method for packaging a DIP type hybrid integrated circuit board by resin injection, characterized in that a prepreg tape of a predetermined width is wrapped around the entire circumference of the board, and a liquid resin is injected into the prepreg tape. A packaging method for hybrid integrated circuits.
JP19728184A 1984-09-19 1984-09-19 Packaging process of hybrid integrated circuit Pending JPS6174344A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19728184A JPS6174344A (en) 1984-09-19 1984-09-19 Packaging process of hybrid integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19728184A JPS6174344A (en) 1984-09-19 1984-09-19 Packaging process of hybrid integrated circuit

Publications (1)

Publication Number Publication Date
JPS6174344A true JPS6174344A (en) 1986-04-16

Family

ID=16371850

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19728184A Pending JPS6174344A (en) 1984-09-19 1984-09-19 Packaging process of hybrid integrated circuit

Country Status (1)

Country Link
JP (1) JPS6174344A (en)

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