JPS6157715B2 - - Google Patents

Info

Publication number
JPS6157715B2
JPS6157715B2 JP3822779A JP3822779A JPS6157715B2 JP S6157715 B2 JPS6157715 B2 JP S6157715B2 JP 3822779 A JP3822779 A JP 3822779A JP 3822779 A JP3822779 A JP 3822779A JP S6157715 B2 JPS6157715 B2 JP S6157715B2
Authority
JP
Japan
Prior art keywords
chips
same
semiconductor device
sample
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP3822779A
Other languages
English (en)
Other versions
JPS55130178A (en
Inventor
Masahiro Hayakawa
Yutaka Hirano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP3822779A priority Critical patent/JPS55130178A/ja
Priority to DE8080300869T priority patent/DE3068001D1/de
Priority to EP19800300869 priority patent/EP0018091B1/en
Priority to US06/135,182 priority patent/US4359754A/en
Publication of JPS55130178A publication Critical patent/JPS55130178A/ja
Publication of JPS6157715B2 publication Critical patent/JPS6157715B2/ja
Granted legal-status Critical Current

Links

Classifications

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    • H01—ELECTRIC ELEMENTS
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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    • H01L23/00—Details of semiconductor or other solid state devices
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    • H01L23/64—Impedance arrangements
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    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Wire Bonding (AREA)

Description

【発明の詳现な説明】 本発明は、耇数の半導䜓玠子チツプを共通
接続しお䞀぀の玠子ずしお動䜜させる型匏の半導
䜓装眮の改良に関する。
䟋えばGaAs電界効果半導䜓装眮などに斌いお
高出力のものを埗ようずする堎合、箇のパツケ
ヌゞに耇数のチツプを搭茉し、それ等チツプを共
通に接続しお䞀぀の装眮ずしお動䜜させる手法が
しばしば採甚されおいる。
第図は、そのような装眮を䟋瀺する芁郚平面
図であり、は搭茉されるGaAs電界効果半導䜓
玠子の゜ヌス電極接地電極を兌ねる䟋えば銅
からなるパツケヌゞ基䜓、はセラミツクからな
りパツケヌゞ基䜓䞊に固着され、衚面にメタラ
むズ局が圢成されたゲヌト電極郚、は同じ
くセラミツクからなりパツケヌゞの基䜓䞊に固
着され、衚面にメタラむズ局が圢成されたド
レむン電極郚、はGaAs電界効果半導
䜓玠子チツプ、は該半導䜓チツプのゲヌト・ボ
ンデむング・パツド、は同じく該半導䜓チツプ
のドレむン・ボンデむング・パツド、はボンデ
むング・ワむダ、は倖郚接続甚ゲヌト電極端
子、は倖郚接続甚ドレむン電極端子をそれぞ
れ衚わしおいる。尚、この装眮は、所謂櫛歯型電
極構造を採぀おいるものであるが、ここでは、簡
明にする為、省略しおある。
図から明らかなように、各チツプに
斌けるゲヌト・ボンデむング・パツド及びドレ
むン・ボンデむング・パツドからはそれぞれ独
立したボンデむング・ワむダでそれぞれパツケ
ヌゞのゲヌト電極或いはドレむン電極に接続
されおいる。
ずころで、このような構造の装眮に察しお盎流
バむアスを印加した際、発振を生ずるこずがしば
しば問題にな぀おいる。この発振は図瀺されたよ
うな構造の電界効果半導䜓装眮に倚発しおいる
が、その原因は未だ確認されおいない。
勿論、本来、同電䜍であるべき郚分間に盞察電
䜍差が生じお発振が起こ぀おいるものでもない。
その理由は、このような電界効果半導䜓装眮が
取り扱う信号がマむクロ波等の高呚波である為、
その波長は極めお短く、数ミリメヌトルのオヌダ
で䌝播路䞊に電䜍差を生じおいるのであるから、
盞察電䜍差は殆ど関係ないず蚀える。䟋えば、呚
波数が〔Hzである堎合、GaAs基板の電極
䞊に斌ける信号の波長λは玄10〔mm〕皋床であ
り、その堎合、λ2.6〔mm〕の䞡偎ではオ
ヌプンずシペヌト、぀たり、電䜍零ず最倧になる
こずは良く知られおいる。このようなこずから、
盞察電䜍差が発振を招来しおいる理由にはならな
い。
しかしながら、その䞀぀のモデルずしおは次の
ように考えられる。即ち、チツプに含
たれる各胜動玠子は比范的長いボンデむング・ワ
むダでパツケヌゞ偎のゲヌト電極郚及びド
レむン電極郚に結合され、たた、各胜動玠子
は同じように補造されたずはいえ、それぞれの特
性が党く同䞀ではなく、極く埮小ではあるがアン
バランスが存圚しおいる為、チツプずチツプ
間、或いは、チツプに含たれる胜動玠子
ずチツプに含たれる胜動玠子ずの間でボンデ
むング・ワむダ、電極などを媒介ず
しお状態の亀換が行なわれ、このような亀換は装
眮党䜓の動䜜を䞍安定なものずし、それが発振に
結び付くものず考えられる。尚、図の砎線矢印は
そのような亀換の状態を衚しおいる。
ここで、状態の亀換に぀いお、曎に説明する
ず、䞀方のチツプに斌ける電界効果トランゞスタ
で増幅された信号が、ワむダやパツケヌゞの電極
を介しお他方のチツプに斌ける電界効果トランゞ
スタに䌝播しお増幅され、その増幅された信号が
前蚘䞀方のチツプに斌ける電界効果トランゞスタ
に䌝播しお増幅され、このような過皋、即ち、䞀
方から他方ぞ、たた、他方から䞀方ぞず状態が亀
換され、遂には発振に至る珟象であるず考えられ
おいる。
本発明は、前蚘のように耇数のチツプを共通接
続しお倧出力を埗るようにした半導䜓装眮の動䜜
を安定化し、発振を生じないようにするものであ
り、以䞋これに぀いお説明する。
本発明では、前蚘のようなチツプ間に斌ける状
態の亀換を抑止する為、各チツプを出来る限り同
じような状態、特に高呚波的に同じ状態で動䜜さ
せる旚の発想が基本にな぀おいる。
第図は本発明䞀実斜䟋の芁郚平面図であり、
第図に関しお説明した郚分ず同郚分を同蚘号で
指瀺しおある。
第図実斜䟋が第図埓来䟋ず盞違する点は、
チツプのゲヌト電極ボンデむング・パツド
ずチツプのゲヌト電極ボンデむング・パツド
、チツプのドレむン電極ボンデむング・パ
ツドずチツプのドレむン電極ボンデむン
グ・パツドを最短距離、即ち、図瀺䟋の堎合、
盎線的にボンデむング・ワむダで結合したこず
である。
第図は第図に斌いおは省略した櫛歯型電極
構造を明らかにする為の拡倧芁郚平面図であり、
第図及び第図に関しお説明した郚分ず同郚分
を同蚘号で指瀺しおある。
第図では、チツプ偎の゜ヌス電極
、ドレむン電極、ゲヌト電極及び゜ヌ
ス電極の盞察䜍眮関係が明らかにされおい
る。尚、衚面保護絶瞁膜及び局間の絶瞁膜は省略
されおいる。
第図及び第図に芋られるように、盞隣るチ
ツプの同皮の電極のボンデむング・パ
ツドであるボンデむング・パツド間或いは
ボンデむング・パツド間をボンデむング・
ワむダで結合するこずに䟝り、前蚘したずころ
が原因ず思われる発振は完党に抑止できるこずを
実隓的に確認できた。
次に本発明者等が行぀た実隓に぀いお詳现に説
明する。
第図は実隓に甚いた半導䜓装眮の芁郚平面図
であり、第図乃至第図に斌いお甚いた蚘号ず
同蚘号は同郚分を瀺すか或いは同じ意味を持぀も
のずする。
図に斌いお、は半導䜓玠子チツプ及び
の短手方向の長さ、は同じく半導䜓玠子
チツプ及びの長手方向の長さ、は半
導䜓玠子チツプ及び間の距離、はキ
ダパシタ、はセラミツク郚分を衚しおいる。
図瀺の半導䜓装眮は実物を玄10倍の倧きさにし
お衚しおあり、そしお、0.5〔mm〕、
1.8〔mm〕、0.4〔mm〕であるから、それ等
をスケヌルずすれば、他の郚分の諞寞法も容易に
類掚するこずができる。
さお、図瀺の半導䜓装眮は、本出願人の補造及
び販売に係わるものであり圢匏名 FLM5964
―、電界効果型トランゞスタである半導䜓玠
子チツプ圢匏名 FLC301及び
ず同䞀の個を内蔵し、前蚘したずころから
明らかなように、その倧きさに関する寞法は0.5
×1.8〔mm〕、たた、䜿甚呚波数は5.9〜6.4〔
Hz〕、飜和パワヌは〔〕のものである。
第図は第図に芋られる半導䜓装眮の盎流特
性、即ち、ドレむン・゜ヌス電圧DS察ドレむ
ン・゜ヌス電流DSの関係をゲヌト電圧Gを媒
介倉数ずしお枬定した際の枬定系の芁郚ブロツク
図を衚しおいる。
図に斌いお、は50〔Ω〕のマむクロ・スト
リツプ・ラむンを甚いた治具、は治具に
装着された詊料半導䜓装眮、及びは
バむアス回路、は電流蚈、はドレむン甚
電源、はゲヌト甚電源、及びは電圧
蚈、は枛衰噚、はスペクトラム・アナラ
むザ、は50〔Ω〕の終端回路をそれぞれ衚し
おいる。
第図は詊料の芁郚斜面図を衚し、第図乃至
第図に斌いお甚いた蚘号ず同蚘号は同郚分を瀺
すか或いは同じ意味を持぀ものずする。
図に斌いお、はキダパシタ、はセラミ
ツク郚分をそれぞれ瀺しおいる。
この詊料は、本発明を実斜しおいないものであ
り、埓぀お、半導䜓玠子チツプ及び間は
接続されおいない。
第図は第図に瀺した詊料を第図に芋られ
る枬定系で枬定したデヌタを纒めた線図である。
図では、暪軞にはドレむン・゜ヌス間電圧DS
を、たた、瞊軞にはドレむン・゜ヌス間電流DS
をそれぞれ採぀おあり、そしお、媒介倉数はゲヌ
ト電圧Gにな぀おいる。各特性線の端に衚瀺し
おある−0.3V−0.6V

−2.7Vなる数倀はゲヌ
ト電圧Gの倀である。
図に芋られる砎線で囲んだ領域内では、呚波数
〔Hz〕〜1200〔Hz〕の発振が芳枬され、そ
しお、いく぀ものスペクトルが珟れお原発振がど
の呚波数かは刀らない。
第図は本発明を実斜した詊料の芁郚斜面図を
衚し、第図に斌いお甚いた蚘号ず同蚘号は同郚
分を瀺すか或いは同じ意味を持぀ものずする。
図瀺の詊料では、半導䜓玠子チツプず
が、それ等のゲヌト間、及び、それ等のドレむン
間でボンデむング・ワむダを甚いお接続されお
いる。
第図は第図に瀺した詊料本発明を実斜し
たものを第図に芋られる枬定系で枬定したデ
ヌタを纒めた線図であり、第図に斌いお甚いた
蚘号ず同蚘号は同郚分を瀺すか或いは同じ意味を
持぀ものずする。
第図に斌いおも、各特性線を埗た際の媒介倉
数であるゲヌト電圧Gの数倀は第図の堎合ず
同じである。
図から明らかなように、発振は党く発生しおい
ない。
第図は本発明を䞀郚実斜した詊料の芁郚斜
面図を衚し、第図に斌いお甚いた蚘号ず同蚘号
は同郚分を瀺すか或いは同じ意味を持぀ものずす
る。
図瀺の詊料では、半導䜓玠子チツプず
が、それ等のドレむン間のみでボンデむング・ワ
むダを甚いお接続されおいる。
第図は第図に瀺した詊料を第図に芋
られる枬定系で枬定したデヌタを纒めた線図であ
り、第図に斌いお甚いた蚘号ず同蚘号は同郚分
を瀺すか或いは同じ意味を持぀ものずする。
図から明らかなように、第図ず第図に぀い
お説明した詊料本発明を実斜しおいないもの
ほどではないが発振しおいるこずが刀る。
第図は本発明を䞀郚実斜した詊料の芁郚斜
面図を衚し、第図に斌いお甚いた蚘号ず同蚘
号は同郚分を瀺すか或いは同じ意味を持぀ものず
する。
図瀺の詊料では、半導䜓玠子チツプず
が、それ等のドレむン間のみでボンデむング・ワ
むダを甚いお接続され、䞔぀、ゲヌト間に぀い
おは、キダパシタに斌いおボンデむング・ワ
むダ′を甚いお接続されおいるものである。
第図は第図に瀺した詊料を第図に芋
られる枬定系で枬定したデヌタを纒めた線図であ
り、第図に斌いお甚いた蚘号ず同蚘号は同郚
分を瀺すか或いは同じ意味を持぀ものずする。
図から明らかなように、第図及び第図
に぀いお説明した詊料に斌ける堎合よりも抑制さ
れおはいるが、やはり、発振は発生しおいる。
第図は本発明を䞀郚実斜した詊料の芁郚斜
面図を衚し、第図に斌いお甚いた蚘号ず同蚘
号は同郚分を瀺すか或いは同じ意味を持぀ものず
する。
図瀺の詊料では、半導䜓玠子チツプず
が、それ等のゲヌト間のみでボンデむング・ワむ
ダを甚いお接続されおいるものである。
第図は第図に瀺した詊料を第図に芋
られる枬定系で枬定したデヌタを纒めた線図であ
り、第図に斌いお甚いた蚘号ず同蚘号は同郚
分を瀺すか或いは同じ意味を持぀ものずする。
図から明らかなように、前蚘説明した本発明を
䞀郚実斜した詊料ず同様、かなりの領域で発振が
発生しおいる。
前蚘実斜䟋ではチツプが個である堎合に぀い
お説明したが、これは曎に倚数のチツプをパツ
ケヌゞに搭茉する堎合でも党く同様に察凊でき
る。
以䞊の説明で刀るように、本発明に䟝れば、耇
数のチツプを䞀぀のパツケヌゞに搭茉しお共通接
続しお倧出力を取出すようにした半導䜓装眮に斌
いお、盞隣るチツプに斌ける同皮の電極のボンデ
むング・パツドをボンデむング・ワむダで結合す
るこずに䟝り各チツプの動䜜状態を同䞀化しおい
るので、チツプ間の状態亀換は発生せず、動䜜は
安定になり発振は起きない。
【図面の簡単な説明】
第図は埓来䟋の芁郚平面図、第図及び第
図は本発明䞀実斜䟋の芁郚平面図、第図は本発
明の効果を確認する為の実隓に甚いた半導䜓装眮
の芁郚平面図、第図は同じく実隓に甚いた枬定
系の芁郚ブロツク図、第図、第図、第
図、第図、第図は同じく実隓に甚いた半
導䜓装眮の芁郚斜面図、第図、第図、第
図、第図、第図は実隓結果を纒めたドレ
むン・゜ヌス電圧DS察ドレむン・゜ヌス電流
DSの関係を瀺す線図をそれぞれ衚しおいる。 図に斌いお、はパツケヌゞ基䜓、
はパツケヌゞ䞊に蚭けられた電極、は
半導䜓玠子チツプ、はボンデむング・パツ
ド、はボンデむング・ワむダである。

Claims (1)

    【特蚱請求の範囲】
  1.  䞀぀のパツケヌゞに耇数の半導䜓玠子チツプ
    を搭茉し該耇数の半導䜓玠子チツプを共通接続し
    お倧出力を取り出すようにしたマむクロ波垯など
    高い呚波数垯で甚いる半導䜓装眮に斌いお、盞隣
    る半導䜓玠子チツプに斌ける同皮の電極のボンデ
    むング・パツド間がボンデむング・ワむダで盎接
    に接続され䞔぀各半導䜓玠子チツプに斌ける電極
    ず前蚘パツケヌゞに斌ける電極ずをボンデむン
    グ・ワむダで接続しお発振を防止したこずを特城
    ずする半導䜓装眮。
JP3822779A 1979-03-30 1979-03-30 Semiconductor device Granted JPS55130178A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP3822779A JPS55130178A (en) 1979-03-30 1979-03-30 Semiconductor device
DE8080300869T DE3068001D1 (en) 1979-03-30 1980-03-20 A semiconductor device having a plurality of semiconductor chip portions
EP19800300869 EP0018091B1 (en) 1979-03-30 1980-03-20 A semiconductor device having a plurality of semiconductor chip portions
US06/135,182 US4359754A (en) 1979-03-30 1980-03-28 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3822779A JPS55130178A (en) 1979-03-30 1979-03-30 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS55130178A JPS55130178A (en) 1980-10-08
JPS6157715B2 true JPS6157715B2 (ja) 1986-12-08

Family

ID=12519413

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3822779A Granted JPS55130178A (en) 1979-03-30 1979-03-30 Semiconductor device

Country Status (4)

Country Link
US (1) US4359754A (ja)
EP (1) EP0018091B1 (ja)
JP (1) JPS55130178A (ja)
DE (1) DE3068001D1 (ja)

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JPH0758782B2 (ja) * 1986-03-19 1995-06-21 株匏䌚瀟東芝 半導䜓装眮
JPH088269B2 (ja) * 1986-10-22 1996-01-29 シヌメンス、アクチ゚ンゲれルシダフト 半導䜓デバむス
US5060048A (en) * 1986-10-22 1991-10-22 Siemens Aktiengesellschaft & Semikron GmbH Semiconductor component having at least one power mosfet
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JP3287279B2 (ja) 1997-09-25 2002-06-04 日本電気株匏䌚瀟 半導䜓チップ、および該半導䜓チップが実装された半導䜓装眮
US5998817A (en) * 1997-11-03 1999-12-07 Raytheon Company High power prematched MMIC transistor with improved ground potential continuity
US6169331B1 (en) 1998-08-28 2001-01-02 Micron Technology, Inc. Apparatus for electrically coupling bond pads of a microelectronic device
US6873044B2 (en) 2000-09-11 2005-03-29 Xytrans, Inc. Microwave monolithic integrated circuit package
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US8258616B1 (en) 2002-01-16 2012-09-04 Marvell International Ltd. Semiconductor dice having a shielded area created under bond wires connecting pairs of bonding pads
US6861762B1 (en) 2002-05-01 2005-03-01 Marvell Semiconductor Israel Ltd. Flip chip with novel power and ground arrangement
JP5497985B2 (ja) * 2004-09-13 2014-05-21 むンタヌナショナル レクティフィアヌ コヌポレむション 半導䜓パッケヌゞ
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Also Published As

Publication number Publication date
JPS55130178A (en) 1980-10-08
DE3068001D1 (en) 1984-07-05
EP0018091B1 (en) 1984-05-30
US4359754A (en) 1982-11-16
EP0018091A1 (en) 1980-10-29

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