JPS6154938A - Manufacture of multilayer printed board - Google Patents

Manufacture of multilayer printed board

Info

Publication number
JPS6154938A
JPS6154938A JP59177761A JP17776184A JPS6154938A JP S6154938 A JPS6154938 A JP S6154938A JP 59177761 A JP59177761 A JP 59177761A JP 17776184 A JP17776184 A JP 17776184A JP S6154938 A JPS6154938 A JP S6154938A
Authority
JP
Japan
Prior art keywords
board
substrate
multilayer
lands
multilayer printed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59177761A
Other languages
Japanese (ja)
Other versions
JPH0212751B2 (en
Inventor
敏郎 児玉
三ツ井 久三
桜木 信男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP59177761A priority Critical patent/JPS6154938A/en
Publication of JPS6154938A publication Critical patent/JPS6154938A/en
Publication of JPH0212751B2 publication Critical patent/JPH0212751B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Laminated Bodies (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は板厚分布の均一性を良くすると共にボイドの含
有を少なくした多層プリント板の製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a multilayer printed board that improves the uniformity of the board thickness distribution and reduces the inclusion of voids.

大量の情報を迅速に処理するため情報処理装置の進歩は
著しく、これを構成する半導体装置は単位素子の小形化
と大容量化が進められていると共にこれを用いて高密度
実装が行われている。
In order to quickly process large amounts of information, information processing devices have made remarkable progress, and the semiconductor devices that make up these devices are becoming smaller and larger in capacity, and are being used for high-density packaging. There is.

すなわち半導体装置は従来のIC,LSIよりも構成素
子数が格段に多いVLSIが実用化され、これがプリン
ト配線基板上に高密度に装着される。
That is, VLSI semiconductor devices, which have a much larger number of constituent elements than conventional ICs and LSIs, have been put into practical use, and these are mounted on printed wiring boards at high density.

ここでVLSIの構成素子数は厖大であるから端子数も
数100本と多く、マトリックス状に形成された多数の
リードビンをプリント配線基板上にパターン形成された
ランドに接着する装着法が考えられている。
Since the number of components of VLSI is enormous, the number of terminals is also large, numbering in the hundreds, and a mounting method has been considered in which a large number of lead bins formed in a matrix are bonded to lands patterned on a printed wiring board. There is.

かかる部品装着法がとられる場合は部品装着が行われて
いる数多くのランドを結んで電子回路を形成するために
導体線路は極めて微細な線幅のものが必要であり、現在
2.5鮪の間隔でパターン形成されているランドの間に
150μm以下のパターン幅をもつ導体、パターンが2
〜3本走行する微細パターンが実用化されている。
When such a component mounting method is used, the conductor line must have an extremely fine line width in order to connect the many lands on which the components are mounted to form an electronic circuit. A conductor with a pattern width of 150 μm or less between lands patterned at intervals;
A fine pattern with three running lines has been put into practical use.

またこのような高密度の部品装着を行うには配線基板の
多層化が必要で現在10層を越える多層配NMJA板が
実用化されている。
Furthermore, in order to mount components at such a high density, it is necessary to make the wiring board multilayered, and multilayer NMJA boards having more than 10 layers are currently in practical use.

以上のようにプリント配線基板は多層化されると共にこ
れを構成する各の基板には微細な導体パターンが設けら
れているが、そのためにはボイドの含有がなく、また各
の基板は均等な膜厚分布をもって形成されていることが
必要である。
As mentioned above, printed wiring boards are multi-layered and each board that makes up the board is provided with a fine conductor pattern, but this requires that there be no voids and that each board has a uniform layer. It is necessary that it be formed with a thickness distribution.

〔従来の技術〕[Conventional technology]

多層プリント板を作るにはパターン形成の終わったプリ
ント配線基板(以下略して基板)をプリプレグと云われ
る半硬化のエポキシ樹脂を主構成材とするボンディング
シートと交互に重ね合わせ、成型プレスを用いて高温で
圧縮して相互に融着させて完成する。
To make a multilayer printed board, a patterned printed wiring board (hereinafter referred to as a board) is alternately layered with a bonding sheet whose main component is a semi-cured epoxy resin called prepreg, and a molding press is used. They are completed by being compressed at high temperatures and fused together.

第2図はこの形成法を説明するもので、最も前車な四層
構造の多層基板を形成するi烏合を説明すると次のよう
になる。
FIG. 2 explains this formation method, and the i-combination for forming a multilayer board with a four-layer structure, which is the most advanced, is explained as follows.

両面に写真食刻技術(ホトリソグラフィ)を用いてパタ
ーン形成した基板1を中心とし積層金型2の基準ピン3
を用いてプリプレグ4を上下に置き、この上に銅張り積
層板を配置して位置決めする。
A reference pin 3 of a laminated mold 2 is centered on a substrate 1 that has been patterned on both sides using photolithography.
The prepregs 4 are placed one on top of the other, and the copper-clad laminate is placed and positioned thereon.

実際には数層の多層基板を形成するので複数枚の基板l
は基準ピン3を用い、正確に位置決めしながらプリプレ
グ4と交互に重ね合わせる。
In reality, a multilayer board with several layers is formed, so multiple boards l
The reference pins 3 are used to accurately position the prepregs 4 and the prepregs 4 are overlapped alternately.

このように積層金型2を用いて積み重た後、ヒータを備
えた熱板で上下から挟み、約200°Cで加熱した状態
で30〜50 kg / Cntの圧力を加えて融着せ
しめる。
After being stacked using the stacking mold 2 in this manner, they are sandwiched from above and below between hot plates equipped with heaters, and are fused by applying a pressure of 30 to 50 kg/Cnt under heating at about 200°C.

このようにして製造された多層基材はパターン形成が行
われている中央部を残して製品サイズに切断することに
より多層基板ができあがる。
The multilayer base material manufactured in this way is cut into a product size, leaving the central portion where the pattern is formed, to complete a multilayer substrate.

ここで多層基板にはボイドが含まれておらず、また均等
な板厚分布をもって形成されていることが必要である。
Here, it is necessary that the multilayer substrate does not contain voids and has a uniform thickness distribution.

然し、このことは容易ではない。その理由は基板1の両
面にはパターン形成が成されているが、製品サイズ外で
後の工程で切断される外周部はパターンがないためにパ
ターン形成が行われている中央部と較べると厚さが薄く
、これが原因で多層基板の厚さの分布が不均一になり易
い。
However, this is not easy. The reason for this is that although patterns are formed on both sides of the substrate 1, the outer periphery, which is outside the product size and will be cut in a later process, is thicker than the central part where the pattern is formed because there is no pattern. Because of this, the thickness distribution of the multilayer substrate tends to be uneven.

また基板1とプリプレグ4とを重ね合わせた段階ではそ
の間に多量の空気が含まれており、これは加熱圧縮工程
中に基板面から抜は去る筈であるが、現実には部分的に
残存してボイドを形成し、配線パターン間の絶縁を低下
させている。
Furthermore, when the substrate 1 and the prepreg 4 are stacked together, a large amount of air is contained between them, and although this should be removed from the substrate surface during the heating and compression process, in reality, it may partially remain. This results in the formation of voids between wiring patterns, which reduces the insulation between wiring patterns.

そこでこの対策として第3図及び第4図に示すように微
細パターンの形成が行われている基板1の製品サイズ6
の外周部にダミーパターン7.8を設けて厚さの不均一
を緩和すると共にプ2レス方法を改良するなどの方法が
講じられている。
Therefore, as a countermeasure against this problem, as shown in FIGS. 3 and 4, the product size 6 of the substrate 1 on which fine patterns are formed is
Measures have been taken to alleviate the non-uniformity of the thickness by providing dummy patterns 7.8 on the outer periphery of the substrate, and to improve the pressing method.

すなわち第2図に示す積層金型2を熱板で挟んで加熱圧
縮する際に積層金型2とプレスとの間に置くクッション
材を加工して凸状の断面をもつようにし、基板1の中央
部から優先的に加圧することにより、プリプレグの樹脂
の流れが中心部から周辺部に向かって均等になるように
し、これにより多層基板中のボイドの減少と板厚の均一
化が図られている。
That is, when the laminated mold 2 shown in FIG. 2 is sandwiched between hot plates and heated and compressed, the cushioning material placed between the laminated mold 2 and the press is processed to have a convex cross section, and the substrate 1 is heated and compressed. By applying pressure preferentially from the center, the prepreg resin flows evenly from the center to the periphery, thereby reducing voids in the multilayer board and making the board thickness more uniform. There is.

然し、第3図のような額縁状のダミーバクン7ではこの
内側にボイドが残留し易(、これが内側に拡散して製品
・ナイズ6の中に入る恐れがあり、また第4図の場合は
製品サイズ6の外周部の板厚均一性が充分でないと云う
問題がある。
However, in the frame-shaped dummy bag 7 as shown in Figure 3, voids tend to remain inside (there is a risk that these will diffuse inside and enter the product/nize 6, and in the case of Figure 4, the product There is a problem that the uniformity of the thickness of the outer peripheral portion of size 6 is not sufficient.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

以上記したように複数の中間層基材をプリプレグを介し
て加熱圧縮して多層基板を形成するには板厚分布が均等
であり、またボイドを含まぬことが必要であるが従来の
方法では充分な効果を示していない。
As mentioned above, in order to form a multilayer board by heating and compressing multiple intermediate layer base materials via prepreg, it is necessary that the board thickness distribution be uniform and void-free, but conventional methods cannot It has not shown sufficient effect.

〔問題点を解決するための手段〕[Means for solving problems]

上記の問題点はパターン形成の終わった車体基板をプリ
プレグと交互に積層し位置合わせした後、加圧成形して
一体化する際、半導体装置のり−ドピンを装着するラン
ドと同形状の複数個のパターンを予め製品サイズの外周
部に規則正しく配列して形成しておき、加圧成形するこ
とを特徴とする多層プリント板の製造方法により解決す
ることができる。
The above problem is that when the patterned car body substrate is alternately laminated with the prepreg and aligned, and then pressure-formed and integrated, multiple lands with the same shape as the lands on which the semiconductor device adhesive pins are attached are formed. This problem can be solved by a method for manufacturing a multilayer printed board, which is characterized in that patterns are formed in advance in regular arrangements on the outer periphery of the product size, and then pressure molded.

〔作用〕[Effect]

本発明は多層基板を構成する基板のうち、最上部の基板
には半導体装置のリードピン或いは部品のリード線を挿
入するスルーホールを備えたランドが存在し、また内部
の基板には各層間の配線接袂を行うスルーボールを備え
たランドが数多くパターン形成されている。
In the present invention, among the boards constituting a multilayer board, the top board has a land with a through hole into which the lead pin of a semiconductor device or the lead wire of a component is inserted, and the internal board has wiring between each layer. A large number of lands are patterned with through balls that are used to connect.

これらのパターンはアートワークフィルムで基板上に形
成されているが、本発明はこのランドを基板の製品サイ
ズ6の外周部に額縁状にパターン形成してダミーバタン
とするもので、微少なランドが基板上に故多くパターン
形成されているため、板厚分布が良く、またランド間に
隙間があるために樹脂の流れが良く、従ってボイドがダ
ミーパターンの内側に残存するという問題を少なくする
ことができる。
These patterns are formed on the substrate using an artwork film, but in the present invention, this land is formed into a frame-like pattern on the outer periphery of the substrate of product size 6 to form a dummy button. Since many patterns are formed on the top, the plate thickness distribution is good, and since there are gaps between lands, resin flows well, so the problem of voids remaining inside the dummy pattern can be reduced. .

〔実施例〕〔Example〕

第1図は本発明を実施した基板の平面図であって、部品
装着が行われる表面基板には特に数多くのランド9がパ
ターン形成されており、また内部の基板も各層間を繋ぐ
スルーホール形成用として故多くのランド9が設けられ
ている。
FIG. 1 is a plan view of a board in which the present invention is implemented, and the front board on which components are mounted has a particularly large number of lands 9 patterned therein, and the internal board also has through holes formed to connect each layer. A large number of lands 9 are provided for this purpose.

本発明はこのランド9を製品サイズ6の外周部に同様な
アートワークフィルムで額縁状に形成してダミーバタン
10とするものである。
In the present invention, this land 9 is formed in the shape of a frame on the outer periphery of a product size 6 using a similar artwork film to form a dummy batten 10.

ここでダミーバタン10は一重でな(基板1の外縁部に
達するまで製品サイズ6の内側のパターン形成条件すな
わち2.5朋ピンチで形成すると効果的である。
Here, it is effective to form the dummy batten 10 in a single layer (with a pattern forming condition of inside the product size 6, that is, a 2.5 mm pinch) until it reaches the outer edge of the substrate 1.

このようにダミーバタン10を設けると板厚分布は均一
となり、またランド9の間の隙間を通って樹脂と共にガ
スが流れるので従来のようにボイドが残存する傾向がな
くなり、品質の向上が達成できる。
By providing the dummy batten 10 in this way, the plate thickness distribution becomes uniform, and since gas flows together with the resin through the gaps between the lands 9, there is no tendency for voids to remain as in the conventional case, and quality can be improved.

なお加圧成形して生じた多NM板は従来と同様に製品サ
イズの大きさに切断して完成される。
Note that the multi-NM plate produced by pressure molding is completed by cutting it into product size as in the past.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明の実施により、基板の板厚分
布は均等となり、またボイド含有の少ない多層基板の製
造が可能になる。
As explained above, by carrying out the present invention, the thickness distribution of the substrate becomes uniform, and it becomes possible to manufacture a multilayer substrate with less void content.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の詳細な説明する基板の平面図。 第2図は多層基板の製造法を説明する断面図。 第3図と第4図は従来の実施法を説明する基板の平面図
である。 図において、 lはプリント配線基板、2は積層金型、4はプリプレグ
、    6は製品サイズ、7.8.10はダミーバタ
ン、 9はランド、 である。 ¥−I呵 7)−八・7>
FIG. 1 is a plan view of a substrate explaining the present invention in detail. FIG. 2 is a cross-sectional view illustrating a method for manufacturing a multilayer board. FIGS. 3 and 4 are plan views of a substrate illustrating a conventional implementation method. In the figure, l is a printed wiring board, 2 is a laminated mold, 4 is a prepreg, 6 is a product size, 7, 8, 10 is a dummy button, and 9 is a land. ¥-I呵7)-8・7>

Claims (1)

【特許請求の範囲】[Claims] パターン形成の終わった単体基板をプリプレグと交互に
積層し位置合わせした後、加圧成形して一体化する際、
半導体装置のリードピンを装着するランドと同形状の複
数個のパターンを予め製品サイズの外周部に額縁状に配
列して形成しておき、加圧成形することを特徴とする多
層プリント板の製造方法。
After pattern-formed single substrates are laminated and aligned alternately with prepreg, when pressure molding is performed to integrate them,
A method for manufacturing a multilayer printed board, characterized in that a plurality of patterns having the same shape as lands on which lead pins of a semiconductor device are attached are arranged in advance in a frame shape on the outer periphery of a product size, and then pressure molded. .
JP59177761A 1984-08-27 1984-08-27 Manufacture of multilayer printed board Granted JPS6154938A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59177761A JPS6154938A (en) 1984-08-27 1984-08-27 Manufacture of multilayer printed board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59177761A JPS6154938A (en) 1984-08-27 1984-08-27 Manufacture of multilayer printed board

Publications (2)

Publication Number Publication Date
JPS6154938A true JPS6154938A (en) 1986-03-19
JPH0212751B2 JPH0212751B2 (en) 1990-03-26

Family

ID=16036665

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59177761A Granted JPS6154938A (en) 1984-08-27 1984-08-27 Manufacture of multilayer printed board

Country Status (1)

Country Link
JP (1) JPS6154938A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6248099A (en) * 1985-08-28 1987-03-02 富士通株式会社 Multilayer printed circuit board
JPS63205997A (en) * 1987-02-23 1988-08-25 日立化成工業株式会社 Manufacture of multilayer printed interconnection board
JPH01147896A (en) * 1987-12-03 1989-06-09 Aica Kogyo Co Ltd Manufacture of multilayer printed circuit board
JPH02234494A (en) * 1989-03-07 1990-09-17 Fujitsu Ltd Manufacture of copper plate-containing multilayered printed board
JPH03185793A (en) * 1989-12-14 1991-08-13 Nec Corp Manufacture of multilayer printed wiring board
JPH05145235A (en) * 1991-11-20 1993-06-11 Nippon Avionics Co Ltd Manufacture of multilayered printed board and laminated board
US5509396A (en) * 1993-04-12 1996-04-23 Hitachi, Ltd. And Hitachi Automotive Engineering Co., Ltd. Throttle valve actuating apparatus for use in internal combustion engine

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6248099A (en) * 1985-08-28 1987-03-02 富士通株式会社 Multilayer printed circuit board
JPS63205997A (en) * 1987-02-23 1988-08-25 日立化成工業株式会社 Manufacture of multilayer printed interconnection board
JPH01147896A (en) * 1987-12-03 1989-06-09 Aica Kogyo Co Ltd Manufacture of multilayer printed circuit board
JPH02234494A (en) * 1989-03-07 1990-09-17 Fujitsu Ltd Manufacture of copper plate-containing multilayered printed board
JPH03185793A (en) * 1989-12-14 1991-08-13 Nec Corp Manufacture of multilayer printed wiring board
JPH05145235A (en) * 1991-11-20 1993-06-11 Nippon Avionics Co Ltd Manufacture of multilayered printed board and laminated board
US5509396A (en) * 1993-04-12 1996-04-23 Hitachi, Ltd. And Hitachi Automotive Engineering Co., Ltd. Throttle valve actuating apparatus for use in internal combustion engine

Also Published As

Publication number Publication date
JPH0212751B2 (en) 1990-03-26

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