JPS6117151A - Plasma cvd device - Google Patents
Plasma cvd deviceInfo
- Publication number
- JPS6117151A JPS6117151A JP13833284A JP13833284A JPS6117151A JP S6117151 A JPS6117151 A JP S6117151A JP 13833284 A JP13833284 A JP 13833284A JP 13833284 A JP13833284 A JP 13833284A JP S6117151 A JPS6117151 A JP S6117151A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- electrode
- gas
- cylindrical
- exhaust
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/4412—Details relating to the exhausts, e.g. pumps, filters, scrubbers, particle traps
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/50—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Materials Engineering (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Plasma & Fusion (AREA)
- Physics & Mathematics (AREA)
- Photoreceptors In Electrophotography (AREA)
- Physical Or Chemical Processes And Apparatus (AREA)
- Chemical Vapour Deposition (AREA)
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は、円筒状基板上に放膜するためのプラズマＣＶ
Ｄ装置に関する。DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a plasma CV method for depositing a film on a cylindrical substrate.
Regarding D device.
（従来技術）
プラズマＣＶＤ技術は、薄膜を比較的低温で成長できる
ことを特長とする成膜技術である。プラズマＣＶＤ技術
において、たと〜えば高周波放戴により反応ガスを放電
プラズマ状態におくことにより、反応ガスの化学結合は
低温で分解され、活性化された粒子が作り出され、そし
て、この活性化された粒子間の反応により、ＣＶＤ膜が
形成される。(Prior Art) Plasma CVD technology is a film forming technology characterized by being able to grow thin films at relatively low temperatures. In plasma CVD technology, by placing a reactive gas in a discharge plasma state, for example, by high-frequency radiation, the chemical bonds of the reactive gas are decomposed at a low temperature, and activated particles are created. A CVD film is formed by the reaction between the particles.
プラズマＣＶＤ膜の性質は、多数の因子に影響を受ける
。この因子には、生成温度、生成ガス比、生成圧力、電
極構造、反応容器構造、排気速度、生成ＲＦパワー、Ｒ
Ｆ周波数、プラズマ発生方式等がある。したがって、プ
ラズマＣＶＤ膜の成膜のためには、多くの因子を制御せ
ねばならない。The properties of plasma CVD films are influenced by numerous factors. These factors include production temperature, production gas ratio, production pressure, electrode structure, reaction vessel structure, pumping speed, production RF power, and R
There are F frequency, plasma generation method, etc. Therefore, many factors must be controlled in order to form a plasma CVD film.
プラズマＣＶＤ技術は、種々の物質の成膜に利用されて
いて、たとえば非晶質シリコン（ａ−８ｉ）を成膜する
こともできる。ａ−８ｉは、電子写真用感光体としても
適している。電子写真用感光体として使用する場合、ａ
−８ｉ膜は、大面積の円筒状基板上に、比較的厚く（２
０〜５０μｍ）、且つ、均一に成膜されねばならない。Plasma CVD technology is used to form films of various substances, and can also form films of amorphous silicon (a-8i), for example. a-8i is also suitable as an electrophotographic photoreceptor. When used as an electrophotographic photoreceptor, a
-8i film is relatively thick (2
0 to 50 μm) and must be formed uniformly.
第５図は、従来のａ−８ｉ用プラズマＣＶＤ装置の一例
を図式的に示す。アルミニウム円筒からなる基板１は、
その軸の周りに回転可能に、円筒状の電極２の内部に設
けられる。電極２は、この基板１と軸を共通に配置され
た二枚の円筒板２ａ、 ２ｂからなり、ガス室３かこの
二枚の円筒板２ａ、 ２ｂにより区画される。外側の円
筒板２ａには、図示しないガス供給装置から原料ガスを
導入するための導入口４が設けられ、一方、内側の円筒
板？１）には、この円筒板２ｂの内部の空間（放電領域
）に原料ガスを導入するための図示しない多数の小さな
供給口が設けられる。チャンバー（真空槽）５は、電極
２、上部５ａ、下部５ｂとからなり、上部５ａと下部５
ｂとは、電極２に対して絶縁されている。FIG. 5 schematically shows an example of a conventional plasma CVD apparatus for A-8I. The substrate 1 made of an aluminum cylinder is
It is provided inside the cylindrical electrode 2 so as to be rotatable around its axis. The electrode 2 is composed of two cylindrical plates 2a and 2b that share the same axis as the substrate 1, and the gas chamber 3 is defined by these two cylindrical plates 2a and 2b. The outer cylindrical plate 2a is provided with an inlet 4 for introducing raw material gas from a gas supply device (not shown), while the inner cylindrical plate 2a is provided with an inlet 4 for introducing raw material gas from a gas supply device (not shown). 1) is provided with a large number of small supply ports (not shown) for introducing raw material gas into the internal space (discharge area) of this cylindrical plate 2b. The chamber (vacuum chamber) 5 consists of an electrode 2, an upper part 5a, and a lower part 5b.
b is insulated from the electrode 2.
チャンバー５内に上記の供給口から導入されるガスは、
チャンバー５の下部か呟排気口６を介して真空ポンプ７
により排気される。ＲＦ電源８は、導入口４を介して電
極２に接続され、一方、基板１は、接地される。図示し
ないか、ヒーターは、それぞれ、基板１と電極２に取り
付けられ、ヒーター用電源に接続される。The gas introduced into the chamber 5 from the above supply port is
A vacuum pump 7 is connected to the bottom of the chamber 5 through an exhaust port 6.
Exhausted by. RF power source 8 is connected to electrode 2 via inlet 4, while substrate 1 is grounded. Heaters (not shown) are attached to the substrate 1 and electrode 2, respectively, and connected to a heater power source.
プラズマＣＶＤによるａ−８ｉの成膜は、次のように行
われる。パッシェン則か呟自続放電開始報参照）では、
排気口６は、−個所のみに、通常は真空槽の下端部に設
けられている。このため、基板１と電極２との開め放電
領域にあるガスは、排気口６に近い側からは流れ出てい
くが、一方、排気口に遠い側からは流れ出にくく、基板
１の排気口から遠い側の端部近傍において（第５図と第
６図とにおいて、Ｐで示す。）、ガスの滞留が生しやす
い。また、基板１と電極２との端部には、その構造のた
め、不均一電界による放電の集中部が生じる。このガス
の滞留は、放電の集中と相まって、ガス滞留部Ｐの近傍
で、（ＳｉＨ２）ｎの微粉を発生させやすく、また、放
電集中部では膜を剥離させやすい。発生した剥離片や微
粉は、基板１と電極２との間の放電領域中のガスの流れ
にのり、基板１上の膜中に取り込まれ、膜質を悪化させ
、このため、たとえば、電子写真における白斑点ノイズ
の原因となる。 また、特開昭５８−５２６５０号公
報の第４図に示されるプラズマＣＶＤ装置においては、
排気口は、基板の上下端から大略等しい位置に設けられ
ている。また、特開昭５９−７０７６０号公報に開示さ
れたプラズマＣＶＤ装置においては、同じく基板の上下
端がら大略等しい位置に二つの排気口が設けられている
。しがしなが呟後者の装置の電極は、ガス導入用のガス
室とガス排気口とからなる複雑な構造を備えており、電
極の製作が困難となる難点がある。A-8i film formation by plasma CVD is performed as follows. (Refer to Paschen's law or the start of a self-sustaining discharge).
The exhaust port 6 is provided only at the - location, usually at the lower end of the vacuum chamber. Therefore, the gas in the open discharge area between the substrate 1 and the electrode 2 flows out from the side near the exhaust port 6, but on the other hand, it is difficult to flow out from the side far from the exhaust port, and from the exhaust port of the substrate 1. Gas tends to stagnate near the far end (indicated by P in FIGS. 5 and 6). Moreover, due to the structure, a discharge concentration area occurs at the end of the substrate 1 and the electrode 2 due to a non-uniform electric field. This gas retention, combined with the concentration of discharge, tends to generate fine powder of (SiH2)n near the gas retention part P, and also tends to cause the film to peel off in the discharge concentration part. The generated flakes and fine powder are carried by the gas flow in the discharge region between the substrate 1 and the electrode 2, and are taken into the film on the substrate 1, deteriorating the film quality. This causes white spot noise. Furthermore, in the plasma CVD apparatus shown in FIG. 4 of Japanese Patent Application Laid-open No. 58-52650,
The exhaust ports are provided at approximately equal positions from the upper and lower ends of the substrate. Furthermore, in the plasma CVD apparatus disclosed in Japanese Unexamined Patent Publication No. 59-70760, two exhaust ports are similarly provided at approximately equal positions on the upper and lower ends of the substrate. The electrodes of the latter device have a complicated structure consisting of a gas chamber for introducing gas and a gas exhaust port, making it difficult to manufacture the electrodes.
本発明の目的は、プラズマＣＶ Ｄ装置において、円筒
状基板の端部の近傍での力スの滞留をなくし、微粉の発
生を抑制するとともに、放電の集中部で膜の剥離が生じ
たとしても、膜剥離片をすみやかに放電領域から排出す
ることにより、膜質の悪化を防止することである。The purpose of the present invention is to eliminate the accumulation of force near the edge of a cylindrical substrate in a plasma CVD apparatus, to suppress the generation of fine powder, and to eliminate the possibility of film peeling in areas where discharge is concentrated. The purpose is to prevent deterioration of film quality by promptly discharging film peeling pieces from the discharge area.
本発明は、上記の従来例とは異った構成でこの目的を達
成する。The present invention achieves this objective with a configuration different from the conventional example described above.
（問題点を解決するための手段）
本発明に係るプラズマＣＶ Ｄ装置は、真空槽内に、両
端が開口した円筒状電極とその内部に軸を共通にして回
転可能に設けた円筒状の基板とを配置し、電極の内周面
に設けた多数の開口から原料ガスを放出し、対向する基
板上に成膜するプラズマＣＶＤ装置において、上記の円
筒状電極の両端開口の近傍にそれぞれ真空槽からの排気
口を設けたことを特徴とする。(Means for Solving the Problems) A plasma CVD apparatus according to the present invention includes a cylindrical electrode with both ends open and a cylindrical substrate rotatably provided inside the electrode with a common axis in a vacuum chamber. In a plasma CVD apparatus that discharges raw material gas from a number of openings provided on the inner circumferential surface of the electrode and forms a film on an opposing substrate, a vacuum chamber is installed near the openings at both ends of the cylindrical electrode. It is characterized by having an exhaust port from.
（作用）
基板と電極との両端近傍にそれぞれ排出口を設けたこと
により、ガスの滞留部がなくなり、ガスは、放電領域か
ら両端方向へ流れる。このため、微粉や剥離片は、基板
上の膜にとりこまれることがない。(Function) By providing exhaust ports near both ends of the substrate and the electrode, there is no gas retention area, and the gas flows from the discharge region toward both ends. Therefore, fine powder and peeled pieces are not incorporated into the film on the substrate.
（実施例）
以下、添付の図面を参照して、本発明の詳細な説明する
。(Example) Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.
第１図に示す第一の実施例は、２個の排気口を設けたこ
と以外は、第５図に示した例と同じである。第一の排気
口６は、円筒状基板１とこれと軸を共通に配置した円筒
状電極２との両者の下端部の下側に設けられ、一方、第
二の排気口６゛は、上端部の上側に設けられる。各排気
口６，６゛は、それぞれ、排気調節弁９，９゛を介して
共通の真空ポンプ７に接続されている。ガスは、第１図
において矢印で示すように、導入口４からガス室３を経
て均一に混合拡散した後、電極２と基板１との間の放電
領域に吹き付けられ、次いで、上下の端部からそれぞれ
排出口６，６゛を経て排気される。The first embodiment shown in FIG. 1 is the same as the example shown in FIG. 5 except that two exhaust ports are provided. The first exhaust port 6 is provided below the lower end of both the cylindrical substrate 1 and the cylindrical electrode 2 having a common axis therewith, while the second exhaust port 6 is provided at the upper end. provided on the upper side of the section. Each exhaust port 6, 6' is connected to a common vacuum pump 7 via an exhaust control valve 9, 9', respectively. As shown by the arrows in FIG. 1, the gas is uniformly mixed and diffused from the inlet 4 through the gas chamber 3, and then blown onto the discharge area between the electrode 2 and the substrate 1, and then at the upper and lower ends. The air is exhausted from the air through exhaust ports 6 and 6, respectively.
排気調節バルブ９，９゛は、排気の流量を調整する。The exhaust control valves 9, 9' adjust the flow rate of exhaust gas.
第５図に示した従来の装置の場合と異なり、チャンバー
５の上端部でのガスの滞留はなくなり、微粉は発生しな
くなる。また、放電集中部で生じるａ Ｓｉ膜の剥離
片は、ガスの流れにのり、放電領域の外へ運ばれる。こ
うして、膜質異常の発生は防止できる。Unlike the conventional apparatus shown in FIG. 5, there is no accumulation of gas at the upper end of the chamber 5, and no fine powder is generated. Further, peeled pieces of the a Si film generated in the discharge concentrated area are carried by the gas flow to the outside of the discharge area. In this way, the occurrence of membrane quality abnormalities can be prevented.
第２図に示す第二の実施例は、２個の排気口を設けたこ
と以外は、第６図に示した例と同じである。第一の排気
口６は、円筒状基板１とこれと軸を共通に配置した円筒
状電極２との両者の下端部の下側に設けられ、一方、第
二の排気口６゛は、上端部の上側に設けられる。排気口
６は、排気調節弁９を介して、真空ポンプ７に接続され
、一方、排気口６゛は、排気調節弁９゛を介して、別の
真空ポンプ７゛に接続される。第２図において、ガスは
、矢印で示されるように流れ、ガスの滞留は生じない。The second embodiment shown in FIG. 2 is the same as the example shown in FIG. 6 except that two exhaust ports are provided. The first exhaust port 6 is provided below the lower end of both the cylindrical substrate 1 and the cylindrical electrode 2 having a common axis therewith, while the second exhaust port 6 is provided at the upper end. provided on the upper side of the section. The exhaust port 6 is connected to a vacuum pump 7 via an exhaust control valve 9, while the exhaust port 6' is connected to another vacuum pump 7' via an exhaust control valve 9'. In FIG. 2, gas flows as indicated by the arrows and no gas stagnation occurs.
第３図に示す第三の実施例は、第１図に示した第一の実
施例において、基板１と電極２とを水平に配置したこと
に相当する。一方の排気口６は、円筒状の基板１と電極
２の両者の右端部の下側近傍に設けられ、他方の排気口
６゛は、これと対称的に、左端部の下側近傍に設けられ
る。図示しないが、排気口６，６゛は、それぞれ、排気
調節弁を介して真空ポンプに接続される。第３図におい
て、ガスは、矢印で示されるように流れ、ガスの滞留は
生しない。The third embodiment shown in FIG. 3 corresponds to the first embodiment shown in FIG. 1 in which the substrate 1 and the electrode 2 are arranged horizontally. One exhaust port 6 is provided near the bottom of the right end of both the cylindrical substrate 1 and the electrode 2, and the other exhaust port 6 is symmetrically provided near the bottom of the left end. It will be done. Although not shown, the exhaust ports 6 and 6' are each connected to a vacuum pump via an exhaust control valve. In FIG. 3, gas flows as indicated by the arrows and no gas stagnation occurs.
第４図に示す第四の実施例は、第２図に示した第二の実
施例において、基板１と電極２とを水平に配置したこと
に相当する。一方の排気口６は、円筒状の基板１と電極
２の両者の右端部の下側近傍に設けられ、他方の排気口
６゛は、これと対称的に、左端部の下側近傍に設けられ
る。図示しないが、排気口６，６゛は、それぞれ、排気
調節弁を介して真空ポンプに接続される。第４図におい
て、ガスは、矢印で示されるように流れ、ガスの滞留は
生巳ない。The fourth embodiment shown in FIG. 4 corresponds to the second embodiment shown in FIG. 2 in which the substrate 1 and the electrode 2 are arranged horizontally. One exhaust port 6 is provided near the bottom of the right end of both the cylindrical substrate 1 and the electrode 2, and the other exhaust port 6 is symmetrically provided near the bottom of the left end. It will be done. Although not shown, the exhaust ports 6 and 6' are each connected to a vacuum pump via an exhaust control valve. In FIG. 4, the gas flows as shown by the arrow, and there is no stagnation of gas at all.
（発明の効果）
円筒状基板の端部近傍でのガスの滞留はなくなる。この
ため、微粉の発生が防止でとる。(Effects of the Invention) Gas stagnation near the end of the cylindrical substrate is eliminated. This prevents the generation of fine powder.
放電の集中により生じる膜の剥離片は、ガスの流れにの
って運ばれるので、基板上の膜にはとりこまれない。Peeled off pieces of the film caused by the concentration of discharge are carried along with the gas flow and are not incorporated into the film on the substrate.
この結果、基板上の膜の両端での成膜性が向上する。As a result, the film formation properties at both ends of the film on the substrate are improved.
【図面の簡単な説明】
第１図から第４図までは、それぞれ、本発明の実施例の
図式的な断面図である。
第５図と第６図とは、それぞれ、従来のプラズマＣＶＤ
装置の図式的な断面図である。
１・・・円筒状基板、 ２・・・円筒状電極、３
・・・ガス室、 ４・・・導入口、５・・・
チャンバー、 ６，６゛・・・排気口、７．７゛
・・・真空ポンプ、 訃・・ＲＦ電源。
第３因
６′
第４図
第５図BRIEF DESCRIPTION OF THE DRAWINGS FIGS. 1 to 4 are schematic cross-sectional views of embodiments of the invention. Figures 5 and 6 respectively show conventional plasma CVD
FIG. 2 is a schematic cross-sectional view of the device. 1... Cylindrical substrate, 2... Cylindrical electrode, 3
...Gas chamber, 4...Inlet, 5...
Chamber, 6,6゛...Exhaust port, 7.7゛...Vacuum pump, End...RF power supply. Third cause 6' Figure 4 Figure 5
Claims (1)
部に軸を共通にして回転可能に設けた円筒状の基板とを
配置し、電極の内周面に設けた多数の開口から原料ガス
を放出し、対向する基板上に成膜するプラズマＣＶＤ装
置において、上記の円筒状電極の両端開口の近傍に、そ
れぞれ真空槽からの排気口を設けたことを特徴とするプ
ラズマＣＶＤ装置。(1) A cylindrical electrode with open ends at both ends and a cylindrical substrate rotatably provided inside the electrode with a common axis are arranged in a vacuum chamber, and a large number of openings provided on the inner peripheral surface of the electrode are placed. A plasma CVD apparatus for emitting source gas to form a film on an opposing substrate, characterized in that exhaust ports from a vacuum chamber are provided near openings at both ends of the cylindrical electrode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13833284A JPS6117151A (en) | 1984-07-03 | 1984-07-03 | Plasma cvd device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13833284A JPS6117151A (en) | 1984-07-03 | 1984-07-03 | Plasma cvd device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6117151A true JPS6117151A (en) | 1986-01-25 |
Family
ID=15219428
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13833284A Pending JPS6117151A (en) | 1984-07-03 | 1984-07-03 | Plasma cvd device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6117151A (en) |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4839145A (en) * | 1986-08-27 | 1989-06-13 | Massachusetts Institute Of Technology | Chemical vapor deposition reactor |
| US6312526B1 (en) * | 1999-06-03 | 2001-11-06 | Mitsubishi Denki Kabushiki Kaisha | Chemical vapor deposition apparatus and a method of manufacturing a semiconductor device |
| WO2002084709A2 (en) * | 2001-04-10 | 2002-10-24 | Supercritical Systems Inc. | High pressure processing chamber for semiconductor substrate including flow enhancing features |
| WO2009031520A1 (en) * | 2007-09-04 | 2009-03-12 | Sharp Kabushiki Kaisha | Plasma treatment apparatus, plasma treatment method, and semiconductor element |
| US20120240348A1 (en) * | 2002-03-28 | 2012-09-27 | Kazuyuki Okuda | Substrate processing apparatus |
| US20160047046A1 (en) * | 2014-08-13 | 2016-02-18 | Kabushiki Kaisha Toshiba | Semiconductor manufacturing apparatus and manufacturing method of semiconductor device |
| WO2018039578A1 (en) * | 2016-08-26 | 2018-03-01 | Applied Materials, Inc. | Low pressure lift pin cavity hardware |
| US10422035B2 (en) * | 2012-12-18 | 2019-09-24 | Tokyo Electron Limited | Thin film forming method and thin film forming appartus |
-
1984
- 1984-07-03 JP JP13833284A patent/JPS6117151A/en active Pending
Cited By (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4839145A (en) * | 1986-08-27 | 1989-06-13 | Massachusetts Institute Of Technology | Chemical vapor deposition reactor |
| US6312526B1 (en) * | 1999-06-03 | 2001-11-06 | Mitsubishi Denki Kabushiki Kaisha | Chemical vapor deposition apparatus and a method of manufacturing a semiconductor device |
| US6638880B2 (en) | 1999-06-03 | 2003-10-28 | Mitsubishi Denki Kabushiki Kaisha | Chemical vapor deposition apparatus and a method of manufacturing a semiconductor device |
| WO2002084709A3 (en) * | 2001-04-10 | 2012-02-16 | Supercritical Systems Inc. | High pressure processing chamber for semiconductor substrate including flow enhancing features |
| WO2002084709A2 (en) * | 2001-04-10 | 2002-10-24 | Supercritical Systems Inc. | High pressure processing chamber for semiconductor substrate including flow enhancing features |
| US8366868B2 (en) * | 2002-03-28 | 2013-02-05 | Hitachi Kokusai Electric Inc. | Substrate processing apparatus |
| US20120240348A1 (en) * | 2002-03-28 | 2012-09-27 | Kazuyuki Okuda | Substrate processing apparatus |
| EP2202785A4 (en) * | 2007-09-04 | 2010-11-10 | Sharp Kk | Plasma treatment apparatus, plasma treatment method, and semiconductor element |
| EP2202785A1 (en) * | 2007-09-04 | 2010-06-30 | Sharp Kabushiki Kaisha | Plasma treatment apparatus, plasma treatment method, and semiconductor element |
| WO2009031520A1 (en) * | 2007-09-04 | 2009-03-12 | Sharp Kabushiki Kaisha | Plasma treatment apparatus, plasma treatment method, and semiconductor element |
| US8395250B2 (en) | 2007-09-04 | 2013-03-12 | Kabushiki Kaisha Sharp | Plasma processing apparatus with an exhaust port above the substrate |
| US10422035B2 (en) * | 2012-12-18 | 2019-09-24 | Tokyo Electron Limited | Thin film forming method and thin film forming appartus |
| US20160047046A1 (en) * | 2014-08-13 | 2016-02-18 | Kabushiki Kaisha Toshiba | Semiconductor manufacturing apparatus and manufacturing method of semiconductor device |
| US9920425B2 (en) * | 2014-08-13 | 2018-03-20 | Toshiba Memory Corporation | Semiconductor manufacturing apparatus and manufacturing method of semiconductor device |
| WO2018039578A1 (en) * | 2016-08-26 | 2018-03-01 | Applied Materials, Inc. | Low pressure lift pin cavity hardware |
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