JPS61132090A - Speed controller for motor - Google Patents
Speed controller for motorInfo
- Publication number
- JPS61132090A JPS61132090A JP59254481A JP25448184A JPS61132090A JP S61132090 A JPS61132090 A JP S61132090A JP 59254481 A JP59254481 A JP 59254481A JP 25448184 A JP25448184 A JP 25448184A JP S61132090 A JPS61132090 A JP S61132090A
- Authority
- JP
- Japan
- Prior art keywords
- speed
- delay
- speed control
- compensator
- compensation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P23/00—Arrangements or methods for the control of AC motors characterised by a control method other than vector control
- H02P23/20—Controlling the acceleration or deceleration
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Control Of Electric Motors In General (AREA)
- Control Of Ac Motors In General (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は電動機の速度制御装置に係わり、特にディジタ
ル処理方式の速度制御装置1:関する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a speed control device for an electric motor, and more particularly to a speed control device 1 using a digital processing method.
従来の技術
一般に、電動機の速度制御には電動機の速度検出値と設
定値とを比較するフィートノ(ツク制御が多く採用され
、高精度の速度制御にニデイジタル処理による速度制御
装置が採用される。このデイジタル処理方式では!@機
の速度・検出にパルスピックアップ等のディジタル式速
度検出器が採用され、このディジタル量の速度検出値は
マイクロコンピュータ等のディジタル処理装置に取込ま
れて速度設定値との比較さらには速度演算処理されて電
動機の速度側(至)データとして取出される。Conventional technology In general, electric motor speed control is often performed using foot control, which compares a motor speed detection value with a set value, and a speed control device that uses two-digital processing is used for high-precision speed control. In the digital processing method, a digital speed detector such as a pulse pickup is used to detect the speed of the machine, and this digital speed detection value is taken into a digital processing device such as a microcomputer and compared with the speed setting value. Comparison and further speed calculation processing are performed and the data is taken out as speed side data of the electric motor.
例えば、パルスピックアップに電動機の回転速[+=比
例した間隔のパルスを出力し、このパルス間隔をカウン
タのクロック計数期間として該カウンタの計数値を速度
検出値としてディジタル処理装置に取込ませ、ディジタ
ル処理装置でに、速度検出値と速度設定碩との偏差を求
め、この偏差をアナログ式速度制#糟幅器と同等の比例
積分(PI)演算して速度制御データを得る。また、速
度制御データは電動機の各種制御方式に従って必要な演
算処理がなされ、最終的には電動機の電源になるインバ
ータ、順変換器等の電力変換器の制御信号として取出さ
れる。For example, output pulses at intervals proportional to the motor's rotational speed [+== to the pulse pickup, use this pulse interval as the clock counting period of a counter, input the counted value of the counter as a speed detection value into a digital processing device, and input it into a digital processing device. The processing device calculates the deviation between the detected speed value and the speed setting value, and calculates this deviation using proportional integral (PI) calculation, which is equivalent to an analog speed limiter, to obtain speed control data. Further, the speed control data is subjected to necessary arithmetic processing according to various control methods for the electric motor, and is finally taken out as a control signal for a power converter such as an inverter or forward converter that serves as a power source for the electric motor.
発明が解決しょうとする問題点
ディジタル処理方式の速度制御i&li[tハ、アナロ
グ処理力式のものべ=較べて高精度制御を容易にするが
、速度検出やPI演算がサンプリング処理になるため、
サンプリング時間の遅れが電動機の制御遅れの原因にな
ることがある。例えば、高速応答性を持たせるサイリス
タレオナード方式の直流機速度制御や誘導機のベクトル
制御、特に高速域の加減速時(ニサンプリング時間の遅
れで設定通りの加減速度、トルクを得ることができない
ことが起きる。Problems to be Solved by the Invention Digital processing type speed control facilitates high-precision control compared to analog processing type, but since speed detection and PI calculation are sampling processes,
Delays in sampling time may cause motor control delays. For example, thyristor Leonard type DC machine speed control that provides high-speed response and vector control of induction machines, especially when accelerating and decelerating in the high-speed range (the acceleration/deceleration and torque as set cannot be obtained due to the delay in sampling time) happens.
具体的には、誘導機のベクトル制御でハ、トルクとすべ
り周波数を比例する工うに制御するが、定格トルクで加
速したときに誘導機が0.2秒で定格回−数に達するも
のとすると、速度検出のサンプリング時間がlQm 3
6 Cとするとサンプリング時間内に上昇する速度に5
チに0.0110.2X100)もあり、このサンプリ
ング時間の遅れ分が適切廖丁べり単波数制御を難しくす
る。Specifically, vector control of the induction motor is used to control the torque and slip frequency in a proportional manner, but suppose that the induction motor reaches the rated number of cycles in 0.2 seconds when accelerating at the rated torque. , the sampling time for speed detection is lQm 3
6C, the rate of increase within the sampling time is 5
0.0110.2×100), and this delay in sampling time makes it difficult to properly control the single wave number.
問題点を解決するための手段と作用
本発明は、ディジタル処理方式の電動機の速度制御装置
(;おいて、速度検出値又は速度制御データの少なくと
も一方にサンプリング時間等の遅れを補償するM fA
回路を設け、この補償回路は速度検出値又は速度制御デ
ータになる入力と、この入力の11¥を微分係数(−遅
れ補償時間を乗算した頃と、該入力の2噌ば分係数に遅
れ補貫時間の二乗の力を乗算した値とを加算する構成に
し、サンプリング処理等にぶる速度制御遅れを楡償した
速度制御動作を達成するものである。Means and Effects for Solving the Problems The present invention provides an MfA system for compensating for delays such as sampling time in at least one of the speed detection value or the speed control data in a digital processing type motor speed control device (;
A circuit is provided, and this compensation circuit takes an input that becomes the speed detection value or speed control data, and divides 11 yen of this input into a differential coefficient (-delay compensation time), and calculates the delay compensation coefficient by 2 yen of the input. This is configured to add the value obtained by multiplying the force of the square of the penetration time, thereby achieving a speed control operation that compensates for speed control delays caused by sampling processing and the like.
実施例
第1図は本発明の一実施例を示すブロック図である。速
度検出回路1は従来のパルスピックアップとカウンタを
具えるディジタル式速度検出器と同じもの、好ましくは
特開昭59−38661号公報に開示されるように、パ
ルスピックアップの ′出力パルス間隔の大小;ユリ
じて定める数のパルス期間をサンプリング時間とし、該
サンプリング時間内のクロックパルス数から′11.動
機の速度検出1直を求めること(−二って、可変速範囲
全域に亘って速度検出1直及び応答時間をほぼ一定にす
る速度検出器にされる。Embodiment FIG. 1 is a block diagram showing an embodiment of the present invention. The speed detection circuit 1 is the same as a conventional digital speed detector comprising a pulse pickup and a counter, preferably as disclosed in Japanese Patent Application Laid-Open No. 59-38661. The sampling time is a number of pulse periods determined in advance, and '11.' is calculated from the number of clock pulses within the sampling time. Determining the speed detection cycle of the motive (-2) The speed detector is made to have a speed detection cycle and response time that are approximately constant over the entire variable speed range.
補償回路2は速度検出回路lの仕方になる速度検出値を
入力とし、該速度検出回路lのサンプリング処理による
速度検出遅れを補償する。この補償回路2にはその補償
処理を解除させるためのバイパススイッチ3が設けられ
る。加算器4は電動機の速度設定器5の設定値と速度検
出回路1からの速度検出値との差を演算する。速度制御
演算部6は加算器4の出力からサンプリング処理(ユニ
って比例積分演算をして速度制御データを得る。この速
度制御データはベクトル制御ではトルク電流必
の演算にLつて誘導機のすべり角周波数ωSが求められ
る。なお、τ2は誘導機の等価二次インダクタ・x L
2と二次抵抗・2の比L2/・ である。The compensation circuit 2 inputs the speed detection value determined by the speed detection circuit 1, and compensates for the speed detection delay due to the sampling process of the speed detection circuit 1. This compensation circuit 2 is provided with a bypass switch 3 for canceling the compensation process. The adder 4 calculates the difference between the set value of the motor speed setter 5 and the speed detected value from the speed detection circuit 1. The speed control calculation unit 6 performs sampling processing (proportional integral calculation) from the output of the adder 4 to obtain speed control data.In vector control, this speed control data is used for calculations that require torque current, and the slip of the induction machine. The angular frequency ωS is found. Note that τ2 is the equivalent secondary inductor of the induction machine x L
2 and the secondary resistance 2 is the ratio L2/.
加算器8にすべり周波数演算回路7からのすべり周波数
ωSと補償回路2又はバイパススイッチ3を介した速度
検出値ω、とを加算して後述のインバータの周波数指令
ω。を得る。三角関数発生器9セ加算器8からの周波数
指令ω。の角周波数を持つ正弦波ωO「、 と余弦波C
o3ωot の出力を、※
電流指令11aと三角関数発生器9からの正弦波。The adder 8 adds the slip frequency ωS from the slip frequency calculation circuit 7 and the speed detection value ω via the compensation circuit 2 or the bypass switch 3 to obtain an inverter frequency command ω, which will be described later. get. Frequency command ω from trigonometric function generator 9 and adder 8. A sine wave ωO' with an angular frequency of , and a cosine wave C
The output of o3ωot is the sine wave from the current command 11a and the trigonometric function generator 9.
余弦波:二二つて二相−三相変換し、インバーター11
1に、電圧指令(:従って誘導機(ニー次電圧を供給す
る。速度比較部12は速度検出回路1の検出値が切換速
度設定器13の設定値以下)二なるときに、バイパスス
イッチ3をオン状態に切換えることで補償動作を解除す
る。この切換速度設定器13に例えば誘導機の基底速度
に設定される。Cosine wave: 2 phase to 3 phase conversion, inverter 11
1, the bypass switch 3 is activated when the voltage command (: therefore, the induction motor (supplies the secondary voltage). The compensation operation is canceled by switching to the on state.The switching speed setter 13 is set to, for example, the base speed of the induction machine.
こうした構成において、速度検出回路工の速度検出値に
、鋳感機が基底速度以上の高速度領域で運転されるとき
ににバイパススイッチ3がオフになり、補償口kI25
21ニエつてサンプリング処理による遅れの補償がなさ
れて速度制御の応答性が敗者される。In such a configuration, when the speed detection value of the speed detection circuitry indicates that the casting machine is operated at a high speed region higher than the base speed, the bypass switch 3 is turned off, and the compensation port kI25 is turned off.
21, the delay due to the sampling process is compensated for and the responsiveness of the speed control is improved.
この工うな抽「ハ回路2を付加した遅れ補償を第2図を
参照して説明する。速乾検出回路lの入力力kZ 2
d ニ% a f 1(t)で示す工うに加速されると
き、速度検出回路IHサンプリング周期T8を持ってサ
ンプリングタイミングT 、T 、Tn−2n
−In’
Tn+1でI1M次演葬をする。このサンプリングタイ
ミングTfL −2,Tn −1’ Tn 、Tn+
1で夫々求められる出力fo(t)ffサンプリング周
期T8及水演算の遅れを持って検出される。すなわち、
出力f o(t)の平均値に%注N′で示す二うに入力
f 、 (t)とは遅れ時間Tを持って検出される。Delay compensation with addition of this circuit 2 will be explained with reference to FIG.
When the speed detection circuit IH is accelerated to the speed shown by 1(t), the sampling timings T, T, Tn-2n have a sampling period T8.
-In'I1M's next funeral will be held at Tn+1. This sampling timing TfL -2, Tn -1' Tn, Tn+
1, the outputs fo(t)ff, respectively, are detected with a delay in the sampling period T8 and water calculation. That is,
The average value of the output f o (t) is indicated by % N', and the input f o (t) is detected with a delay time T.
この遅れ時間Tを補償するために、入力fi(t)を遅
れ補 1時間Tだけ進めた出力fo(t)とすること即
ちラプラス演算子を使って示せば次式になる二う補償回
路2で近似補償演算を行なう。In order to compensate for this delay time T, the input fi(t) is delayed and the output fo(t) is advanced by 1 time T. In other words, if shown using the Laplace operator, the following formula is obtained. Performs approximate compensation calculation.
J−(f o(t) =・8TL(f、(t))・・・
・・・・・・(1)(1)式中、LOHラプラス変換を
示し、fo(t)h補償回路2で補償した出力、fl(
t)i補償回路2の入力である。このα)式中、eST
をテーラ展開し時1団Tの二次までで近似すると
eSTキ1+ST+−!−15?−
2・・・・・・(2)
となり、実時間で表わせば次式の一工うになる。J-(f o(t) =・8TL(f,(t))...
......(1) In equation (1), LOH Laplace transform is shown, and the output compensated by fo(t)h compensation circuit 2, fl(
t) i This is the input of the compensation circuit 2. In this α) formula, eST
When expanded by Taylor and approximated by the quadratic of the group T, eSTki1+ST+-! -15? -2...(2), and if expressed in real time, the following equation will work.
・・・・・・・・・(3)
即ち、サンプリング遅れに=る抽膚には現在の入力f
1(t)とその1階微分係数/dt f、(t)に補償
(fi(t))に補償時間Tの二乗の /2を乗算した
喧を加算することでサンプリング遅れ補償ができる。・・・・・・・・・(3) In other words, the current input f is
The sampling delay can be compensated by adding the compensation (fi(t)) multiplied by /2 of the square of the compensation time T to (t) and its first derivative coefficient /dt.
この(3)式をサンプリング系の演算式で表わせば次式
になる。If this equation (3) is expressed as a sampling system arithmetic equation, it becomes the following equation.
(f 1(Tn−t)−f 1(Tl−2) ))・・
・・・・・・・(4)
第3図は補償回路2の実施例を示し、上記(4)式に基
づいて構成する場合である。第3図において、入力f・
(T )に対してサンプリング回M21t” n
ツチ回路212 によって1サンプル前の入力f i
(Tnl)を記憶しておき、さらにラッチ回路213
(二は2サンプル前の入力f 1 (Tn、 2)を記
憶しておき、このうち前回人力fl(Tnt)と今回の
入力fi(Tn)との差を加算器214で求め、前回入
力f 1(Tn−1)と前々回の入力fi(Tn 2
)との差を加算321sで求め、両顎算器214,21
、の夫々の演算結果の差を加算器21g 1艶、これ
::乗算器217に癌て係数T/2Tsを乗算すること
で(4)式め右辺@3項の演算をし、また加算器214
の演算結果(二乗算器218において係数T/T8を乗
算することで(4)式の右辺嘉2項の演算をし、これら
演′lK結果な加算器219,211.で夫々今回の入
力fi(Tn)に加算して捕虜した出力f o(Tn)
を得る。(f 1 (Tn-t) - f 1 (Tl-2) ))...
(4) FIG. 3 shows an embodiment of the compensation circuit 2, which is constructed based on the above equation (4). In Fig. 3, the input f・
(T), the sampling time M21t''n input f i
(Tnl), and further the latch circuit 213
(Secondly, the input f 1 (Tn, 2) from two samples ago is memorized, and the difference between the previous human input fl (Tnt) and the current input fi (Tn) is calculated by the adder 214, and the previous input f 1 (Tn-1) and the input fi (Tn 2
) and calculate the difference with addition 321s, and double-jawed calculator 214, 21
By multiplying the difference between the calculation results of each of , by the coefficient T/2Ts in the multiplier 217, the adder 21g calculates the third term on the right side of equation (4). 214
(by multiplying the coefficient T/T8 in the squaring multiplier 218, the second term on the right side of equation (4) is calculated, and the adders 219 and 211, which are the results of these operations, calculate the current input fi, respectively. (Tn) and captured output f o(Tn)
get.
なお、遅れ補償時間Tはサンプリング;ニよる遅れ時間
のほかに速度検出回路lの演算(ニよる遅れも考燻して
設定される。It should be noted that the delay compensation time T is set by taking into account the delay due to sampling and the computation of the speed detection circuit 1 (in addition to the delay due to sampling).
また、実施例は誘導機のベクトル制御の場合を示すが、
これはサイリスタレオナード方式にLる直流機の速度制
御や誘導機のパルス幅変調制御など種々の速度制御方式
のものミニ適用できるのは勿論である。また、切換速度
設定器13と比較部12による惰償回路2の補償処理解
除は、W、動機の高速と低速での切換えに限らず加減速
度の大小に1って切換える構成にするなど、サンプリン
グ処理による遅れが問題となる制御状態でのみ補償を行
なうものにしても良い。In addition, although the example shows the case of vector control of an induction machine,
Of course, this can be applied to various speed control systems such as the speed control of DC machines such as the thyristor Leonard system and the pulse width modulation control of induction machines. In addition, the cancellation of the compensation process of the inertia compensation circuit 2 by the switching speed setter 13 and the comparator 12 is not limited to switching between high and low speeds of W and motive, but can be performed by sampling, such as switching depending on the magnitude of acceleration/deceleration. Compensation may be performed only in control states where delays due to processing are a problem.
さらに、補償回路に各サンプリング処理回路での遅れを
角周波数ω0演算のための部分C:のみ設ける場合を示
すが、これは速度制御演算部6のサンプリング処理遅れ
の補償用を増設する構成にしても良いし、加算器4の入
力側に増設する構成にするなど適宜増設して一層応答曲
の改善を図ることができる。Furthermore, a case is shown in which only a portion C: for calculating the angular frequency ω0 is provided to compensate for the delay in each sampling processing circuit in the compensation circuit, but this is a configuration in which a portion for compensating for the delay in the sampling processing of the speed control calculation section 6 is added. Alternatively, the response tune can be further improved by adding the adder 4 as appropriate, such as by adding it to the input side of the adder 4.
発明の効果
本発明によれば、ディジタル処理方式による電動機の速
度制御!Ifにおいて、速度検出や速度制御データの演
算にサンプリング処理や演算に二る遅れを補償する補償
回路を設けるため、直流機のサイリスタレオナード制御
や誘導機のベクトル制御等の速度制御に適用して加減速
時や昼速時の高速応答性な得ることができ、また定常時
に抽償処埋を解除することに二って外乱に一対゛して整
定精度の良い制御を得ることができる効果がある。Effects of the Invention According to the present invention, the speed of an electric motor can be controlled using a digital processing method! In If, in order to provide a compensation circuit to compensate for delays in sampling processing and calculation in speed detection and calculation of speed control data, it is applied to speed control such as thyristor Leonard control of DC machines and vector control of induction machines. It is possible to obtain high-speed response during deceleration and daytime speed, and by canceling the abstraction process during steady state, it is possible to obtain control with good settling accuracy in response to external disturbances. .
第1図に本発明の一実施例を示すブロック図、第2図に
第1図における補償回路の動作説明のための%曲調、第
3図に第1図における補償回路の回路図である。
■・・・速度構出回路、2・・・補償回路、3・・・バ
イパススイッチ、4・・・加算器、5・・・速度設定器
、6・・・速度制御′6N、夏部、7・・・すべり周波
数演算回路、8・・・加′f1.−#!、9・・・三角
関数発生器、lO・・・相紅圧演算回路、11・・・イ
ンバータ、12・・・速度比較部、13・・・切換速度
設定器、21.・・・サンプリング回路、212,21
3・・・ラッチNm、214+215+21g、;?1
9*21 lo ・・・加4器、217.21 、・・
・來算器。FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a % tune for explaining the operation of the compensation circuit in FIG. 1, and FIG. 3 is a circuit diagram of the compensation circuit in FIG. 1. ■... Speed configuration circuit, 2... Compensation circuit, 3... Bypass switch, 4... Adder, 5... Speed setter, 6... Speed control '6N, summer part, 7...Slip frequency calculation circuit, 8...Additional f1. -#! , 9... Trigonometric function generator, lO... Red pressure calculation circuit, 11... Inverter, 12... Speed comparator, 13... Switching speed setter, 21. ...sampling circuit, 212, 21
3...Latch Nm, 214+215+21g,;? 1
9*21 lo... adder, 217.21,...
・The next calculator.
Claims (2)
タル量で速度検出し、この速度検出値と速度設定値との
偏差からサンプリング処理によって電動機の速度制御デ
ータを得るディジタル処理方式の電動機の速度制御装置
において、前記速度検出値又は速度制御データの少なく
とも一方にサンプリング時間の遅れを補償する補償回路
を設け、この補償回路は速度検出値又は速度制御データ
になる入力と、この入力の1階微分係数に遅れ補償時間
を乗算した値と、該入力の2階微分係数に遅れ補償時間
の二乗の1/2を乗算した値とを加算する構成にしたこ
とを特徴とする電動機の速度制御装置。(1) In an electric motor speed control device using a digital processing method, the speed of the electric motor is detected as a digital quantity through sampling processing, and the speed control data of the electric motor is obtained through sampling processing from the deviation between the detected speed value and the speed setting value. A compensation circuit is provided for compensating for a sampling time delay in at least one of the speed detection value or the speed control data, and this compensation circuit compensates for the delay in the input that becomes the speed detection value or the speed control data and the first-order differential coefficient of this input. A speed control device for an electric motor, characterized in that the speed control device for an electric motor is configured to add a value obtained by multiplying time and a value obtained by multiplying the second-order differential coefficient of the input by 1/2 the square of the delay compensation time.
電動機の加減速度又は絶対速度が低いときに補償動作を
解除する手段を含む構成にした電動機の速度制御装置。(2) The motor speed control device according to claim 1, wherein the compensation circuit includes means for canceling the compensation operation when the acceleration/deceleration or absolute speed of the motor is low.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59254481A JPS61132090A (en) | 1984-11-30 | 1984-11-30 | Speed controller for motor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59254481A JPS61132090A (en) | 1984-11-30 | 1984-11-30 | Speed controller for motor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61132090A true JPS61132090A (en) | 1986-06-19 |
Family
ID=17265648
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59254481A Pending JPS61132090A (en) | 1984-11-30 | 1984-11-30 | Speed controller for motor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61132090A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009303328A (en) * | 2008-06-11 | 2009-12-24 | Mitsubishi Electric Corp | Controller for alternating-current rotary machines |
JP2011015560A (en) * | 2009-07-03 | 2011-01-20 | Hitachi Appliances Inc | Refrigeration cycle device |
-
1984
- 1984-11-30 JP JP59254481A patent/JPS61132090A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009303328A (en) * | 2008-06-11 | 2009-12-24 | Mitsubishi Electric Corp | Controller for alternating-current rotary machines |
JP2011015560A (en) * | 2009-07-03 | 2011-01-20 | Hitachi Appliances Inc | Refrigeration cycle device |
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