JPS61131171U - - Google Patents
Info
- Publication number
- JPS61131171U JPS61131171U JP1446785U JP1446785U JPS61131171U JP S61131171 U JPS61131171 U JP S61131171U JP 1446785 U JP1446785 U JP 1446785U JP 1446785 U JP1446785 U JP 1446785U JP S61131171 U JPS61131171 U JP S61131171U
- Authority
- JP
- Japan
- Prior art keywords
- gate
- capacitor
- transistor
- source
- emitter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000003990 capacitor Substances 0.000 claims description 7
- 238000010586 diagram Methods 0.000 description 8
- 238000005070 sampling Methods 0.000 description 1
Landscapes
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Description
第1図はこの考案の一実施例の接続図、第2図
はこの考案の一実施例の動作説明に用いる波形図
、第3図はこの考案の一実施例をバツフア回路に
用いる場合の説明に用いる各部波形図、第4図は
この考案の他の実施例の接続図、第5図はこの考
案の他の実施例の動作説明に用いる波形図、第6
図はこの考案の更に他の実施例の接続図、第7図
はこの考案の更に他の実施例の動作説明に用いる
波形図、第8図及び第10図は従来のサンプルホ
ールド回路の接続図、第9図及び第11図は従来
のサンプルホールド回路の動作説明に用いる波形
図である。
図面における主要な符号の説明、1:入力端子
、2:バイアス電圧の供給端子、3:ブランキン
グパルスの供給端子、4:サンプリングパルスの
供給端子、5:電源端子、6:出力端子、7,8
,10:ゲート用のMOSトランジスタ、9:出
力用のMOSトランジスタ、11,12:コンデ
ンサ、13:定電流源。
Fig. 1 is a connection diagram of one embodiment of this invention, Fig. 2 is a waveform diagram used to explain the operation of one embodiment of this invention, and Fig. 3 is an explanation of the case where one embodiment of this invention is used in a buffer circuit. 4 is a connection diagram of another embodiment of this invention. FIG. 5 is a waveform diagram used to explain the operation of another embodiment of this invention.
The figure is a connection diagram of yet another embodiment of this invention, Figure 7 is a waveform diagram used to explain the operation of still another embodiment of this invention, and Figures 8 and 10 are connection diagrams of a conventional sample and hold circuit. , FIG. 9, and FIG. 11 are waveform diagrams used to explain the operation of a conventional sample-and-hold circuit. Explanation of main symbols in the drawings: 1: input terminal, 2: bias voltage supply terminal, 3: blanking pulse supply terminal, 4: sampling pulse supply terminal, 5: power supply terminal, 6: output terminal, 7, 8
, 10: MOS transistor for gate, 9: MOS transistor for output, 11, 12: capacitor, 13: constant current source.
Claims (1)
ンデンサの一端に供給し、該第1のコンデンサの
他端を交流的に接地し、上記第1のコンデンサの
一端を第2のコンデンサを介してソース(又はエ
ミツタ)フオロワトランジスタのゲート(又はベ
ース)に接続し、該トランジスタのソース(又は
エミツタ)から出力を得ると共に、該ソース(又
はエミツタ)を第2のゲート素子を介して上記第
1のコンデンサの一端に接続し、上記トランジス
タのゲート(又はベース)を第3のゲート素子を
介して所定の電圧値を有する直流電圧源に接続し
て、上記入力信号の第1の期間上記第2及び第3
のゲート素子をオンし、上記第2のコンデンサに
上記トランジスタのゲート・ソース(又はベース
・エミツタ)間オフセツト電圧に相当する電圧を
蓄積し、上記入力信号の第2の期間に上記第1の
ゲート素子をオンにし出力に入力信号と等しいレ
ベルの信号を得るようにしたサンプルホールド回
路。 An input signal is supplied to one end of a first capacitor via a first gate element, the other end of the first capacitor is AC grounded, and one end of the first capacitor is connected to one end of the first capacitor via a second capacitor. The source (or emitter) is connected to the gate (or base) of the follower transistor, and the output is obtained from the source (or emitter) of the transistor, and the source (or emitter) is connected to the gate (or base) of the follower transistor through the second gate element. 1, and the gate (or base) of the transistor is connected to a DC voltage source having a predetermined voltage value via a third gate element, and the first period of the input signal is 2nd and 3rd
The gate element of the transistor is turned on, a voltage corresponding to the gate-source (or base-emitter) offset voltage of the transistor is stored in the second capacitor, and the gate element of the first gate is turned on during the second period of the input signal. A sample and hold circuit that turns on the element and obtains a signal at the output with the same level as the input signal.
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1985014467U JPH0617280Y2 (en) | 1985-02-04 | 1985-02-04 | Sample-hold circuit |
DE8686400217T DE3685501T2 (en) | 1985-02-04 | 1986-02-03 | SCAN AND STOP CIRCUIT. |
EP86400217A EP0190973B1 (en) | 1985-02-04 | 1986-02-03 | Sample-and-hold circuit |
US06/826,019 US4694341A (en) | 1985-02-04 | 1986-02-04 | Sample-and-hold circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1985014467U JPH0617280Y2 (en) | 1985-02-04 | 1985-02-04 | Sample-hold circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS61131171U true JPS61131171U (en) | 1986-08-16 |
JPH0617280Y2 JPH0617280Y2 (en) | 1994-05-02 |
Family
ID=30499418
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1985014467U Expired - Lifetime JPH0617280Y2 (en) | 1985-02-04 | 1985-02-04 | Sample-hold circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0617280Y2 (en) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001083924A (en) * | 1999-09-08 | 2001-03-30 | Matsushita Electric Ind Co Ltd | Drive circuit and drive method of current control type light emitting element |
JP2002514320A (en) * | 1997-04-23 | 2002-05-14 | サーノフ コーポレイション | Active matrix light emitting diode pixel structure and method |
JP2004201297A (en) * | 2002-12-03 | 2004-07-15 | Semiconductor Energy Lab Co Ltd | Analog circuit, and display device and electronic equipment using the same |
JP2008206195A (en) * | 2002-01-17 | 2008-09-04 | Semiconductor Energy Lab Co Ltd | Semiconductor device |
JP2009296643A (en) * | 2002-12-03 | 2009-12-17 | Semiconductor Energy Lab Co Ltd | Semiconductor device, display device, and electronic device |
US8400191B2 (en) | 2001-11-28 | 2013-03-19 | Semiconductor Energy Laboratory Co., Ltd. | Electric circuit |
CN112073052A (en) * | 2020-09-11 | 2020-12-11 | 浙江源创建筑智能科技有限公司 | Self-adaptive sampling interface circuit |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005266365A (en) * | 2004-03-18 | 2005-09-29 | Semiconductor Energy Lab Co Ltd | Source follower circuit, driving method thereof, voltage follower circuit, and display apparatus |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5126457A (en) * | 1974-08-30 | 1976-03-04 | Yamatake Honeywell Co Ltd | |
JPS5982699A (en) * | 1982-09-29 | 1984-05-12 | ウエスターン エレクトリック カムパニー,インコーポレーテツド | Circuit and method for sample-holding signal |
JPS59117791A (en) * | 1982-12-20 | 1984-07-07 | ウエスターン エレクトリック カムパニー,インコーポレーテッド | Sample-holding circuit |
JPS59165571A (en) * | 1983-03-09 | 1984-09-18 | Hitachi Ltd | Dc restoration circuit |
-
1985
- 1985-02-04 JP JP1985014467U patent/JPH0617280Y2/en not_active Expired - Lifetime
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5126457A (en) * | 1974-08-30 | 1976-03-04 | Yamatake Honeywell Co Ltd | |
JPS5982699A (en) * | 1982-09-29 | 1984-05-12 | ウエスターン エレクトリック カムパニー,インコーポレーテツド | Circuit and method for sample-holding signal |
JPS59117791A (en) * | 1982-12-20 | 1984-07-07 | ウエスターン エレクトリック カムパニー,インコーポレーテッド | Sample-holding circuit |
JPS59165571A (en) * | 1983-03-09 | 1984-09-18 | Hitachi Ltd | Dc restoration circuit |
Cited By (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002514320A (en) * | 1997-04-23 | 2002-05-14 | サーノフ コーポレイション | Active matrix light emitting diode pixel structure and method |
JP2001083924A (en) * | 1999-09-08 | 2001-03-30 | Matsushita Electric Ind Co Ltd | Drive circuit and drive method of current control type light emitting element |
US8400191B2 (en) | 2001-11-28 | 2013-03-19 | Semiconductor Energy Laboratory Co., Ltd. | Electric circuit |
US8841941B2 (en) | 2001-11-28 | 2014-09-23 | Semiconductor Energy Laboratory Co., Ltd. | Electric circuit |
US8536937B2 (en) | 2001-11-28 | 2013-09-17 | Semiconductor Energy Laboratory Co., Ltd. | Electric circuit |
JP2008206195A (en) * | 2002-01-17 | 2008-09-04 | Semiconductor Energy Lab Co Ltd | Semiconductor device |
US8305138B2 (en) | 2002-12-03 | 2012-11-06 | Semiconductor Energy Laboratory Co., Ltd. | Analog circuit and display device and electronic device |
US8441315B2 (en) | 2002-12-03 | 2013-05-14 | Semiconductor Energy Laboratory Co., Ltd. | Analog circuit and display device and electronic device |
JP2009296643A (en) * | 2002-12-03 | 2009-12-17 | Semiconductor Energy Lab Co Ltd | Semiconductor device, display device, and electronic device |
US8680917B2 (en) | 2002-12-03 | 2014-03-25 | Semiconductor Energy Laboratory Co., Ltd. | Analog circuit and display device and electronic device |
US8836420B2 (en) | 2002-12-03 | 2014-09-16 | Semiconductor Energy Laboratory Co., Ltd. | Analog circuit and display device and electronic device |
JP2004201297A (en) * | 2002-12-03 | 2004-07-15 | Semiconductor Energy Lab Co Ltd | Analog circuit, and display device and electronic equipment using the same |
CN112073052A (en) * | 2020-09-11 | 2020-12-11 | 浙江源创建筑智能科技有限公司 | Self-adaptive sampling interface circuit |
Also Published As
Publication number | Publication date |
---|---|
JPH0617280Y2 (en) | 1994-05-02 |
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