JPS61131133U - - Google Patents

Info

Publication number
JPS61131133U
JPS61131133U JP1308985U JP1308985U JPS61131133U JP S61131133 U JPS61131133 U JP S61131133U JP 1308985 U JP1308985 U JP 1308985U JP 1308985 U JP1308985 U JP 1308985U JP S61131133 U JPS61131133 U JP S61131133U
Authority
JP
Japan
Prior art keywords
input
switch
power source
utility
receiving
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1308985U
Other languages
Japanese (ja)
Other versions
JPH0450658Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1985013089U priority Critical patent/JPH0450658Y2/ja
Publication of JPS61131133U publication Critical patent/JPS61131133U/ja
Application granted granted Critical
Publication of JPH0450658Y2 publication Critical patent/JPH0450658Y2/ja
Expired legal-status Critical Current

Links

Landscapes

  • Electronic Switches (AREA)
  • Logic Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案の一実施例を示した電気回路図
、第２図は他の実施例を示した電気回路図、第３
図はさらに他の実施例を示した電気回路図、第４
図は従来構成の一例を示した電気回路図である。 Ｓ……スイツチ、Ｔ２，Ｔ３，Ｔ４……ＭＯＳ
トランジスタ。 Fig. 1 is an electrical circuit diagram showing one embodiment of the present invention, Fig. 2 is an electrical circuit diagram showing another embodiment, and Fig. 3 is an electrical circuit diagram showing another embodiment.
The figure is an electrical circuit diagram showing still another embodiment.
The figure is an electrical circuit diagram showing an example of a conventional configuration. S...Switch, T2 , T3 , T4 ...MOS
transistor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] スイツチ等の入力手段からの信号を受ける入力
端子を定電流回路を介して電源に接続したことを
特徴とするＩＣ入力回路。 An IC input circuit characterized in that an input terminal for receiving a signal from an input means such as a switch is connected to a power source via a constant current circuit.
JP1985013089U 1985-02-01 1985-02-01 Expired JPH0450658Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1985013089U JPH0450658Y2 (en) 1985-02-01 1985-02-01

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1985013089U JPH0450658Y2 (en) 1985-02-01 1985-02-01

Publications (2)

Publication Number Publication Date
JPS61131133U true JPS61131133U (en) 1986-08-16
JPH0450658Y2 JPH0450658Y2 (en) 1992-11-30

Family

ID=30496769

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1985013089U Expired JPH0450658Y2 (en) 1985-02-01 1985-02-01

Country Status (1)

Country Link
JP (1) JPH0450658Y2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0419026U (en) * 1990-06-01 1992-02-18

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5754427A (en) * 1980-09-19 1982-03-31 Nec Corp Input circuit
JPS57143923A (en) * 1981-02-28 1982-09-06 Seiko Instr & Electronics Ltd Switch circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5754427A (en) * 1980-09-19 1982-03-31 Nec Corp Input circuit
JPS57143923A (en) * 1981-02-28 1982-09-06 Seiko Instr & Electronics Ltd Switch circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0419026U (en) * 1990-06-01 1992-02-18

Also Published As

Publication number Publication date
JPH0450658Y2 (en) 1992-11-30

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