JPS61108976U - - Google Patents
Info
- Publication number
- JPS61108976U JPS61108976U JP19392984U JP19392984U JPS61108976U JP S61108976 U JPS61108976 U JP S61108976U JP 19392984 U JP19392984 U JP 19392984U JP 19392984 U JP19392984 U JP 19392984U JP S61108976 U JPS61108976 U JP S61108976U
- Authority
- JP
- Japan
- Prior art keywords
- inverter
- input terminal
- output
- voltage
- threshold voltages
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Measurement Of Current Or Voltage (AREA)
Description
第１図は本考案の３値検出回路の回路図、第２
図は従来回路の特性を示す特性図である。
１……入力端子、２，３，４……第１、第２、
第３のインバータ、５……抵抗。
Figure 1 is a circuit diagram of the three-value detection circuit of the present invention;
The figure is a characteristic diagram showing the characteristics of a conventional circuit. 1...Input terminal, 2, 3, 4...1st, 2nd,
Third inverter, 5...resistance.
Claims (1)
バータと第２のインバータとが一つの入力端子に
接続され、前記第１のインバータの出力及び第２
のインバータの出力によつて前記入力端子に印加
された電圧レベルを検出する３値検出回路に於い
て、前記入力端子に、前記第１のインバータと第
２のインバータの各スレツシヨルド電圧の中間レ
ベルのスレツシヨルド電圧を有する第３のインバ
ータを接続すると共に、該第３のインバータの入
力端子と出力端子との間に抵抗を接続し、前記入
力端子が開放されたとき該入力端子の電圧を第１
及び第２のインバータのスレツシヨルド電圧の間
に保持することを特徴とする３値検出回路。 A first inverter and a second inverter having different threshold voltages are connected to one input terminal, and the output of the first inverter and the second inverter are connected to one input terminal.
In the three-value detection circuit that detects the voltage level applied to the input terminal by the output of the inverter, an intermediate level between the respective threshold voltages of the first inverter and the second inverter is applied to the input terminal. A third inverter having a threshold voltage is connected, and a resistor is connected between the input terminal and the output terminal of the third inverter, and when the input terminal is opened, the voltage at the input terminal is changed to the first inverter.
and a threshold voltage of the second inverter.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19392984U JPS61108976U (en) | 1984-12-20 | 1984-12-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19392984U JPS61108976U (en) | 1984-12-20 | 1984-12-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61108976U true JPS61108976U (en) | 1986-07-10 |
Family
ID=30751362
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19392984U Pending JPS61108976U (en) | 1984-12-20 | 1984-12-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61108976U (en) |
-
1984
- 1984-12-20 JP JP19392984U patent/JPS61108976U/ja active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS61108976U (en) | ||
| JPS616774U (en) | Three-value detection circuit | |
| JPS6392419U (en) | ||
| JPS62104156U (en) | ||
| JPS6451328U (en) | ||
| JPS6253596U (en) | ||
| JPS639799U (en) | ||
| JPH01177612U (en) | ||
| JPS6195105U (en) | ||
| JPS6344165U (en) | ||
| JPH01133826U (en) | ||
| JPS61197727U (en) | ||
| JPS6183338U (en) | ||
| JPS6157709U (en) | ||
| JPS6320617U (en) | ||
| JPS6155U (en) | Condensation detection circuit | |
| JPS6168534U (en) | ||
| JPS6257425U (en) | ||
| JPS61121014U (en) | ||
| JPS6135446U (en) | Majority decision circuit | |
| JPS6251416U (en) | ||
| JPS62150640U (en) | ||
| JPS62177110U (en) | ||
| JPS59187224U (en) | Variable limit length circuit | |
| JPS61171309U (en) |