JPS6078141U - Electronic component mounting structure - Google Patents

Electronic component mounting structure

Info

Publication number
JPS6078141U
JPS6078141U JP17075483U JP17075483U JPS6078141U JP S6078141 U JPS6078141 U JP S6078141U JP 17075483 U JP17075483 U JP 17075483U JP 17075483 U JP17075483 U JP 17075483U JP S6078141 U JPS6078141 U JP S6078141U
Authority
JP
Japan
Prior art keywords
electronic component
semiconductor element
mounting structure
electrode
component mounting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17075483U
Other languages
Japanese (ja)
Inventor
茂成 高見
達彦 入江
敏行 山口
二郎 橋爪
Original Assignee
松下電工株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 松下電工株式会社 filed Critical 松下電工株式会社
Priority to JP17075483U priority Critical patent/JPS6078141U/en
Publication of JPS6078141U publication Critical patent/JPS6078141U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図及び第2図は従来例を示す図で、第1図は斜視図
、第2図は断面図、第3図及び第4図はこの考案の一実
施例を示す図で、第3図は分解斜視図、第4図は断面図
である。
1 and 2 are views showing a conventional example, FIG. 1 is a perspective view, FIG. 2 is a sectional view, FIGS. 3 and 4 are views showing an embodiment of this invention, and FIG. The figure is an exploded perspective view, and FIG. 4 is a sectional view.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 母基板1の一部に凹部2を設け、該凹部2の周囲に該母
基板1の回路の電極3を形成し、他方、金属回路基板5
に半導体素子4を塔載すると共にその周囲に前記電極3
に対応する電極6を形成し、かつ半導体素子4と電極6
をワイヤーボンドし、該金属回路基板5を半導体素子4
を凹部2に嵌入して母基板1上に嵌入して母基板1上に
塔載し、電極3と電極6を重合して接続して成ることを
特徴とする電子部品の実装構造。
A recess 2 is provided in a part of the motherboard 1, an electrode 3 of the circuit of the motherboard 1 is formed around the recess 2, and a metal circuit board 5 is formed.
A semiconductor element 4 is mounted on the semiconductor element 4, and the electrode 3 is placed around the semiconductor element 4.
forming an electrode 6 corresponding to the semiconductor element 4 and the electrode 6;
are wire-bonded, and the metal circuit board 5 is attached to the semiconductor element 4.
A mounting structure for an electronic component, characterized in that the electronic component is fitted into a recess 2, fitted onto a mother board 1, and mounted on the mother board 1, and the electrodes 3 and 6 are connected by overlapping.
JP17075483U 1983-10-31 1983-10-31 Electronic component mounting structure Pending JPS6078141U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17075483U JPS6078141U (en) 1983-10-31 1983-10-31 Electronic component mounting structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17075483U JPS6078141U (en) 1983-10-31 1983-10-31 Electronic component mounting structure

Publications (1)

Publication Number Publication Date
JPS6078141U true JPS6078141U (en) 1985-05-31

Family

ID=30372677

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17075483U Pending JPS6078141U (en) 1983-10-31 1983-10-31 Electronic component mounting structure

Country Status (1)

Country Link
JP (1) JPS6078141U (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54128277A (en) * 1978-03-29 1979-10-04 Hitachi Ltd Semiconductor device
JPS5567154A (en) * 1978-11-15 1980-05-21 Matsushita Electric Ind Co Ltd Method of installing lead-less ic package
JPS55123151A (en) * 1979-03-15 1980-09-22 Nec Corp Integrated circuit device
JPS5856447A (en) * 1981-09-11 1983-04-04 エヌ・ベ−・フイリツプス・フル−イランペンフアブリケン Identification card and method of producing same

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54128277A (en) * 1978-03-29 1979-10-04 Hitachi Ltd Semiconductor device
JPS5567154A (en) * 1978-11-15 1980-05-21 Matsushita Electric Ind Co Ltd Method of installing lead-less ic package
JPS55123151A (en) * 1979-03-15 1980-09-22 Nec Corp Integrated circuit device
JPS5856447A (en) * 1981-09-11 1983-04-04 エヌ・ベ−・フイリツプス・フル−イランペンフアブリケン Identification card and method of producing same

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