JPS606345U - Pulse generation circuit - Google Patents

Pulse generation circuit

Info

Publication number
JPS606345U
JPS606345U JP9723283U JP9723283U JPS606345U JP S606345 U JPS606345 U JP S606345U JP 9723283 U JP9723283 U JP 9723283U JP 9723283 U JP9723283 U JP 9723283U JP S606345 U JPS606345 U JP S606345U
Authority
JP
Japan
Prior art keywords
transistors
generation circuit
pulse generation
pulse
collectors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9723283U
Other languages
Japanese (ja)
Inventor
谷山 隆
Original Assignee
クラリオン株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by クラリオン株式会社 filed Critical クラリオン株式会社
Priority to JP9723283U priority Critical patent/JPS606345U/en
Publication of JPS606345U publication Critical patent/JPS606345U/en
Pending legal-status Critical Current

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  • Manipulation Of Pulses (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のパルス発生回路の回路図、第2図は入力
信号および出力信号の波形図、第3図は本考案によるパ
ルス発生回路の回路図である。 T6.T7・・・・・・PNP )ランジスタ、T2.
 T3. T、。 T、・・・・・・NPN トランジスタ、R1,R2,
R3,R1・・・・・・抵抗、IN・・・・・・入力、
OUT・・・・・・出力、+ Vcc・・・・・・電源
FIG. 1 is a circuit diagram of a conventional pulse generating circuit, FIG. 2 is a waveform diagram of an input signal and an output signal, and FIG. 3 is a circuit diagram of a pulse generating circuit according to the present invention. T6. T7...PNP) transistor, T2.
T3. T. T,...NPN transistor, R1, R2,
R3, R1...Resistance, IN...Input,
OUT...Output, +Vcc...Power supply.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 差動増幅器を構成する2個のトランジスタのコレクタ間
に、一方の極性のパルスに対して一方のトランジスタが
オンし、それとは反対極性のパルスに対して他方のトラ
ンジスタがオンするように、エミッタおよびベース端子
が互いに逆方向に接続された2個のトランジスタを有し
、それぞれの極性の入力信号がいずれか一方のトランジ
スタをオンし、パルス信号がそれらのトランジスタのコ
レクタ電流によって得られることを特徴とするパルス発
生回路。
Between the collectors of the two transistors that make up the differential amplifier, the emitter and It has two transistors whose base terminals are connected in opposite directions, an input signal of each polarity turns on one of the transistors, and a pulse signal is obtained by the collector current of those transistors. Pulse generation circuit.
JP9723283U 1983-06-23 1983-06-23 Pulse generation circuit Pending JPS606345U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9723283U JPS606345U (en) 1983-06-23 1983-06-23 Pulse generation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9723283U JPS606345U (en) 1983-06-23 1983-06-23 Pulse generation circuit

Publications (1)

Publication Number Publication Date
JPS606345U true JPS606345U (en) 1985-01-17

Family

ID=30231375

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9723283U Pending JPS606345U (en) 1983-06-23 1983-06-23 Pulse generation circuit

Country Status (1)

Country Link
JP (1) JPS606345U (en)

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