JPS6025048U - Data input/output device for flexible disk drives - Google Patents
Data input/output device for flexible disk drivesInfo
- Publication number
- JPS6025048U JPS6025048U JP11375983U JP11375983U JPS6025048U JP S6025048 U JPS6025048 U JP S6025048U JP 11375983 U JP11375983 U JP 11375983U JP 11375983 U JP11375983 U JP 11375983U JP S6025048 U JPS6025048 U JP S6025048U
- Authority
- JP
- Japan
- Prior art keywords
- flexible disk
- data
- circuit
- disk drive
- output device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Signal Processing For Digital Recording And Reproducing (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は本考案の一実施例を示すブロック図である。
８・・・・・・ゲート制御信号、９・・・・・・ＤＭＡ
リクエスト信号、１０・・・・・・データストローブ信
号、１１・・・・・・ＦＤＤ制御信号、１２・・・・・
・マイクロコンピュータ側データバスライン、１３・・
・・・・マイクロコンピュータ側アドレスバスライン、
１５・・・・・・ＦＤＤライトデータ信号、１６・・・
・・・ＦＤＤリードデータ信号。FIG. 1 is a block diagram showing one embodiment of the present invention. 8...Gate control signal, 9...DMA
Request signal, 10... Data strobe signal, 11... FDD control signal, 12...
・Microcomputer side data bus line, 13...
...Microcomputer side address bus line,
15...FDD write data signal, 16...
...FDD read data signal.
Claims (1)
との間で転送するデータを一時的に記憶するメモリーと
、このメモリーと前記フレキシブルディスクドライブと
の間で行う前記データの授受・ め経路に介在して
ありこのデータの形式変換を行ウィンターフエースと、
前記メモリーと前記マイクロコンピュータのデータバス
ラインとの間で行う前記データの授受の経路に介在しで
ある第１のゲート回路と、前記マイクロコンピュータの
アドレスバスラインと前記メモリグのアドレスラインと
の接続路に介在させである第２のゲート回路と、前記マ
イクロコンピュータを介することな（前記フレキシブル
ディスクドライブが前記メモリとの間で行う前記データ
の直接の授受においてその直接の授受が行われる前記メ
モリーのアドレスを指定する回路と、前記フレシキブル
ディスクドライブから前記直接授受の要求を受は前記直
接授受の期間には前記第１及び第２のゲート回路を閉じ
させその他の期間にはこれら両ゲート回路を開かせる回
路とを備えるフレキシブルディスクドライブ用データ入
出力装置。A memory that temporarily stores data to be transferred between a flexible disk drive and a microcomputer, and a format of this data that is interposed in a path for exchanging data between this memory and the flexible disk drive. Line the conversion with Winterface,
a first gate circuit that is interposed in the data transfer path between the memory and the data bus line of the microcomputer; and a connection path between the address bus line of the microcomputer and the address line of the memorig. a second gate circuit that is interposed in A circuit designating a circuit for receiving the direct transfer request from the flexible disk drive closes the first and second gate circuits during the direct transfer period and opens both gate circuits during other periods. A data input/output device for a flexible disk drive, comprising a circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11375983U JPS6025048U (en) | 1983-07-22 | 1983-07-22 | Data input/output device for flexible disk drives |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11375983U JPS6025048U (en) | 1983-07-22 | 1983-07-22 | Data input/output device for flexible disk drives |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6025048U true JPS6025048U (en) | 1985-02-20 |
Family
ID=30263216
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11375983U Pending JPS6025048U (en) | 1983-07-22 | 1983-07-22 | Data input/output device for flexible disk drives |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6025048U (en) |
-
1983
- 1983-07-22 JP JP11375983U patent/JPS6025048U/en active Pending
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