JPS60155278U - Adder circuit - Google Patents
Adder circuitInfo
- Publication number
- JPS60155278U JPS60155278U JP4253284U JP4253284U JPS60155278U JP S60155278 U JPS60155278 U JP S60155278U JP 4253284 U JP4253284 U JP 4253284U JP 4253284 U JP4253284 U JP 4253284U JP S60155278 U JPS60155278 U JP S60155278U
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- resistor
- collector
- base
- adder circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Processing Of Color Television Signals (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は出力段のダイナミツオレンジを広<取る一般的
な回路図、第2図は本考案の加算回路を示す回路図であ
る。
主な図番の説明、2・・・電源ライン、3・・・第1の
′入力端子、4・・・第1の抵抗、5・・・第2の抵抗
、6・・・第3の抵抗、7・・・第4の抵抗、8・・・
第1のトランジスタ、9・・・第2のトランジスタ、1
0−・・ダイオード、11・・・出力端子、12・・・
第2の入力端子、13・・・第3のトランジスタ、14
・・・第5の抵抗。FIG. 1 is a general circuit diagram for widening the dynamic orange of the output stage, and FIG. 2 is a circuit diagram showing an adder circuit of the present invention. Explanation of main drawing numbers, 2... Power supply line, 3... First input terminal, 4... First resistor, 5... Second resistor, 6... Third resistor. Resistor, 7... Fourth resistor, 8...
First transistor, 9...Second transistor, 1
0-...Diode, 11...Output terminal, 12...
Second input terminal, 13...Third transistor, 14
...Fifth resistance.
Claims (1)
インとアース間に直列接続した第1の抵抗、第1のトラ
ンジスタ、ダイオード及び第2の抵抗と、前記電源ライ
ンとアース間に直列接続した第3の抵抗、第2のトラン
ジスタ及び第4の抵抗と、前記第1のトランジスタ、前
記ダイオード及び前記第2の抵抗に並列接続した第3の
トラ、ンジスタ及び第5の抵抗より構成され、前記第1
゛ のトランジスタのコレクタと前記第2のトランジ
スタのベース及び前記第1のトランジスタのエミッター
と前記第3のトランジスタのコレクタとを各々接続し、
前記第1のトランジスタのベースに輝度信号を入力する
第1の入力端子を接続すると共に前記第3のトランジス
タのベースに色信号を入力する第2の入力端子を接続し
、かつ前記第2のトランジスタのコレクタと出力端子を
接続したことを特徴とする加算回路。 ゛In an addition circuit that adds a luminance signal and a color signal, a first resistor, a first transistor, a diode, and a second resistor are connected in series between the power supply line and the ground, and a second resistor is connected in series between the power supply line and the ground. a third resistor, a second transistor, a fourth resistor, a third transistor, a transistor, and a fifth resistor connected in parallel to the first transistor, the diode, and the second resistor; 1
゛ Connecting the collector of the transistor and the base of the second transistor, and the emitter of the first transistor and the collector of the third transistor, respectively;
A first input terminal for inputting a luminance signal is connected to the base of the first transistor, and a second input terminal for inputting a color signal is connected to the base of the third transistor, and the second transistor An adder circuit characterized in that the collector and output terminal of the adder are connected.゛
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4253284U JPS60155278U (en) | 1984-03-24 | 1984-03-24 | Adder circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4253284U JPS60155278U (en) | 1984-03-24 | 1984-03-24 | Adder circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS60155278U true JPS60155278U (en) | 1985-10-16 |
JPH0317512Y2 JPH0317512Y2 (en) | 1991-04-12 |
Family
ID=30553373
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4253284U Granted JPS60155278U (en) | 1984-03-24 | 1984-03-24 | Adder circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60155278U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06188735A (en) * | 1992-12-22 | 1994-07-08 | Mitsubishi Electric Corp | Differential subtracter circuit and a/d converter |
-
1984
- 1984-03-24 JP JP4253284U patent/JPS60155278U/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06188735A (en) * | 1992-12-22 | 1994-07-08 | Mitsubishi Electric Corp | Differential subtracter circuit and a/d converter |
Also Published As
Publication number | Publication date |
---|---|
JPH0317512Y2 (en) | 1991-04-12 |
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