JPS5984931U - electronic circuit - Google Patents
electronic circuitInfo
- Publication number
- JPS5984931U JPS5984931U JP16498883U JP16498883U JPS5984931U JP S5984931 U JPS5984931 U JP S5984931U JP 16498883 U JP16498883 U JP 16498883U JP 16498883 U JP16498883 U JP 16498883U JP S5984931 U JPS5984931 U JP S5984931U
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- circuit
- resistor
- series
- base
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Logic Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図a、 bは従来のレベルシフト回路の回路図、
第2図は本考案の実施例を示す回路図、第3図および第
4図は本発明の応用例を示す回路図である。
図面で、Q工〜Q、は第1〜第4のトランジスタ、R□
〜R3は第1〜第3の抵抗、11は電源線である。Figures 1a and 1b are circuit diagrams of conventional level shift circuits,
FIG. 2 is a circuit diagram showing an embodiment of the present invention, and FIGS. 3 and 4 are circuit diagrams showing applied examples of the present invention. In the drawing, Q~Q are the first to fourth transistors, R□
-R3 are first to third resistors, and 11 is a power supply line.
Claims (1)
の回路、第2の抵抗と第2のトランジスタを直列に接続
した第2の回路を備え、第1、第2の回路の直列接続点
を相手側箱2、第1の回路のトランジスタのベースへ接
続し、第1の抵抗の゛他端と第2のトランジスタの他端
を電源線へ接続、 してなる定電圧回路と、 入力電圧を印加される第3のトランジスタ、第3の抵抗
、出力電圧を導出する第4のトランジスタを直列に接続
し、この第4のトランジスタの他端を前記電源線にまた
そのベースを前記第2のトランジスタのベースへ接続し
てなる出力回路、とからなることを特徴とするレベルシ
フト用の電子回路。[Claims for Utility Model Registration] A first transistor in which a first transistor and a first resistor are connected in series.
The circuit includes a second circuit in which a second resistor and a second transistor are connected in series, and the series connection point of the first and second circuits is connected to the mating box 2 and the base of the transistor of the first circuit. a constant voltage circuit formed by connecting the other end of the first resistor and the other end of the second transistor to a power supply line; a third transistor to which an input voltage is applied; a third resistor; and an output. an output circuit comprising a fourth transistor for deriving a voltage connected in series, the other end of the fourth transistor connected to the power supply line, and its base connected to the base of the second transistor; An electronic circuit for level shifting featuring the following.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16498883U JPS5984931U (en) | 1983-10-25 | 1983-10-25 | electronic circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16498883U JPS5984931U (en) | 1983-10-25 | 1983-10-25 | electronic circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5984931U true JPS5984931U (en) | 1984-06-08 |
Family
ID=30361572
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16498883U Pending JPS5984931U (en) | 1983-10-25 | 1983-10-25 | electronic circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5984931U (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4873726A (en) * | 1972-01-12 | 1973-10-04 | ||
JPS50102234A (en) * | 1974-01-10 | 1975-08-13 |
-
1983
- 1983-10-25 JP JP16498883U patent/JPS5984931U/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4873726A (en) * | 1972-01-12 | 1973-10-04 | ||
JPS50102234A (en) * | 1974-01-10 | 1975-08-13 |
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