JPS599930A - Forming method for glass coating onto semiconductor substrate - Google Patents

Forming method for glass coating onto semiconductor substrate

Info

Publication number
JPS599930A
JPS599930A JP57119463A JP11946382A JPS599930A JP S599930 A JPS599930 A JP S599930A JP 57119463 A JP57119463 A JP 57119463A JP 11946382 A JP11946382 A JP 11946382A JP S599930 A JPS599930 A JP S599930A
Authority
JP
Japan
Prior art keywords
glass
semiconductor substrate
substrate
voltage
polarity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57119463A
Other languages
Japanese (ja)
Inventor
Kazuyoshi Kitamura
北村 一芳
Isamu Fukui
勇 福井
Takashi Morifuchi
森「淵」 孝
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp, Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electronics Corp
Priority to JP57119463A priority Critical patent/JPS599930A/en
Publication of JPS599930A publication Critical patent/JPS599930A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To obtain the glass coating having no omission and irregularities in film thickness by inverting polarity at least once during the application of DC voltage between both poles and returning polarity to an original state when an electrode body as one electrode and the semiconductor substrate as the other electrode are opposed to each other, and immersed in an electrolytic solution, in which glass particles are suspended, DC voltage is applied between both poles and particles are attached onto the substrate through electrophoresis. CONSTITUTION:Lead group glass is dispersed in methyl alcohol of high purity while a very small amount of aluminum chloride is added and agitated in order to provide glass particles with charges, and the inside of a vessel 1 is filled with a suspension 2 obtained. A platinum plate 3 and the semiconductor substrate 4 are opposed and immersed in the suspension, and a DC power supply 5 is connected to the plate and the substrate through interlocking changeover switches 14, 15. According to such constitution, electrophoresis is generated in glass particles while using the substrate 4 as a plus pole, and the glass coating is attached onto the substrate 4, but the switches 14, 15 are inverted at least once on its midway at that time, and the polarity of the substrate 4 is reversed temporarily.

Description

【発明の詳細な説明】 不発明は、半導体素子の表面保護膜として用いらnるガ
ラス膜を、電着によって半導体基板上に形成する方法に
関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for forming a glass film used as a surface protection film of a semiconductor element on a semiconductor substrate by electrodeposition.

半導体素子の表面保護膜として、近年、ガラス膜が多用
さnるに至っている。このガラス膜による表面保護に、
従来の保護膜では得難い高温安定性ならびに高耐圧化を
半導体素子にもたらすものであり、樹脂封止タイプに切
りかわりつつある電力用半導体装置の表面保護に好適で
ある。このガラス膜を半導体基板上に形成する方法とし
てに、電着法、塗布法あるいは沈降法などがあるが、必
要とする箇所にのみ選択的にガラス膜を付着させること
のできる電着法が最も広く利用さnている。
In recent years, glass films have come into widespread use as surface protection films for semiconductor devices. This glass film protects the surface.
It provides semiconductor elements with high-temperature stability and high voltage resistance that are difficult to obtain with conventional protective films, and is suitable for surface protection of power semiconductor devices, which are switching to resin-sealed types. Methods for forming this glass film on a semiconductor substrate include electrodeposition, coating, and precipitation methods, but the electrodeposition method is the best because it allows the glass film to be selectively deposited only on the required locations. It is widely used.

電着法では、非水溶媒系の液中にガラス粒子全懸濁させ
るとともに、このガラス粒子を負etたは正■に帯電さ
せ、この懸濁液中に一方の電極として通常白金電極を、
他方の電極として半導体基を対向させて配置し、ガラス
粒子の帯電がたとえば○であるときには、上記の白金電
極がe極に、一方、半導体基板が■極となるように直流
電圧を印加してガラス粒子を電気泳動させることが行ゎ
nる。この場合、θに帯電したガラス粒子は■極である
半導体基板に引き寄せらn1半導体基板に付着したとき
電荷を失い、半導体基板表面上にガラス粒子が凝集して
ガラス膜となる。
In the electrodeposition method, all of the glass particles are suspended in a non-aqueous solvent, the glass particles are negatively charged or positively charged, and one electrode, usually a platinum electrode, is placed in the suspension.
Semiconductor groups are placed facing each other as the other electrode, and when the charge of the glass particles is, for example, ○, a DC voltage is applied so that the platinum electrode becomes the e-pole and the semiconductor substrate becomes the z-pole. Electrophoresis of glass particles is carried out. In this case, the glass particles charged to θ are attracted to the semiconductor substrate, which is the ■ pole, and when they adhere to the n1 semiconductor substrate, they lose their charge, and the glass particles aggregate on the surface of the semiconductor substrate to form a glass film.

第1図に、ガラス電着法の従来例を示す図であ9、容器
1の中にガラス粒子を懸濁させた電解液2が満ださtl
 この中に、一方の電極として白金板3を、他方の電極
として半導体基板4を対向させて浸漬するとともに、両
電極間に直流電源5により電圧全印加し、ガラス粒子を
電気泳動させることが行わ扛ていた。ところで、この従
来法では、所定の膜厚のガラス膜を得るにあたり、上記
の電極間に定電圧が所定の時間にわたって連続的に印加
さ扛る。しかしながら、このような電圧印加法によりガ
ラス膜を形成した場合、選択付着はなさ扛るものの、付
着形成したガラス膜に部分的に欠落が生じること、ある
いぽ膜厚がばらつくことなどの不都合があった。
FIG. 1 is a diagram showing a conventional example of the glass electrodeposition method, in which a container 1 is filled with an electrolytic solution 2 in which glass particles are suspended.
A platinum plate 3 as one electrode and a semiconductor substrate 4 as the other electrode are immersed in this solution facing each other, and a full voltage is applied between the two electrodes by a DC power source 5 to cause electrophoresis of the glass particles. I was kidding. By the way, in this conventional method, in order to obtain a glass film of a predetermined thickness, a constant voltage is continuously applied between the above-mentioned electrodes over a predetermined period of time. However, when a glass film is formed by such a voltage application method, although there is no selective adhesion, there are disadvantages such as partial defects in the formed glass film and variations in the film thickness. Ta.

第2図は、三重拡散形NPNメザトランジスタのメサ溝
に第1図で示した従来の方法でガラス膜を形成したのち
の状態を例示する図であり、図示= するように、N型コレクタ層6.  N型コレクタ層7
、  P型ベース層8.N型エミツタ層9ならびに酸化
膜10iマスクとして化学エツチングで形成したメサ溝
11を有する半導体基体に対して、従来の電着法でガラ
ス膜形成を施すと、露呈するメサ溝11の内面にはガラ
ス膜12が付着形成さ扛るが、メサ溝の内面の一部にガ
ラス被膜12の付着形成さnない欠落部13がしばしば
発生する。
FIG. 2 is a diagram illustrating the state after a glass film is formed in the mesa groove of a triple diffusion type NPN mesa transistor by the conventional method shown in FIG. 6. N-type collector layer 7
, P-type base layer8. When a glass film is formed by a conventional electrodeposition method on a semiconductor substrate having a mesa groove 11 formed by chemical etching as a mask for the N-type emitter layer 9 and oxide film 10i, the exposed inner surface of the mesa groove 11 is covered with glass. Although the film 12 is not deposited, a missing portion 13 often occurs on a part of the inner surface of the mesa groove where the glass coating 12 is not deposited.

また、付着形成さ匙たガラス膜の厚みにもばらつきが生
じる。こ扛らの発生理由は詳らかでないが、ガラスを懸
濁させた電解液の中に存在するイオン、特に、水素イオ
ン、酸素イオンなどによってガラス粒子の移動ならびに
半導体基板への付着が妨げらnること、あるいは、付着
したガラス粒子間の結合力が弱めらnることに加えて、
半導体基体上の汚染物質によってガラス粒子の付着が妨
げら扛ることなどによるものと推察さnる。
Furthermore, variations occur in the thickness of the glass film that is deposited and formed. The reason for these occurrences is not clear, but the ions present in the electrolyte in which the glass is suspended, especially hydrogen ions and oxygen ions, prevent the glass particles from moving and adhering to the semiconductor substrate. In addition to weakening the bonding force between attached glass particles,
It is presumed that this is due to contaminants on the semiconductor substrate preventing the adhesion of glass particles.

ところで、ガラス膜に欠落部が生じること、あるいは、
ガラス膜厚にばらつきが生じることなどの不都合は、形
成されるトランジスタなどの半導体装置の特性に著るし
い劣化をもたらすところとなる。
By the way, if a missing part occurs in the glass film or
Disadvantages such as variations in glass film thickness cause significant deterioration in the characteristics of semiconductor devices such as transistors to be formed.

本発明は、以上説明した従来のガラス膜電着法の不都合
をことごとく排除し、欠落部がなく、膜厚のばらつきも
極めて少いガラス被膜の形成を可能にする方法を提供す
るもので、従来の電着法によるガラス膜形成での不都合
の排除を意図した検討の中で、電気泳動中に印加電圧の
極性を少くとも1回反転させた場合、形成さ扛るガラス
膜の欠落ならびに膜厚のばらつきが激減することを見出
したことに基いてなさnたものである。
The present invention eliminates all the disadvantages of the conventional glass film electrodeposition method described above, and provides a method that makes it possible to form a glass film with no missing parts and extremely little variation in film thickness. In a study aimed at eliminating inconveniences in glass film formation using the electrodeposition method, we found that if the polarity of the applied voltage was reversed at least once during electrophoresis, the resulting glass film would be missing and the film thickness would be reduced. This was based on the discovery that the variation in

なお、電気泳動中に印加電圧の極性を反転させることに
より、ガラス膜質が飛躍的に向上する理由は、以下のよ
うなものと考えら扛る。
The reason why the quality of the glass film is dramatically improved by reversing the polarity of the applied voltage during electrophoresis is thought to be as follows.

第1に、電着中に半導体基体上へ捕獲さnたガスの消失
である。fZわち、ガラス粒子懸濁液中のガラス粒子は
、液中に添加さnる微量の電解質によって正もしくに負
のいず牡かに帯電しており、こ才tが電圧剛力11によ
って半導体基体上に引き寄せら扛、ガラス膜が形成さn
ることばすでにのべたところである。ところで、懸濁液
中には水素イオンなどの可動イオンが多数存在しており
、こ扛がガラス粒子と同様に液中全移動する。このイオ
ンが)1″導体基体」−で中性ガス化し、半導体基体上
の形状等に依存して捕獲さnると、この部分へのガラス
粒子の付着が妨げらnl ガラス膜の欠落の発生かもた
らさnるところとなるが、印加電圧の極性を反転させる
と、電気泳動の方向がこの極性反転の期間にわたり逆転
し、このことによって捕獲さnていたガスが半導体基体
上から液中へ解放さnlこののちのガラス粒子の電着が
正常化さ扛ることである。
First is the loss of gas trapped onto the semiconductor substrate during electrodeposition. fZ In other words, the glass particles in the glass particle suspension are charged either positively or negatively by a small amount of electrolyte added to the liquid, and the voltage t is A glass film is formed on the semiconductor substrate.
The words have already been said. By the way, there are many mobile ions such as hydrogen ions in the suspension, and these mobile ions move throughout the liquid in the same way as glass particles. When these ions turn into a neutral gas on the conductive substrate and are captured depending on the shape of the semiconductor substrate, adhesion of glass particles to this area is hindered, resulting in the occurrence of glass film breakage. However, when the polarity of the applied voltage is reversed, the direction of electrophoresis is reversed over the period of this polarity reversal, thereby releasing the captured gas from above the semiconductor substrate into the liquid. After this, the electrodeposition of glass particles becomes normal.

第2は、半導体基体表面の汚染に基く部分的不活性状態
が解除されることである。すなわち、半導体基体はガラ
ス電着に先だって清浄化さnる。
The second is that the partial inactive state caused by contamination on the surface of the semiconductor substrate is released. That is, the semiconductor substrate is cleaned prior to glass electrodeposition.

しかしながらこの清浄化の処理が不十分であると半導体
基板上に汚染物質が残留し、部分的に不活性な面状態を
呈するところとすり、ガラス粒子の付着を妨げらnるが
、上記のように印加電圧の極性全反転させると、部分的
不活性状態が電気的に活性化さtl したがって、ガラ
ス粒子の付着が容易になることである。
However, if this cleaning process is insufficient, contaminants may remain on the semiconductor substrate, resulting in a partially inert surface and preventing the adhesion of glass particles. By fully reversing the polarity of the voltage applied to tl, the partially inactive state becomes electrically activated, thus facilitating the adhesion of glass particles.

こnらの理由によって、ガラス膜の欠落の排除と膜厚の
均一化がぽからrるものと推考さnる。
It is assumed that for these reasons, it is possible to eliminate defects in the glass film and to make the film thickness uniform.

以下に第3図全参照して不発明の方法について説明する
The inventive method will now be described with full reference to FIG.

第3図は、不発明のガラス被膜の形成方法を可能にする
ガラス電着装置の構成を示す図であり、図示するように
、直流電源5の接続が連動切換スイッチ14と15を介
して白金板3と半導体基板4に接続さtた構成となって
いる。¥なわち、連動ta換スイッチ14と15がa側
接点を選択していると、直流電源5の■側端子が半導体
基板4に、○側端子が白金板3に接続さnる。一方、b
側接点を選択したときには白金板と半導体基板への直流
電源の接続関係がa 1lIilj接点の選択時とは逆
になる。このように、連動切換スイッチ14と15の接
点の選択で電極間への印加電圧の極性を反転させること
ができる。
FIG. 3 is a diagram showing the configuration of a glass electrodeposition apparatus that enables the uninvented method of forming a glass film. It has a configuration in which it is connected to a plate 3 and a semiconductor substrate 4. That is, when the interlocking TA switching switches 14 and 15 select the a side contact, the ■ side terminal of the DC power supply 5 is connected to the semiconductor substrate 4, and the o side terminal is connected to the platinum plate 3. On the other hand, b
When the side contact is selected, the connection relationship of the DC power supply to the platinum plate and the semiconductor substrate is reversed from when the a1lIilj contact is selected. In this way, the polarity of the voltage applied between the electrodes can be reversed by selecting the contacts of the interlocking changeover switches 14 and 15.

次に、実施例を示して本発明のガラス被膜の形成方法を
説明する。
Next, the method for forming a glass coating according to the present invention will be described with reference to Examples.

純度の高いメチルアルコールに鉛系ガラス(たとえば米
国イノデック社製IP760)’x169/1の割合で
分散させるとともに、ガラス粒子に電荷をもたせるため
の電解質として微量の塩化アルミニウム(AlCl5 
) ’l:添加してよく攪拌し、ガラス粒子懸濁液を形
成する。このガラス粒子懸濁液を第3図で示した電解液
として容器1に満たし、この中へ一方の電極である白金
板3と他方の電極である半導体基板4とを約15馴の間
隔を付与して対向させて浸漬したのち、30Vの直流電
圧を印加して電着を行う。この電着の処理時間は約40
秒に設定し、しかも、この電着処理の間に1回、印加電
圧の極性を短時間(約0.5秒)反転させた。
Lead-based glass (for example, IP760 manufactured by Inodec Corporation, USA) is dispersed in high purity methyl alcohol at a ratio of 169/1, and a trace amount of aluminum chloride (AlCl5) is added as an electrolyte to charge the glass particles.
) 'l: Add and stir well to form a glass particle suspension. This glass particle suspension is filled into a container 1 as an electrolyte as shown in FIG. After immersing the substrates in such a manner that they face each other, electrodeposition is performed by applying a DC voltage of 30V. The processing time for this electrodeposition is approximately 40
seconds, and the polarity of the applied voltage was briefly (approximately 0.5 seconds) reversed once during this electrodeposition process.

なお、ガラス膜を形成する半導体基板としては、構造が
第2図で示した構造とさ牡、N型コレクタ層とN型工く
ツタ層の表面不純物濃度が1×1020/C711−3
、N型コレクタ層の比抵抗が50Ω−cm、  P型ベ
ース層の表面不純物濃度が5×10” ’ /crtr
6、N+型コレクタ層、N型コレクタ層ならびにP型ベ
ースの厚みがそ扛ぞfi120μm、50μmならびに
30μn2、そしてメサ溝の幅が200μ7J深さが7
0μ?n に設定さnた三重拡散形NPNメサトランジ
スタを用いた。
Note that the semiconductor substrate on which the glass film is formed has a structure similar to that shown in FIG.
, the specific resistance of the N-type collector layer is 50Ω-cm, and the surface impurity concentration of the P-type base layer is 5×10''/crtr.
6. The thickness of the N+ type collector layer, the N type collector layer, and the P type base are 120 μm, 50 μm, and 30 μn2, and the width of the mesa groove is 200 μm, 7J, and the depth is 7.
0 μ? A triple diffused NPN mesa transistor set to n was used.

第4図は、電着処理後の状態を示す図であり、図示する
ようにメサ溝11の内面には欠落部のないガラス層12
が形成さnる。ところで、このようにして形成さnたガ
ラスは、単に分子間引力でメサ溝の内面に付着している
にすぎない。このため、焼成処理全施し、安定なガラス
被膜とする必要がある。この処理に、例えば酸素と窒素
との混合雰囲気中69o℃、10分間の条件で十分であ
る。尚、第4図において、第2図と同一番号は同一部分
を示す。
FIG. 4 is a diagram showing the state after the electrodeposition process, and as shown in the figure, there is a glass layer 12 with no missing parts on the inner surface of the mesa groove 11.
is formed. By the way, the glass thus formed is merely attached to the inner surface of the mesa groove by intermolecular attraction. Therefore, it is necessary to perform a complete firing process to obtain a stable glass coating. For example, a condition of 69° C. for 10 minutes in a mixed atmosphere of oxygen and nitrogen is sufficient for this treatment. In FIG. 4, the same numbers as in FIG. 2 indicate the same parts.

第5図、第6図および下表は、本発明の効果確認のため
の比較実験結果を示すもので、試料は諸条件ヲ−に記の
実施例通りとした不発明の方法と、印加電圧の極性反転
にせず、他の諸条件は全て不発明の方法と同じとした従
来の方法で作成した。
Figures 5 and 6 and the table below show the results of comparative experiments to confirm the effects of the present invention. It was created using the conventional method, without reversing the polarity of , and keeping all other conditions the same as the uninvented method.

表         n=100 第6図はガラス膜厚のばらつきを示す図であり、両方法
で形成さ扛たガラス膜の厚さの平均値にほぼ19μmで
あったが、従来法では、薄い方向へ大きくばらついてい
る。
Table n=100 Figure 6 shows the variation in glass film thickness. The average thickness of the glass films formed by both methods was approximately 19 μm, but with the conventional method, the thickness was significantly larger in the thinner direction. It varies.

第6図は、エミッタ開放時のコレクタベース間耐圧(V
CBO)のばらつuk示す図であり、両方法で形成さn
たVCBOの平均値に約900vであったが、従来法で
形成したものでは低い方へ大きくばらついている。
Figure 6 shows the collector-base breakdown voltage (V
Figure 2 shows the variation of CBO) formed by both methods.
The average value of the VCBO was about 900V, but the values of the VCBO formed by the conventional method varied greatly toward the lower side.

また、上表は、400Vの逆電圧をコレクタベース間に
連続的に印加し、時間の経過にともなう不良発生個数を
示す表であり、不発明の方法でガラス膜を形成したトラ
ンジスタでは、2000時間を経過しても不良発生に皆
無であった。
Furthermore, the table above shows the number of defects that occur over time when a reverse voltage of 400V is continuously applied between the collector and the base. There were no defects even after this period.

以上詳しく説明したように、不発明の方法によnは、膜
厚が比較的均一で、欠落のないガラス被膜孕半導体基体
上へ選択的に形成することができ、半導体装置の特性、
信頼性を著るしく高める効果が奏される。
As explained in detail above, by the method of the invention, n can be selectively formed on a semiconductor substrate having a glass coating with a relatively uniform film thickness and no chipping, and the characteristics of the semiconductor device can be improved.
This has the effect of significantly increasing reliability.

なお、不発明の方法の特徴である開力1電圧の極1’I
反転の回数であるが、この回数の増加につ、+1でガラ
ス膜の欠損ならびに膜厚のばらつきに対する改善効果が
犬となるが、10回を超えると改善効果が飽和する傾向
全示し、逆に、所定の膜厚を得るに要する電着処理時間
が長くなり作業能率の低下の問題が表面化する。したが
って、印加電圧の極性反転回数の設定に際してに、上記
の効果と作業能率との双方を考慮して回数を設定すわば
よい。
In addition, the opening force is 1 voltage pole 1'I, which is a feature of the uninvented method.
Regarding the number of reversals, as the number of reversals increases, the improvement effect on glass film defects and film thickness variations becomes worse at +1, but when it exceeds 10 times, there is a tendency for the improvement effect to be saturated, and vice versa. , the electrodeposition process time required to obtain a predetermined film thickness increases, leading to the problem of reduced work efficiency. Therefore, when setting the number of times of polarity reversal of the applied voltage, it is sufficient to set the number of times in consideration of both the above effect and work efficiency.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、ガラス電着法の従来例を説明するための図、
第2図は、従来のガラス電着法でガラス膜を形成した状
態を示す図、第3図は、不発明にかかるガラス被膜の形
成方法を可能にするガラス電着装置の構成を示す図、第
4図に、不発明の方法でガラ艮被膜を形成した状態を示
す図、第5図および第6図に本発明の方法の効果確認実
験の結果を示す図である。 1・・・・・・容器、2・・・・・・電解液、3・・・
・・・白金板、4・・・・・・半導体基板、5・・・・
・・直流電源、6・・・・・・N+梨型コレク層、7・
・・・・・N型コレクタ層、8・・・・・・P型べ11
・・・・・・メサ溝、12・・・・・・ガラス膜、13
・・・・・・欠落部、14.15・・・・・・切換スイ
ッチ。 代理人の氏名 弁理士 中 尾 敏 男 は刀へ1名第
1図 第 2 図 第 4 図 第5図 第6図
FIG. 1 is a diagram for explaining a conventional example of glass electrodeposition method,
FIG. 2 is a diagram showing a state in which a glass film is formed by a conventional glass electrodeposition method, and FIG. 3 is a diagram showing the configuration of a glass electrodeposition apparatus that enables the method of forming a glass film according to the invention. FIG. 4 is a diagram showing a state in which a snail coating was formed by the method of the present invention, and FIGS. 5 and 6 are diagrams showing the results of an experiment to confirm the effect of the method of the present invention. 1... Container, 2... Electrolyte, 3...
...Platinum plate, 4...Semiconductor substrate, 5...
...DC power supply, 6...N+pear-shaped collection layer, 7.
...N type collector layer, 8...P type be 11
......Mesa groove, 12...Glass membrane, 13
...... Missing part, 14.15... Changeover switch. Name of agent: Patent attorney Toshio Nakao (1 person) Figure 1 Figure 2 Figure 4 Figure 5 Figure 6

Claims (1)

【特許請求の範囲】 ガラス粒子を懸濁させた電解液中へ一方の電極となる電
極体と他方の電極となる半導体基板を対導 回させて浸漬するとともに、両電極間に直流電圧を印加
し、i’+fJ記ガラス粒子を電気泳動させ、同ガラス
粒子を前記半導体基板上へ電着させガラス被膜を形成す
るにあたり、前記直流電圧の印加中に少くとも1回印加
電圧の極性を反転させ次いで復帰させること全特徴とす
る半導体基板上へのガラス被膜の形成方法。
[Claims] An electrode body serving as one electrode and a semiconductor substrate serving as the other electrode are immersed in an electrolytic solution in which glass particles are suspended, and a DC voltage is applied between the two electrodes. When electrophoresing the glass particles of i′+fJ and electrodepositing the glass particles onto the semiconductor substrate to form a glass film, the polarity of the applied voltage is reversed at least once during the application of the DC voltage. A method for forming a glass film on a semiconductor substrate, which is characterized in that it is then restored.
JP57119463A 1982-07-08 1982-07-08 Forming method for glass coating onto semiconductor substrate Pending JPS599930A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57119463A JPS599930A (en) 1982-07-08 1982-07-08 Forming method for glass coating onto semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57119463A JPS599930A (en) 1982-07-08 1982-07-08 Forming method for glass coating onto semiconductor substrate

Publications (1)

Publication Number Publication Date
JPS599930A true JPS599930A (en) 1984-01-19

Family

ID=14761967

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57119463A Pending JPS599930A (en) 1982-07-08 1982-07-08 Forming method for glass coating onto semiconductor substrate

Country Status (1)

Country Link
JP (1) JPS599930A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014175389A (en) * 2013-03-07 2014-09-22 Mitsubishi Materials Corp Method of forming alumina insulation film

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5354218A (en) * 1976-10-27 1978-05-17 Nippon Electric Co Method of forming glsss protective film

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5354218A (en) * 1976-10-27 1978-05-17 Nippon Electric Co Method of forming glsss protective film

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014175389A (en) * 2013-03-07 2014-09-22 Mitsubishi Materials Corp Method of forming alumina insulation film

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