JPS5996718A - Manufacture of thin film semiconductor - Google Patents
Manufacture of thin film semiconductorInfo
- Publication number
- JPS5996718A JPS5996718A JP57207376A JP20737682A JPS5996718A JP S5996718 A JPS5996718 A JP S5996718A JP 57207376 A JP57207376 A JP 57207376A JP 20737682 A JP20737682 A JP 20737682A JP S5996718 A JPS5996718 A JP S5996718A
- Authority
- JP
- Japan
- Prior art keywords
- gas
- thin film
- silicon
- hydrogen
- torr
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Light Receiving Elements (AREA)
- Photoreceptors In Electrophotography (AREA)
- Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
Abstract
Description
【発明の詳細な説明】
本発明（Ｊシリコンからなる薄膜半導体の２４！造方法
に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a thin film semiconductor made of J silicon.
水素を含む非晶質シリコン膜Ｇ−Ｊ 、、高い光導電性
、優れた耐熱性、高い表面硬度を有し、優ねた電子写真
用感光体として期待されている。しかし−通常の方法で
作られた膜Ｇｊ暗低抵抗率１０１０Ωαと低（０ａｒｌ
ｓｏｎ法による電荷潜像の形成に（ｊ不適当であった。The hydrogen-containing amorphous silicon film G-J has high photoconductivity, excellent heat resistance, and high surface hardness, and is expected to be an excellent electrophotographic photoreceptor. However, - the film Gj made by the usual method has a dark low resistivity of 1010Ωα and a low (0arl
(j was unsuitable for forming a charge latent image by the SON method.
そこで、高い光導電性を損なうことなく、暗抵抗率を増
加させるためにいくつかの方法が提案されている。例え
ば、５ｉＨｊガス中に微量のＢ２ Ｈｇガス及び０□ガ
スを導入し、グロー放電法で非晶質シリコン膜を堆積さ
せる方法、ＳｉＨ４ガス中にＮ２を混合してグロー放電
法で非晶質シリコン膜を堆積させる方法などが行なわわ
ている。Therefore, several methods have been proposed to increase dark resistivity without sacrificing high photoconductivity. For example, a small amount of B2 Hg gas and 0□ gas are introduced into 5iHj gas and an amorphous silicon film is deposited by a glow discharge method, or an amorphous silicon film is deposited by a glow discharge method by mixing N2 into SiH4 gas. Methods such as depositing films are being used.
しかしながらこれらの方法でＣｊ２ｊ能的に【ｊ優ねた
非晶質シリコン膜を得ることＧｅ！できるが、膜の成長
速度が通常１００−数百λ／ ｍ ｉ ｎと遅く、電子
写真感光体として必要な膜厚（２０μｍ以Ｄを得るため
に−極めて長時間を有し、生産性が悪いという欠点を有
している。However, with these methods, it is possible to obtain an amorphous silicon film with excellent Cj2j performance. However, the film growth rate is usually as slow as 100 to several hundred λ/min, and it takes an extremely long time to obtain the film thickness required for an electrophotographic photoreceptor (20 μm or more), resulting in poor productivity. It has the following drawbacks.
そこで本発明Ｇｊ ％高い光導電性を有し、かつ暗抵抗
率が高く高速成長可能な電子写真感光体として有用な非
晶質シリコン膜からなる薄膜半導体の気された真空室内
に／ Ｘ ／ ０−” トールからＪ Ｘ １０−’
トールの範囲の分圧を有する様に水素ガスと酸素ガスの
混合ガス或い＆ｊ水素ガスと望素ガスの混合ガスを導入
し、該導入ガスと、シリコンを加熱蒸発することにより
得られるシリコン単原子とに加速電子を衝突させて電離
若しく（コ解ｔさせ、かくして生成したガスイオン及び
シリコンイオン１０電界効果によって高エネルギーを付
加させて基材上しこ射突させることによりシリコンＩＦ
を形成させ、更１こ該薄膜を水素プラズマ中で熱処理す
ることを要旨としている。Therefore, in the present invention, a thin film semiconductor made of an amorphous silicon film, which has high photoconductivity, high dark resistivity, and is useful as an electrophotographic photoreceptor that can be grown at high speed, is placed in a vacuum chamber. -” Thor to J X 10-'
A mixed gas of hydrogen gas and oxygen gas or a mixed gas of hydrogen gas and hydrogen gas is introduced so as to have a partial pressure in the range of Torr, and the introduced gas and silicon monomer obtained by heating and evaporating silicon are mixed. Silicon IF is created by colliding accelerated electrons with atoms to cause ionization or decomposition, and by adding high energy to the thus generated gas ions and silicon ions by an electric field effect and causing them to bombard onto the base material.
The gist is to form a thin film, and then heat-treat the thin film in hydrogen plasma.
以Ｆ１本発明方法を詳述する。第１図及び第２図ＧＪ本
発明方法を実施するための装置を示す。第１図において
、（ＩＨ−ｊ真空槽で、非晶質シリコン薄膜を得るため
のものである。この槽（１）内に形成された真空室＋２
１ ＧＪ排気口（３）に連結された排気系装置（図示さ
ねていない）！こより／ Ｘ ／ ０−６までの高真空
１こ胡気されることが可能になっており、そして真空室
（２目こ（ｊ電子ビーム蒸発源（４）（電源回路等に図
示さねていない）、ループ状のガス導入管（５）、電子
発生装置（６）、基材ホルダー（７）及びそｆ＋ ｉ、
：取付けらねた基材（８）が設置されている。真腋槽（
１）の外方１こ（Ｊ１電子発生装ｆｋ Ｉｉ ！ＩＪ作
させるだめの電源［９） ０．０）及びその回ｆ各、基
材ホルダーに電圧を印加するため電源（１１）及びその
回路、ループ状ガス導入管＋５１ ）、：バルブ（ロ）
）〜０→により流量Ｎ節μ」能に接続された水素、酸素
或いｃｅｌ窒素が充填されたボン”＜ ０５） （＋６
）が設置さねている。第２図Ｇｊ ％第１図の装置で形
成されたシリコン薄膜をプラズマ処理するためのもので
ある。真空ｗＪＱυ内の真空室＠＋Ｊ排気口（ハ）に連
結された排気系装置（図示さねていない）によって／×
１０−６トールまでの高真空に排気されることが可能に
なっており、真空室＠１こ（ｊガス導入管■、プラズマ
発生のための電極（■（１）、シリコン薄膜が蒸着され
た基材（イ）及び基材（５）を加熱するためのヒーター
＠（電源等＆ｊ図示されていない）が段置されている。The F1 method of the present invention will be described in detail below. FIGS. 1 and 2 GJ show an apparatus for carrying out the method of the invention. In Fig. 1, it is an IH-j vacuum chamber for obtaining an amorphous silicon thin film.
1 Exhaust system device (not shown) connected to GJ exhaust port (3)! It is possible to carry out a high vacuum of up to ), loop-shaped gas introduction pipe (5), electron generator (6), substrate holder (7), and
: The base material (8) to be attached is installed. True axillary tank (
1) Outer one (J1 electronic generator fk Ii ! Power source for IJ production [9) 0.0) and each time f, a power source (11) and its circuit for applying voltage to the substrate holder , loop gas inlet pipe +51), :valve (b)
)～0→The cylinder filled with hydrogen, oxygen or cel nitrogen is connected to the flow rate N<05) (+6
) has not been installed. FIG. 2 Gj % This is for plasma processing the silicon thin film formed by the apparatus shown in FIG. /× by the exhaust system device (not shown) connected to the vacuum chamber @+J exhaust port (c) in the vacuum wJQυ
It is now possible to evacuate to a high vacuum of up to 10-6 Torr, and the vacuum chamber is equipped with a gas inlet tube (1), an electrode for plasma generation (1), and a silicon thin film deposited on it. Heaters @ (power supply, etc. &j not shown) for heating the base material (a) and the base material (5) are arranged in stages.
真空槽Ｑυの夕［方にＩｊ、プラズマを発生させるため
の電源翰と、ガス導入管（ハ）に、バルブ（至）シこよ
り流新調＃…能に接続された水素が充填されたボンベ０
〃が設置されている。On the evening side of the vacuum tank Qυ is Ij, a power supply wire for generating plasma, a cylinder filled with hydrogen connected to the gas introduction pipe (c), and a new flow from the valve (to).
〃 has been installed.
基材（８）として（：１１材質、形状共しこ特に限定さ
れるものでなく、高分子材料、セラミック材狙或いＧｊ
金属材料のいづわでも良く、形状もフィルム状、薄板状
或いＧｊドラム状のものであっても良い。As the base material (8) (:11, the material and shape are not particularly limited, and polymeric materials, ceramic materials, or Gj
It may be made of metal material, and may have a film-like, thin-plate-like, or Gj-drum-like shape.
また、第１文の蒸着装置と第２図のプラズマ装置＆ｊ１
゛必ずしも別々の真至槽である必要（ｊなく、開閉シャ
ッター等で分離された２つの真空室を有する同一の真空
槽であってもよく、こうすることにより、蒸着プロセス
７Ｊ）らプラズマ処理プロセスへ真空を破ることなく移
ることができる。In addition, the vapor deposition device in the first sentence and the plasma device in Figure 2 &j1
``They do not necessarily have to be separate vacuum chambers (they may be the same vacuum chamber with two vacuum chambers separated by an opening/closing shutter, etc., and by doing so, the plasma treatment process can be moved to without breaking the vacuum.
第１図及び第２同条こ示される装置を一用いて薄膜半導
体を製造するにｉ：Ｊｓ基材（８）を基材ホルダー（７
）に取り付け、電子ビーム蒸発源（４）にシリコンを供
給し、次いで排気口（３）から排気を行ない、真空室（
２）を／ Ｘ ／ ０” トール以下の高真空となし
、ｇ空度が安定した所でループ状のガス導入管（５）よ
り、バルブ（Ｌ２）〜＠）を調節しながら水素と酸素或
い（ｊ水素と窒素の混合ガスを、分圧が／×１０−５ト
ールがらｓ×ｉｏ’ トールの範囲になる様導入する
。ここで、混合ガスの容量の割合０ゴ、水素／、０【こ
対し酸素或い（ゴ智素が０．０７ないし０．５であるの
が好ましい。1 and 2. In manufacturing a thin film semiconductor using the apparatus shown in FIG.
), supply silicon to the electron beam evaporation source (4), then exhaust from the exhaust port (3) to create a vacuum chamber (
2) to a high vacuum of less than / (j) A mixed gas of hydrogen and nitrogen is introduced so that the partial pressure ranges from /x10-5 torr to sxio' torr.Here, the volume ratio of the mixed gas is 0g, hydrogen/,0 [On the other hand, it is preferable that the amount of oxygen or oxygen is 0.07 to 0.5.
次いで、電子ビーム蒸発源（４）を動作させてシリコン
を蒸気化させ、該シリコンの原子状粒子と導入された混
合ガスを電子発生装置（６）からの高速電子９こより電
離若しくＧ：ｌ解！せしめてイオン化させる。尚、電子
発生装置＋６１Ｇｊ、フィラメント（６１）、メツシュ
状電諷＃３罎、ガード電極６つから構成されており、電
源ｔｌＯ） ）こより負の直流電位を与えられたフィラ
メント（６１）に電源（９）により交流電流を通電し加
熱せしめ熱電子を発生させると共Ｆこメツシュ状電極−
を接地することにより上記熱電子を電界加速させて高速
電子を発生する様になっている。Next, the electron beam evaporation source (4) is operated to vaporize the silicon, and the silicon atomic particles and the introduced mixed gas are ionized or G:l by high-speed electrons from the electron generator (6). Solution! At least ionize it. It is composed of an electron generator +61Gj, a filament (61), a mesh-like electric wire #3, and six guard electrodes. 9), an alternating current is applied to generate heat and thermionic electrons, and the F-shaped mesh electrode is heated.
By grounding, the hot electrons are accelerated by an electric field to generate high-speed electrons.
前記の如くしてイオン化されたガスイオン及びシリコン
イオンに対し、基材ホルダー（７）に′准源（］■）に
より負の直流電圧を印加することで高エネルギーを付与
し、基材（８）の表面をこ入射せしめかくして薄膜半導
体である非晶質シリコン薄膜を形成させる。ここで高エ
ネルギーとして【Ｊ運動エネルギーが常温において／
ＱｏＶから５ Ｋ ｅ Ｖまでの範囲であり、好ましく
Ｇ；１１００ｅｖ から２ ＫｅＶ である次１こ
非晶質シリコン薄膜が形成さねた基材を真空室（イ）の
電＃ｌｊ（イ）上１こ配置し、排気ロハヤから／×／σ
５トール以下の高真空【こ排気する。真空室（イ）の貞
空度が安定してから、ガス導入管（ハ）よりバルブ（ト
）を４３節しながら水素ガスを分圧０．ｌトールからＳ
トールの範囲シこなる様導入する。次いで電漣一番こよ
り電極稗と電極輪の間に直流電界を生じゼしめプ、ラズ
マを発生させる。この時印加させる電圧として＋＊ ｓ
ｏ ｏ ｖから３ＫＶであるのが好ましい。High energy is imparted to the gas ions and silicon ions ionized as described above by applying a negative DC voltage to the substrate holder (7) using a quasi-source (]■). ) to form an amorphous silicon thin film which is a thin film semiconductor. Here, as a high energy [J kinetic energy at room temperature/
QoV ranges from 5 K e V, preferably G: 1100 ev to 2 KeV. Next, the substrate on which the amorphous silicon thin film has been formed is placed on voltage #lj (A) in a vacuum chamber (A). Place one and start /×/σ from the exhaust lohaya
Evacuate to a high vacuum of 5 torr or less. After the vacancy of the vacuum chamber (A) becomes stable, hydrogen gas is introduced into the gas introduction pipe (C) at a partial pressure of 0. l tall to S
Introducing Thor's range. Next, a direct current electric field is generated between the electrode shaft and the electrode ring from the first part of the electric wire, generating a zephrup and a lasma. The voltage to be applied at this time is +*s
Preferably it is 3KV from o ov.
また、プラズマ処理中、基材＠＆ｊヒーター＠【こよっ
てｉｏｏ”ｃからｓ００℃までの恥囲の湿度に保たれて
いる。かくして、特性の優ねた薄膜半導体を得る。Further, during the plasma treatment, the base material @ & j heater @ [Thus, the humidity is maintained at an ambient temperature from ioo'c to s00°C.Thus, a thin film semiconductor with excellent characteristics is obtained.
第１．２図シこ示した装置を用いてシリコン薄膜を形成
する具体例を次に記す。A specific example of forming a silicon thin film using the apparatus shown in FIG. 1.2 will be described below.
第１図に示される装置を用い、高純度シリコン塊（ワタ
、９９９９％以上）を電子ビーム蒸発源（４）に人ね、
基材（８）としてガラス板（米国コーニング社製７０Ｓ
９ガラス）を用い、基材ホルダー（７）１こ取り付は下
記の条件で基材（８）の表面１こ厚さ２μｍの蒸着層を
形成させた。Using the apparatus shown in Fig. 1, a high-purity silicon block (wat, 9999% or more) is exposed to an electron beam evaporation source (4).
A glass plate (70S manufactured by Corning, USA) was used as the base material (8).
A vapor deposition layer having a thickness of 2 μm was formed on the surface of the substrate (8) under the following conditions when attaching one substrate holder (7) using a glass substrate (No. 9 glass).
混合ガス導入前の圧力 ： ２×７０” トール水
素と酸素の混合比 ： ｉ：ｏ、ｏｓ混合ガスの分圧
−７×／び５ ｃ−ルイオン化電圧： ３００Ｖ
イオン化屯流： ２００ｍＡ
イオン加速電圧： ３００ｖ
基材の湿度 ： 、！ＳＯ°Ｃ
蒸ＭＷ度 ： 、２ｏｏｏ＾／ ｍ ｉ ｎかく
して得られたシリコン薄膜を、第２図に示される装置を
用いて下記の条件でプラズマ処理を行った。Pressure before mixed gas introduction: 2 x 70" Mixing ratio of hydrogen and oxygen: i: o, os Partial pressure of mixed gas -7 x/5 c-Ionization voltage: 300V Ionization current: 200mA Ion acceleration voltage : 300v Humidity of substrate: ,!SO°C Evaporation MW degree: ,2oooo^/min The silicon thin film thus obtained was subjected to plasma treatment under the following conditions using the apparatus shown in FIG. .
水素導入前の圧力 ： ２×１０” トール水素分
圧 ：（７，，２）−ル
印加電圧 ： ／ＫＶ
放電電流 ： ５ｍ人
基材の湿度 ： ３００°Ｃ
処理時間 ： ３０分
かくして得られたシリコン薄膜をｘ腺［口１折で解析し
た結果非晶質であり、特性ＧＪ ’Ｆ ＆！のｉ車りで
あった
暗抵抗率 ：ｇ×１０１４Ωα
光照射下での抵抗率 −乙Ｘ１０１°Ωａｎ（照射条件
：Ｈｅ−Ｈｅレーザー３００ ＩＩＷ／ＣｆｆＬ’）
〔比較例／〕
具体例／と同一の条件で厚さ２μｍの蒸着層？を形成さ
せ、プラズマ処理を行なわなしＡで、特性を調べた所Ｆ
記の通りであった。Pressure before hydrogen introduction: 2×10” Torr hydrogen partial pressure: (7,,2)-le Applied voltage: /KV Discharge current: 5m Humidity of human base material: 300°C Processing time: Obtained after 30 minutes The silicon thin film was analyzed by folding it into an x-ray, and it was found to be amorphous, with the characteristics GJ 'F &! Ωan (irradiation conditions: He-He laser 300 IIW/CffL')
[Comparative example/] A 2 μm thick vapor deposited layer under the same conditions as the specific example/? was formed and the characteristics were investigated in A without plasma treatment.F
It was as written.
暗抵抗率 二よ×ｌ０１１Ωα
光照射下での抵抗率 二 乙×１０９Ωｍ〔具体例！〕
混合ガスを水素と窒素（混合比／：０．２＞ に貧え
、具１ぐ例／と同一の条件で蒸着及びプラズマ処理を行
なった。膜厚２μｍ の試料をＸ線回折で？１析した結
果非晶質で、特性ｆ：ｊ下記の通りであった。Dark resistivity 2×l011Ωα Resistivity under light irradiation 2×109Ωm [Specific example! ] The mixed gas was hydrogen and nitrogen (mixing ratio /:0.2>), and evaporation and plasma treatment were performed under the same conditions as Example 1.A sample with a film thickness of 2 μm was analyzed by X-ray diffraction. As a result of analysis, it was found to be amorphous, and the characteristics f:j were as follows.
暗抵抗率 ： ３Ｘ１０１３Ωｍ
光照射下での抵抗率 ：２Ｘ１０”Ωα〔比較例２〕
具体例２においてプラズマ処理を行なわなし）薄膜の特
性（コ下記の通りであった。−暗抵抗率： 乙×１０１
０ΩＯマ
光照射Ｆの抵抗率 二 ８×１０１０ΩＣ″Ｉｎ以上説
明したよう（こ本発明方法！ｊ１シリコン薄膜を高遼吸
４長で作成した後水素プラズマ中で熱処理するものであ
るから、ダングリングボンドを著しく減少させることが
でき、光照射シこより抵抗率が著しく下るという鈍ねた
特性を有するシリコン薄膜を得ることができるのである
。従って本発明の方法によりば鮎単に高品質の薄膜半導
体を得ることができ、特に電子写真感光体のｔＪｌ！造
に好逆である。Dark resistivity: 3×1013Ωm Resistivity under light irradiation: 2×10”Ωα [Comparative Example 2] In Specific Example 2, no plasma treatment was performed) Characteristics of the thin film (The characteristics were as follows. - Dark resistivity: Otsu× 101
0ΩO resistivity of light irradiation F 2 8×1010ΩC″In As explained above (this is the method of the present invention!j1 Since the silicon thin film is created with high absorption 4 length and then heat treated in hydrogen plasma, dangling It is possible to significantly reduce the amount of bond and obtain a silicon thin film with dull characteristics such that the resistivity is significantly lower than that obtained by light irradiation.Therefore, the method of the present invention makes it possible to easily produce high quality thin film semiconductors. This is particularly advantageous for the tJl! structure of electrophotographic photoreceptors.
第１図Ｇｊ非晶質シリフン薄膜を得るための装置の構成
図、第２図（ゴシリコン薄膜をプラズマ処理するための
装置の構成園である。
（イ）・・・真空室 ＋８１１ンの・・・基材特許
串腋１人 稍水化学工業株式会社代表者 第沼基利Figure 1 shows the configuration of an apparatus for obtaining amorphous silicon thin film, and Figure 2 shows the configuration of an apparatus for plasma processing a silicon thin film. (a) Vacuum chamber +811...・Base material patent Kushiwaki 1 person: Kensui Chemical Industry Co., Ltd. Representative Motoshi Dainuma
Claims (1)
内に／×１０１トールからｌＸ１０−’ トールの範
囲の分圧を有する様に水素ガスと酸素ガスの混合ガス或
いＧｊｊ素ガスと窒素ガスの混合ガスを導入し、該導入
ガスと、シリフンを加熱蒸発することシこより得られる
シリコン単原子とに加′ｆＡＡ電子を衝突させて電離若
しく輻解離させ、かくして生成したガスイオン及びシリ
コンイオンに電界効果によって高エネルギーを付与させ
て基材上条こ射突させることによりシリコン薄膜を形成
させ、更に該薄膜を水素プラズマ中で熱処理することを
特徴とする薄膜半導体の製造方法。 ２）混合ガスρ容景の割合が水素／、０をこ対し酸素或
いは窒素が０．０／ないしＯｏｊであることを特徴とす
る特許請求の範囲第１項に記載の薄膜半導体の製造方法
。[Claims] 1) High vacuum of IO-6 Torr or less [A mixed gas of hydrogen gas and oxygen gas such that the evacuated vacuum chamber has a partial pressure in the range of /×101 Torr to 1×10−' Torr. Alternatively, a mixed gas of Gjj element gas and nitrogen gas is introduced, and the introduced gas and silicon monoatoms obtained by heating and evaporating silicon are collided with added fAA electrons to cause ionization or radiation dissociation, A thin film characterized in that a silicon thin film is formed by imparting high energy to the gas ions and silicon ions thus generated by an electric field effect and causing them to collide on a substrate, and then heat-treating the thin film in hydrogen plasma. Semiconductor manufacturing method. 2) The method for manufacturing a thin film semiconductor according to claim 1, characterized in that the ratio of the mixed gas ρ volume is hydrogen/0 to 0.0/0 to oxygen or nitrogen.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57207376A JPS5996718A (en) | 1982-11-25 | 1982-11-25 | Manufacture of thin film semiconductor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57207376A JPS5996718A (en) | 1982-11-25 | 1982-11-25 | Manufacture of thin film semiconductor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5996718A true JPS5996718A (en) | 1984-06-04 |
Family
ID=16538697
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57207376A Pending JPS5996718A (en) | 1982-11-25 | 1982-11-25 | Manufacture of thin film semiconductor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5996718A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5436035A (en) * | 1991-12-05 | 1995-07-25 | Alusuisse-Lonza Services Ltd. | Coating a substrate surface with a permeation barrier |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56138916A (en) * | 1980-03-31 | 1981-10-29 | Fujitsu Ltd | Formation of amorphous thin film |
| JPS577116A (en) * | 1980-06-16 | 1982-01-14 | Matsushita Electric Ind Co Ltd | Manufacture of amorphous silicon thin film |
| JPS5754930A (en) * | 1980-09-20 | 1982-04-01 | Minolta Camera Co Ltd | Exposure controlling circuit of camera |
-
1982
- 1982-11-25 JP JP57207376A patent/JPS5996718A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56138916A (en) * | 1980-03-31 | 1981-10-29 | Fujitsu Ltd | Formation of amorphous thin film |
| JPS577116A (en) * | 1980-06-16 | 1982-01-14 | Matsushita Electric Ind Co Ltd | Manufacture of amorphous silicon thin film |
| JPS5754930A (en) * | 1980-09-20 | 1982-04-01 | Minolta Camera Co Ltd | Exposure controlling circuit of camera |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5436035A (en) * | 1991-12-05 | 1995-07-25 | Alusuisse-Lonza Services Ltd. | Coating a substrate surface with a permeation barrier |
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