JPS5994416U - protection circuit - Google Patents

protection circuit

Info

Publication number
JPS5994416U
JPS5994416U JP8597283U JP8597283U JPS5994416U JP S5994416 U JPS5994416 U JP S5994416U JP 8597283 U JP8597283 U JP 8597283U JP 8597283 U JP8597283 U JP 8597283U JP S5994416 U JPS5994416 U JP S5994416U
Authority
JP
Japan
Prior art keywords
protection circuit
emitter
resistors
output
output transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8597283U
Other languages
Japanese (ja)
Inventor
小松 弘二
茂 大川
Original Assignee
パイオニア株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by パイオニア株式会社 filed Critical パイオニア株式会社
Priority to JP8597283U priority Critical patent/JPS5994416U/en
Publication of JPS5994416U publication Critical patent/JPS5994416U/en
Pending legal-status Critical Current

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  • Amplifiers (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図および第2図はそれぞれ従来の保護回路の回路図
、第3図はこの考案の保護回路の一実施例を示す回路図
である。 Ql、Q2・・・・・・出力トランジスタ、Q3. Q
4・・・・・・トランジスタ、3・・・・・・プリドラ
イバトランジスタ、4.5・・・・・・ドライバトラン
ジスタ、6.〜8−−−−−−ダイオード、REl、 
REla、 RE2゜RE2a・・・・・・エミッタ抵
抗。
1 and 2 are circuit diagrams of conventional protection circuits, respectively, and FIG. 3 is a circuit diagram showing an embodiment of the protection circuit of this invention. Ql, Q2...output transistor, Q3. Q
4...Transistor, 3...Pre-driver transistor, 4.5...Driver transistor, 6. ~8-------diode, REl,
REla, RE2゜RE2a...Emitter resistance.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] パワーアンプをシングルエンドプッシュプル出力回路で
構成し、この出力トランジスタのエミッタと出力端子間
に複数個のエミッタ抵抗をそれぞれ直列接続し、前記抵
抗の接続点の電位を検出して前記出力トランジスタに流
れる電流を制御するようにしたことを特徴とする保護回
路。
The power amplifier is configured with a single-ended push-pull output circuit, a plurality of emitter resistors are connected in series between the emitter of this output transistor and the output terminal, and the potential at the connection point of the resistors is detected and flows to the output transistor. A protection circuit characterized by controlling current.
JP8597283U 1983-06-06 1983-06-06 protection circuit Pending JPS5994416U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8597283U JPS5994416U (en) 1983-06-06 1983-06-06 protection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8597283U JPS5994416U (en) 1983-06-06 1983-06-06 protection circuit

Publications (1)

Publication Number Publication Date
JPS5994416U true JPS5994416U (en) 1984-06-27

Family

ID=30215919

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8597283U Pending JPS5994416U (en) 1983-06-06 1983-06-06 protection circuit

Country Status (1)

Country Link
JP (1) JPS5994416U (en)

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