JPS5981121U - Signal amplitude adjustment circuit - Google Patents

Signal amplitude adjustment circuit

Info

Publication number
JPS5981121U
JPS5981121U JP17735682U JP17735682U JPS5981121U JP S5981121 U JPS5981121 U JP S5981121U JP 17735682 U JP17735682 U JP 17735682U JP 17735682 U JP17735682 U JP 17735682U JP S5981121 U JPS5981121 U JP S5981121U
Authority
JP
Japan
Prior art keywords
signal
circuit
detection circuit
amplitude adjustment
adjustment circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP17735682U
Other languages
Japanese (ja)
Other versions
JPH021946Y2 (en
Inventor
稲生 清春
安井 均
Original Assignee
横河電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 横河電機株式会社 filed Critical 横河電機株式会社
Priority to JP17735682U priority Critical patent/JPS5981121U/en
Publication of JPS5981121U publication Critical patent/JPS5981121U/en
Application granted granted Critical
Publication of JPH021946Y2 publication Critical patent/JPH021946Y2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
  • Manipulation Of Pulses (AREA)
  • Control Of Amplification And Gain Control (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図、第4図は従来例を示す電気的構成図、第2図は
ピーク値検出回路の一例を示す電気的構成図、第3図は
その入出力波形を示す図、第5図は放電特性を示す図、
第6図は本考案の一実施例を示す電気的構成図、第7図
は本考案の他の実施例を示す電気的構成図、第8図は各
部の動作波形を示す図である。 1・・・可変ゲイン増幅器、2・・・ピーク値検出回路
、3・・・誤差増幅器、4・・・信号識別器、10・・
・無信号状態検出回路、Es1. Es2・・・基準電
圧、D・・・タイオード、C・・・キャパシタ、R・・
・抵抗、Q・・・トランジスタ。
Figures 1 and 4 are electrical configuration diagrams showing a conventional example, Figure 2 is an electrical configuration diagram showing an example of a peak value detection circuit, Figure 3 is a diagram showing its input/output waveforms, and Figure 5 is an electrical configuration diagram showing an example of a peak value detection circuit. Diagram showing discharge characteristics,
FIG. 6 is an electrical block diagram showing one embodiment of the present invention, FIG. 7 is an electrical block diagram showing another embodiment of the present invention, and FIG. 8 is a diagram showing operating waveforms of each part. DESCRIPTION OF SYMBOLS 1... Variable gain amplifier, 2... Peak value detection circuit, 3... Error amplifier, 4... Signal discriminator, 10...
- No-signal state detection circuit, Es1. Es2...Reference voltage, D...Diode, C...Capacitor, R...
・Resistance, Q...transistor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 入力信号のピーク値を検出するピーク値検出回路をその
内部に含み入力信号の振幅を調整する入力回路部と、該
入力回路部の出力を受けて信号成分を取出す出力回路部
とにより構成された信号振幅調整回路において、出力回
路部の無信号状態を検出する無信号状態検出回路と、前
記ピーク値検出回路の一部をなすキャパシタの両端に接
続され前記無信号状態検出回路の出力でキャパシタ両端
を短絡するように構成された高速スイッチング素子とを
具備したことを特徴とする信号振幅調整回路。
It consists of an input circuit section that includes a peak value detection circuit that detects the peak value of the input signal and adjusts the amplitude of the input signal, and an output circuit section that receives the output of the input circuit section and extracts the signal component. In the signal amplitude adjustment circuit, there is a no-signal state detection circuit that detects a no-signal state in the output circuit section, and a no-signal state detection circuit that is connected to both ends of a capacitor that forms a part of the peak value detection circuit, and that is connected to both ends of the capacitor with the output of the no-signal state detection circuit. and a high-speed switching element configured to short-circuit the signal amplitude adjustment circuit.
JP17735682U 1982-11-24 1982-11-24 Signal amplitude adjustment circuit Granted JPS5981121U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17735682U JPS5981121U (en) 1982-11-24 1982-11-24 Signal amplitude adjustment circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17735682U JPS5981121U (en) 1982-11-24 1982-11-24 Signal amplitude adjustment circuit

Publications (2)

Publication Number Publication Date
JPS5981121U true JPS5981121U (en) 1984-06-01
JPH021946Y2 JPH021946Y2 (en) 1990-01-18

Family

ID=30385330

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17735682U Granted JPS5981121U (en) 1982-11-24 1982-11-24 Signal amplitude adjustment circuit

Country Status (1)

Country Link
JP (1) JPS5981121U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016189191A (en) * 2015-03-27 2016-11-04 凌通科技股▲ふん▼有限公司Generalplus Technology Inc. Automatic page detecting method for electronic printed matter, and electronic printed matter using the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016189191A (en) * 2015-03-27 2016-11-04 凌通科技股▲ふん▼有限公司Generalplus Technology Inc. Automatic page detecting method for electronic printed matter, and electronic printed matter using the same

Also Published As

Publication number Publication date
JPH021946Y2 (en) 1990-01-18

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