JPS594097A - Electric circuit - Google Patents

Electric circuit

Info

Publication number
JPS594097A
JPS594097A JP11176182A JP11176182A JPS594097A JP S594097 A JPS594097 A JP S594097A JP 11176182 A JP11176182 A JP 11176182A JP 11176182 A JP11176182 A JP 11176182A JP S594097 A JPS594097 A JP S594097A
Authority
JP
Japan
Prior art keywords
electric circuit
layer
conductor
carbonized
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11176182A
Other languages
Japanese (ja)
Inventor
斎藤 雅之
洋 大平
中井 敏夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP11176182A priority Critical patent/JPS594097A/en
Publication of JPS594097A publication Critical patent/JPS594097A/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 〔錯明の、鴫する技術分野〕 本発明tよ抵抗1トを計む電気回路(・て関する。[Detailed description of the invention] [Illusionary technical field] The present invention relates to an electric circuit having a resistance.

〔f忙来技術とその問題点〕[Fast technology and its problems]

絶縁樹脂層上に抵抗体を搭載した電気回路の製造方法は
公知のとうり導体路をエツチング法、ア’fイティブ法
厚膜印刷、わるいは薄膜で形成後、リード付抵抗体、チ
ップ低抗体等のディスクリート低抗体を塔載する方法や
印刷法で抵抗体を形成する方法が一般的である。印刷法
で抵抗体を形成する方法に、5つでは、はじめに抵抗体
を印刷し、次いで導体路を形成する方法もとられている
The manufacturing method of an electric circuit in which a resistor is mounted on an insulating resin layer is known, such as etching, active thick film printing, or forming a conductor path as a thin film, and then forming a resistor with leads or a chip low antibody. Common methods include mounting discrete low antibodies, such as, and forming resistors using printing methods. Among the methods for forming resistors using printing methods, there is also a method in which the resistors are first printed and then the conductor paths are formed.

上述した導体路の形成においてはいずれもパターン設計
及びスクリーンマスク作成が必要となっている。たとえ
ばエツチングによる回路形成では導体路と逆のパターン
マスクを用いてfJii 151%り基板にエツチング
レジストを印刷、転燥する必要があり、′!1′た印刷
法で導体路を形成する方法にあってもやはり導体路のス
クリーンマスクが必要となる。
The formation of the above-mentioned conductor paths requires pattern design and screen mask creation. For example, when forming a circuit by etching, it is necessary to use a pattern mask opposite to that of the conductor paths, print an etching resist on a substrate with a thickness of 151%, and then roll it. Even in the method of forming the conductor tracks by the 1' printing method, a screen mask for the conductor tracks is still required.

またマスクを使用する方法では、抵抗体と導体との位1
ηづれが不1’T I的に生ずるので、抵抗体と導体を
接続する部分には、位1dづれを吸117できるように
例えば導体パターン部を大きくするような工界をとる必
要があり、実装密度を上げる上でさまたげとなっセいた
In addition, in the method using a mask, the resistor and conductor are
Since the deviation of η occurs invariably, it is necessary to design the area where the resistor and the conductor are connected, for example by enlarging the conductor pattern part, so that the deviation of 1d can be absorbed. This became an obstacle to increasing the packaging density.

またマスクを使用する方法においては、スクリーン印刷
方式ではペーストを印刷するためその印刷精度は生産性
を考慮すると最小150μm rl】程度に限られまた
ホトエツチング法においても35μ銅箔使用の嚇合は1
00μm巾程度に限られておゆ、より微細パターンの形
成は該だ1(1雉でhつだ。
In addition, in the method of using a mask, since the screen printing method prints a paste, the printing accuracy is limited to a minimum of 150μm rl] considering productivity, and even in the photoetching method, the use of 35μ copper foil is limited to 1
The formation of finer patterns is limited to a width of about 0.00 μm, but the formation of finer patterns is difficult.

〔発明の目的〕[Purpose of the invention]

本発明前記従東方式による車礒lid路板形成上の問題
点を数音し」:うとしてなされたものである。
The present invention was made in an attempt to solve some of the problems in forming a vehicle lid road plate using the above-mentioned conventional method.

〔発明の硫安〕[Ammonium sulfate of invention]

少なくとも表向に有機高分子層分を有する基板を形成す
Z)。この基板は全体が有f慢物、ま/ζは無機物及び
令属板の上に有機高分子を1+υ着しtものであっても
よい、 上記有機高分子の表面に赤外線し/−リ”−光を照射し
てその−N分を加熱して炭化し、炭化ハタが形成されろ
。このよう(cして赤外線レーザ’−tを有1幾高分子
の表面を移動させると赤外線レーザー光の移動と共にそ
の11@射部分が炭化されて炭化層が形成されろ。した
がってレーザーの移動をパターン化しておけばそのパタ
ーンと同様の炭化層パターンが書ける。
Forming a substrate having an organic polymer layer at least on the surface (Z). This substrate may be made entirely of a material, or may be made of an inorganic material and an organic polymer deposited on the surface of the substrate. - Light is irradiated to heat and carbonize the -N component, forming a carbonized group.In this way, when an infrared laser is moved across the surface of a polymer, the infrared laser beam is As the laser beam moves, the irradiated portion 11 is carbonized and a carbonized layer is formed. Therefore, if the movement of the laser is patterned, a carbonized layer pattern similar to that pattern can be written.

欠如この炭化層パターンの一部を次工程となる無電解メ
ッキ液に耐え得る物゛1jで被覆することによってこの
部分の炭化層をメッキが出来ないよりに保護するLうに
保護膜を形成し抵抗を維持させる。
By coating a part of this carbonized layer pattern with a substance that can withstand the electroless plating solution that will be the next step, a protective film is formed to protect the carbonized layer in this part from being plated. to be maintained.

このように1−7で上1.[〕炭化層による抵抗を維持
した状態で炭化層の露出部を無電解メッキを晦すことに
E−、)て炭比べ山部にメッキ層を被着して導体化する
。すなわち上記炭化層(カーボン)がメ・ツキ触媒とな
って金(4が析出してこの部分が導体化する。
In this way, 1-7 is the top 1. [] Electroless plating is performed on the exposed portion of the carbonized layer while maintaining the resistance due to the carbonized layer.) A plating layer is applied to the peaks of the carbon to make it conductive. That is, the carbonized layer (carbon) acts as a metal catalyst, gold (4) is precipitated, and this portion becomes a conductor.

このようにするととりこよって「1士初に形成された炭
化層のパターンはその一部が炭化層による抵抗部分とメ
ッキによって得られた導体部分とが基板上に被着されて
いる有機高分子の一部に溝成され、低抗体を有する゛1
E気回路が得られろ。
By doing this, the pattern of the carbonized layer that is initially formed is partially composed of a resistive part made of the carbonized layer and a conductive part obtained by plating, which is an organic polymer coated on the substrate. Partially grooved and has low antibodies゛1
Get an E-air circuit.

とこで、赤外にlUl/−リ゛光で加熱17て炭化する
有機高分子化合物としては不活性雰囲気中で行えば殆ん
ど有機高分子化合物が適用できるが、′眠気絶縁性、及
び耐熱性の点から、エポキシ1v↑脂、ポリイミド樹脂
、ポリエステル樹脂、ビスマレイミド樹脂、ジアリルフ
タレート樹脂、メラミン4(ij脂或いはこれら樹脂を
主体とする変性樹脂が適している。赤外線レーザーとし
ては、炭酸ガスレーザーYA()レーザー等が好適であ
る。無電解メッキ浴としては、桐、スズ、銀、分、ニッ
ケル液が電気回路基板配線材料として好適である。
By the way, most organic polymer compounds that can be carbonized by heating with infrared light (lUl/-17) can be applied if the process is carried out in an inert atmosphere. From the viewpoint of properties, epoxy 1v↑ fat, polyimide resin, polyester resin, bismaleimide resin, diallyl phthalate resin, melamine 4 (ij fat) or modified resins mainly composed of these resins are suitable.For infrared laser, carbon dioxide gas Laser YA() laser etc. are suitable.As the electroless plating bath, paulownia, tin, silver, min., and nickel solutions are suitable as electric circuit board wiring materials.

〔発明の効果〕〔Effect of the invention〕

(1)レーデ−光は、コヒーレンシーが高く無光性がよ
いので、微細パターンが容易に得られやすく、配線密度
の高い電気回路液が得られろ。
(1) Since radar light has high coherency and good non-photonic properties, fine patterns can be easily obtained, and an electric circuit liquid with high wiring density can be obtained.

(2)低抗体パターンと配線パターンの位置づれを・考
魔しなくてもよいので、i氏抗体を収容しながら微細パ
ターン化が可能である。
(2) Since there is no need to consider the misalignment between the low antibody pattern and the wiring pattern, fine patterning is possible while accommodating the Mr. i antibody.

(3)スクリーン印刷法、ホトレジスト法等従来方式に
必要であった写真マスクを使わないでも電子R1・算(
幾のプログラムとt?りにレーデ光源を移動さすれは作
画できるので短時間に電気回路板が作画でき、またパタ
ーン形状の異なる基板もプログラムの変(だけですむの
で1役取りの時間が最小で、同一ラインで製造できるの
で少壕多品種製造姉適しておる。
(3) Electronic R1 and calculation (
How many programs and t? Since drawing can be done by moving the LED light source, electrical circuit boards can be drawn in a short time, and boards with different pattern shapes can be printed on the same line with only a change in the program, which minimizes the time required for one role. This makes it suitable for small-scale multi-product manufacturing.

(4)4体格メッキはアfイライブで形成されるので、
材料利用5(’/J率が1蔓い。
(4) Since the 4-body plating is formed by affiliate,
Material usage 5 ('/J rate is 1.

実施例 実砲1列 1 次に実症列につ外説明する。第1図に示十ようK O,
3mm (7)ステンレス基体1の上に第2図に示すよ
うにポリイミド1何脂(商品名トレニース3000)を
スピンナーでコーテングして約40μ厚の有機高分子層
2を形成しこの表面3に酸大出力30Wの炭酸ガスレー
ザを用い窒素気体中でとのレーリ゛−光この時のレーザ
ー光の直径lよ約100μmであるがこのレーザー光の
照射による炭化層のI+]は約2倍の200μ「nで深
さ約10μ+nであった。
1 row of actual guns according to the embodiment 1 Next, the actual rows will be explained. As shown in Figure 1, K O,
3mm (7) As shown in Figure 2, polyimide 1 resin (trade name: Trenice 3000) is coated on a stainless steel substrate 1 using a spinner to form an organic polymer layer 2 with a thickness of approximately 40μ, and this surface 3 is coated with acid. The diameter of the laser beam at this time is approximately 100 μm, but the diameter of the carbonized layer due to irradiation with this laser beam is approximately twice that of 200 μm. The depth was approximately 10μ+n.

次に第4図に示すように炭化層(4)のパターンの一部
を次の工作で用いる無電解メッキ液に対(2て保護でき
ろように樹脂ペースト(商品名ノルダレシスト70 G
 >を被着し、約120”0で約10分間保持17て硬
化し、保護膜5を形成する。この保護膜5tよレーザ光
によって形成された抵抗層を必要な部分に必要な政ある
いは必要な抵抗値に設定することがこれによってa1能
である。
Next, as shown in Figure 4, a part of the pattern of the carbonized layer (4) was coated with resin paste (trade name Nordaresyst 70 G) to protect it from the electroless plating solution used in the next work.
> is deposited and held at a temperature of about 120" for about 10 minutes 17 to cure to form a protective film 5. This protective film 5t is coated with a resistive layer formed by a laser beam and applied to the necessary areas as needed. This makes it possible to set the resistance value to a certain value.

更に」二記保護膜5付、金属板1を無電解Niめっき浴
(商品名メチ・ノクス9048 ) Icて約55゛C
で約1時間保持し上記露出炭化層4.上に第5図に示す
ようにめっき厚め7.5μmのN116を折[B形成し
た。すなわち、第6図に示すように基体l上に有機高分
子絶縁板2を被着し、その表面3の一部にレーザ、−光
を照射して板2の厚さ方向に炭化層4を形成する。しか
る後に炭化1−4の一部を保護膜5で保穫し、この抵抗
を保持して他の部分に無電解めっきを施こしN11i6
を形成しこれを導電路に構成して電気回路10を形成し
て成・る。なお上記Ni+i16から成る導体路の抵抗
は約600m(ν遺であり、また抵抗部分は1.KQ/
c*であった。
Furthermore, the metal plate 1 with the protective film 5 described above was heated in an electroless Ni plating bath (product name Methi Nox 9048) at about 55°C.
The exposed carbonized layer 4. was held for about 1 hour. As shown in FIG. 5, N116 plating with a thickness of 7.5 μm was formed on top. That is, as shown in FIG. 6, an organic polymer insulating plate 2 is deposited on a substrate 1, and a part of its surface 3 is irradiated with laser light to form a carbonized layer 4 in the thickness direction of the plate 2. Form. After that, a part of carbonized 1-4 is protected with a protective film 5, and electroless plating is applied to other parts while maintaining this resistance.N11i6
The electric circuit 10 is formed by forming a conductive path and configuring this into a conductive path. The resistance of the conductor path made of Ni+i16 is approximately 600m (ν), and the resistance portion is 1.KQ/
It was c*.

実施例 ビスマレイミド、トリアジン樹脂から成る絶縁板(商品
名ニドウィトCCI、−)1860)を支持基板として
最大出力10W波長1.06μmのYAG v−ザーを
用いて窒素雰囲気中で炭化層ノくターンを形成した、な
おこの1、k化層は(1]が約40μmnでbつた。
Example: Using an insulating plate made of bismaleimide and triazine resin (trade name Nidwit CCI, -) 1860) as a support substrate, a YAG v-zer with a maximum output of 10 W and a wavelength of 1.06 μm was used to turn the carbonized layer in a nitrogen atmosphere. The formed 1, k layer had a thickness of about 40 μm (1).

次に上紀炭rヒ層パターンの一部を軸取1・捏メッキか
ら保、穫ペース) tJt脂(商品名ノルダレシスト7
0)で1呆護して銅めっき浴(約55°O)にて1時間
無電解めっきを行ない、上記炭化層の露出部に約5 、
a mの銅層を形成1〜.4電路とした。この導電路の
抵抗は400 m(1/Crnでちり、かつ上RL抵抗
1端は約1.、 I K(l/儂で、ちった。
Next, a part of the Joki Charcoal layer pattern was preserved from shaft removal 1 and kneading plating, and tJt fat (product name Nordaresyst 7)
0), electroless plating was performed for 1 hour in a copper plating bath (approximately 55°O), and the exposed portion of the carbonized layer was coated with approximately 5%
Forming a copper layer of 1~. There were 4 electric circuits. The resistance of this conductive path is 400 m (1/Crn), and the upper RL resistor 1 end is approximately 1.0 m (1/Crn).

【図面の簡単な説明】[Brief explanation of the drawing]

第1図pJ至第6図は本光明電気回路のWM造過権を、
説明すもための斜?i図及び断面図である。 代理人 弁理士 側近 憲 佑 (はふ1名) 第  1  図 ft43   図              第  
4  図第5図 第  6  図
Figure 1 pJ to Figure 6 shows the WM overwriting rights of this Komei electric circuit.
Oblique to explain? They are an i figure and a sectional view. Agent Patent attorney Aide Kensuke (1 person) Figure 1 ft43 Figure
4 Figure 5 Figure 6

Claims (1)

【特許請求の範囲】[Claims] 表面が少なくとも有機高分子で形成された基板をレーデ
−光を用いて照射17て上記有機高分子の一部を炭化さ
せて抵抗体部分を成形し、奏≠この低抗体部分の一部を
無電解メッキに耐える被覆膜で被覆し残りの部分に無電
PJイメソキを強1〜で導電体としたことを特徴とする
電気回路。
A substrate whose surface is formed of at least an organic polymer is irradiated with radar light (17) to carbonize a portion of the organic polymer to form a resistor portion, and a portion of the low antibody portion is removed. An electric circuit characterized in that it is coated with a coating film that can withstand electrolytic plating, and the remaining part is made of non-electrostatic PJ imesoki as a conductor with a strength of 1 to 1.
JP11176182A 1982-06-30 1982-06-30 Electric circuit Pending JPS594097A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11176182A JPS594097A (en) 1982-06-30 1982-06-30 Electric circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11176182A JPS594097A (en) 1982-06-30 1982-06-30 Electric circuit

Publications (1)

Publication Number Publication Date
JPS594097A true JPS594097A (en) 1984-01-10

Family

ID=14569515

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11176182A Pending JPS594097A (en) 1982-06-30 1982-06-30 Electric circuit

Country Status (1)

Country Link
JP (1) JPS594097A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5267998A (en) * 1975-12-04 1977-06-06 Fujitsu Ltd Printing wiring method
JPS55148401A (en) * 1979-05-04 1980-11-19 New England Instr Resistance element and method of fabricating same

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5267998A (en) * 1975-12-04 1977-06-06 Fujitsu Ltd Printing wiring method
JPS55148401A (en) * 1979-05-04 1980-11-19 New England Instr Resistance element and method of fabricating same

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