JPS5928061B2 - Optical semiconductor device - Google Patents
Optical semiconductor deviceInfo
- Publication number
- JPS5928061B2 JPS5928061B2 JP54095842A JP9584279A JPS5928061B2 JP S5928061 B2 JPS5928061 B2 JP S5928061B2 JP 54095842 A JP54095842 A JP 54095842A JP 9584279 A JP9584279 A JP 9584279A JP S5928061 B2 JPS5928061 B2 JP S5928061B2
- Authority
- JP
- Japan
- Prior art keywords
- impurity regions
- electrode
- region
- insulating film
- avalanche breakdown
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000003287 optical effect Effects 0.000 title claims description 13
- 239000004065 semiconductor Substances 0.000 title claims description 10
- 239000012535 impurity Substances 0.000 claims description 14
- 230000015556 catabolic process Effects 0.000 claims description 12
- 239000000969 carrier Substances 0.000 claims description 11
- 239000000758 substrate Substances 0.000 claims description 10
- 230000015654 memory Effects 0.000 description 6
- 230000035945 sensitivity Effects 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- 230000004044 response Effects 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 230000008859 change Effects 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 229910003437 indium oxide Inorganic materials 0.000 description 1
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 1
- 230000000977 initiatory effect Effects 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 230000003446 memory effect Effects 0.000 description 1
- 230000006386 memory function Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
- H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
- H01L31/112—Devices sensitive to infrared, visible or ultraviolet radiation characterised by field-effect operation, e.g. junction field-effect phototransistor
- H01L31/113—Devices sensitive to infrared, visible or ultraviolet radiation characterised by field-effect operation, e.g. junction field-effect phototransistor being of the conductor-insulator-semiconductor type, e.g. metal-insulator-semiconductor field-effect transistor
- H01L31/1136—Devices sensitive to infrared, visible or ultraviolet radiation characterised by field-effect operation, e.g. junction field-effect phototransistor being of the conductor-insulator-semiconductor type, e.g. metal-insulator-semiconductor field-effect transistor the device being a metal-insulator-semiconductor field-effect transistor
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Read Only Memory (AREA)
- Light Receiving Elements (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Non-Volatile Memory (AREA)
Description
【発明の詳細な説明】
本発明は、光情報を不揮発の電気的情報として記憶し、
また、書換え可能である光半導体装置に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention stores optical information as non-volatile electrical information,
The present invention also relates to a rewritable optical semiconductor device.
一般に、２次元的な光情報を記憶するイメージ・メモリ
が必要とされている。Generally, there is a need for image memory that stores two-dimensional optical information.
しかしながら、不揮発記憶機能を有するものは実用化さ
れていない。その為、従来はＣＣＤやＭＯＳダイオード
・アレイ或いはフォト・トランジスタ・アレイなどに依
つて光情報を検出し、これを電気量に変換してＩＣメモ
リ、コア・メモリなどに記憶する方法が採用されてきた
。ところが、この方法を実現する装置は大型化し、複雑
な構成となる為、安価に実用化することはできない。光
情報を直接検出して記憶できる機能はＭＮＯＳ型不揮発
性メモリに於いて或る程度認められる。これは、窒化膜
と酸化膜の界面にキャリアを注入することに依り記憶作
用を行なわせるものであるが、そのキャリアの注入は半
導体基板中の表面キャリア量に僅かに依存することを利
用するものであるから注入量は少なく、従つて感度が充
分でなく、実用性に乏しい。本発明は、光情報を直接検
出して記憶できる機能を有する半導体記憶装置を高感度
に、また、応答速度を向上し、しかも、書換え可能の不
揮発性メモリとすることができるようにするものであり
、以下これを詳細に説明する。第１図及び第２図は本発
明一実施例を説明する要部側断面図及び要部平面図であ
る。However, one with a non-volatile memory function has not been put to practical use. For this reason, the conventional method has been to detect optical information using a CCD, MOS diode array, or phototransistor array, convert it into electrical quantity, and store it in IC memory, core memory, etc. Ta. However, the apparatus for realizing this method is large in size and has a complicated structure, so it cannot be put to practical use at low cost. The ability to directly detect and store optical information is recognized to some extent in MNOS type nonvolatile memories. This method performs a memory effect by injecting carriers into the interface between a nitride film and an oxide film, and takes advantage of the fact that the injection of carriers slightly depends on the amount of surface carriers in the semiconductor substrate. Therefore, the amount of injection is small, and the sensitivity is therefore insufficient, making it impractical. The present invention enables a semiconductor memory device having a function of directly detecting and storing optical information to have high sensitivity and improved response speed, and also to be able to be used as a rewritable nonvolatile memory. Yes, this will be explained in detail below. FIGS. 1 and 2 are a side sectional view and a plan view of a main part explaining one embodiment of the present invention.
図に於いて、１はｐ型シリコン半導体基板、２はｎｆ型
不純物領域（ソース領域）、３はｎ＋型不純物領域（ド
レイン領域）、４は絶縁膜、５は透光性フローティング
電極をそれぞれ示している。In the figure, 1 is a p-type silicon semiconductor substrate, 2 is an nf-type impurity region (source region), 3 is an n+-type impurity region (drain region), 4 is an insulating film, and 5 is a transparent floating electrode. ing.
この構成に於いて、絶縁膜４は二酸化シリコン膜、窒化
シリコン膜などを用いて良いが、ここでは窒化シリコン
膜を用いているものとする。その理由は、二酸化シリコ
ン膜より窒化シリコン膜の方がエネルギ・バリアが低い
のでキャリア注入が容易であることに依る。透光性フロ
ーティング電極５としては、厚さ５０〜５００ＣＡ〕の
金属、酸化錫や酸化インジウムなどの金属酸化物などを
用いることができる。さて、本実施例に於いては、基板
１と領域３との接合界面の部分６にアバランシエ・ブレ
イク・ダウンが発生する直前の状態となるように領域３
に逆バイアス（ここでは正電位）を印加し、電極５の上
面から光を照射すると、このとき基板１と領域２とが同
程度の電位にあれば、領域２と電極５の重なり容量に起
因して電極５の電位が引下げられる為、部分６に於いて
光励起アバランシエ・ブレイク・ダウンにより発生した
ホツト・キヤリアのうち、ホールを電極５に注入するこ
とができる。In this configuration, the insulating film 4 may be a silicon dioxide film, a silicon nitride film, or the like, but here a silicon nitride film is used. The reason for this is that a silicon nitride film has a lower energy barrier than a silicon dioxide film, making it easier to inject carriers. As the transparent floating electrode 5, a metal having a thickness of 50 to 500 CA], a metal oxide such as tin oxide or indium oxide, etc. can be used. Now, in this embodiment, the area 3 is arranged so that the area 6 of the bonding interface between the substrate 1 and the area 3 is in a state immediately before avalanche breakdown occurs.
When a reverse bias (positive potential in this case) is applied to Since the potential of the electrode 5 is lowered, holes can be injected into the electrode 5 among the hot carriers generated by photoexcited avalanche breakdown in the portion 6.
この結果、電極５の電位は上昇し、基板１の表面電位も
上昇するから、領域２，３間には導電チヤネルが形成さ
れる。そして、そのチヤネルに於ける抵抗は、領域２，
３に印加する電圧及び光の強度、波長、照射時間などに
依存する為、光のアナログ量と対応させることができる
。また、光照射時に領域２に正電位を印加しておくと電
極５の電位上昇に依り前記とは逆にホツトキヤリアのう
ちの電子が電極に注入される。As a result, the potential of the electrode 5 increases and the surface potential of the substrate 1 also increases, so that a conductive channel is formed between the regions 2 and 3. And the resistance in that channel is region 2,
Since it depends on the voltage applied to 3 and the intensity, wavelength, and irradiation time of light, it can be made to correspond to the analog amount of light. Furthermore, if a positive potential is applied to the region 2 during light irradiation, electrons from the hot carriers are injected into the electrode as the potential of the electrode 5 rises, contrary to the above.
これにより、領域２が低電位であつた際に生成された前
記導電チヤネルは消滅する。また、記憶情報の読出しは
領域３に所定の電圧を印加してチヤネル抵抗の変化を検
出すれば良い。This causes the conductive channel that was generated when region 2 was at a low potential to disappear. Further, to read the stored information, a predetermined voltage may be applied to the region 3 and a change in channel resistance may be detected.
この際、領域３に印加する電圧が余り高いと弱いアバラ
ンシエ・ブレイク・ダウンが起り、光の照射と無関係に
キヤリアが電極５に注入されるので注意しなければなら
ない。前記のようにして、本発明に依れば、光情報をア
ナログ的に電極５への蓄積キヤリアとして記憶させるこ
とができ、また、その記憶情報を読出し、消去すること
ができる。At this time, care must be taken because if the voltage applied to region 3 is too high, weak avalanche breakdown will occur and carriers will be injected into electrode 5 regardless of the irradiation of light. As described above, according to the present invention, optical information can be stored in the electrode 5 as a storage carrier in an analog manner, and the stored information can be read and erased.
従来、半導体ｐ−ｎ接合のアバランシエ・ブレイク・ダ
ウンを利用した光デイテクタとしてアバランシエ・フオ
ト・ダイオードが知られているが、本発明では一部その
原理を応用しているものであり、感度はｐ−ｎ接合デイ
テクタの１０４倍も高く、応答時間も短い。第３図は他
の実施例の要部側断面図であり、第１図及び第２図に関
して説明した部分と同部分は同記号で指示してある。本
実施例が既説明の実施例と相違する点は、第１図及び第
２図に示した部分６に接してｐ＋型不純物領域７を形成
したこと、電極５上に絶縁膜８を介して制御電極９を形
成したことである。Conventionally, an avalanche photo diode has been known as an optical detector that utilizes avalanche breakdown of a semiconductor p-n junction, but the present invention partially applies that principle, and the sensitivity is -It is 104 times more expensive than an n-junction detector, and its response time is also short. FIG. 3 is a side cross-sectional view of a main part of another embodiment, and the same parts as those explained in connection with FIGS. 1 and 2 are indicated by the same symbols. This embodiment differs from the previously described embodiments in that a p+ type impurity region 7 is formed in contact with the portion 6 shown in FIGS. This is because the control electrode 9 was formed.
この場合絶縁膜８及び制御電極９は電極５上の一部にの
み形成して、光が基板１の光励起アバランシエ・ブレイ
ク・ダウン発生領域に充分に届くようにした方が良く、
特に電極９として不透光性の金属膜を使用した場合はそ
のようにしなければならない。本実施例では不純物領域
７の存在に依りアバランシエ・ブレイク・ダウン開始電
界は第１図及び第２図の場合より低くなる。若し、第１
図及び第２図に示した実施例に於いて、アバランシエ・
ブレイク・ダウン開始電界を低下させようとすれば基板
１の不純物濃度を高めなければならないが、そのように
すると、チヤネル形成の閾値電圧が高くなるので微小光
の検出は困難になる。第３図実施例の場合では、アバラ
ンシエ・ブレイク・ダウン開始電圧を不純物領域７の存
在で自由に設定できる。また、制御電極９を設けてある
ので電極５に蓄えられたキヤリアの正負に拘わらず光情
報を閾値電圧の変化として読出すことができ、更には、
制御電極９に依り電極５の電位を制御できるから領域２
と同じ作用をさせることができる。第４図は他の実施例
の要部平面図であり、第１図乃至第３図に関して説明し
た部分と同部分は同記号で指示してある。In this case, it is better to form the insulating film 8 and the control electrode 9 only on a part of the electrode 5 so that the light can sufficiently reach the photoexcited avalanche breakdown generation region of the substrate 1.
This must be done especially when a non-transparent metal film is used as the electrode 9. In this embodiment, due to the presence of the impurity region 7, the electric field at which avalanche breakdown starts is lower than in the cases of FIGS. 1 and 2. If the first
In the embodiment shown in Figures and Figure 2, the avalanche
In order to lower the breakdown initiation electric field, it is necessary to increase the impurity concentration of the substrate 1, but this increases the threshold voltage for channel formation, making it difficult to detect minute light. In the case of the embodiment shown in FIG. 3, the avalanche breakdown start voltage can be freely set due to the presence of the impurity region 7. Further, since the control electrode 9 is provided, optical information can be read out as a change in threshold voltage regardless of the positive or negative carrier stored in the electrode 5.
Region 2 because the potential of electrode 5 can be controlled by control electrode 9
can have the same effect. FIG. 4 is a plan view of the main parts of another embodiment, and the same parts as those explained with reference to FIGS. 1 to 3 are indicated by the same symbols.
本実施例が既説明の実施例、特に第３図実施例と相違す
る点は、領域３の他に領域３′が形成され、アバランシ
エ・ブレイク・ダウンを容易にする為の領域７は領域３
′に接するように形成され、領域３汲び領域７は制御電
極９で履われないようにしたことである。This embodiment is different from the previously described embodiments, especially the embodiment shown in FIG.
', and the area 3 and the area 7 are not covered by the control electrode 9.
本実施例では、領域３′にはアバランシエ・ブレイク・
ダウンを発生するのに充分な電圧を印加して微小な光情
報も高感度で検出できるように、また、領域３にはアバ
ランシエ・ブレイク・ダウンを生じないような低い電圧
を印加して読出しを行なうことができるものセある。い
ずれにせよ、第３図及び第４図の実施例は電極５が絶縁
膜４，８で挟まれているめで、蓄積されたキヤリアが消
失する率は低くなり、不揮発性記憶保持を有効に行なう
ことができる。In this embodiment, the area 3' includes an avalanche break.
In order to apply a voltage sufficient to cause breakdown so that even minute optical information can be detected with high sensitivity, readout is performed by applying a low voltage that does not cause avalanche breakdown to region 3. There are things you can do. In any case, in the embodiments shown in FIGS. 3 and 4, since the electrode 5 is sandwiched between the insulating films 4 and 8, the rate at which accumulated carriers disappear is low, and nonvolatile memory retention is effectively performed. be able to.
以上の説明で判るように、本発明に依れば、半導体基板
にソース及びドレイン様の不純物領域を形成し、それ等
領域間に絶縁膜を介して透光性のフローテイング電極を
形成し、前記領域間に電圧を印加した状態でフローテイ
ング電極に光情報である光の照射に依つて光励起アバラ
ンシエ・ブレイタ・ダウンを発生させ、キヤリアを前記
フローテイング電極に蓄積して書込むようにしてあり、
非常に高感度であるとともに応答速度も速い。As can be seen from the above description, according to the present invention, source and drain-like impurity regions are formed in a semiconductor substrate, and a transparent floating electrode is formed between these regions with an insulating film interposed therebetween. A photo-excited avalanche breaker down is generated by irradiating the floating electrode with light, which is optical information, while a voltage is applied between the regions, and carriers are accumulated and written in the floating electrode,
It has extremely high sensitivity and fast response speed.
第１図及び第２図は本発明一実施例の要部側断面図及び
要部平面図、第３図は他の実施例の要部側断面図、第４
図は他の実施例の要部平面図である。
図に於いて、１は基板、２，３は不純物領域、４は絶縁
膜、５は電極である。1 and 2 are a side sectional view and a plan view of a main part of one embodiment of the present invention, FIG. 3 is a side sectional view of a main part of another embodiment, and FIG.
The figure is a plan view of main parts of another embodiment. In the figure, 1 is a substrate, 2 and 3 are impurity regions, 4 is an insulating film, and 5 is an electrode.
Claims (1)
のいずれか一方と該半導体基板との間に逆バイアス電圧
を印加可能である反対導電型の不純物領域、該相対向す
る反対導電型の不純物領域間に在つて前記逆バイアス電
圧が印加された状態で光が入射した際に光励起アバラン
シエ・ブレイク・ダウンを起こしてホット・キャリアを
発生する領域、該不純物領域間及びそれ等不純物領域の
一部を覆う絶縁膜、該絶縁膜上に在つて少なくとも前記
不純物領域と重なるように形成され且つ前記光励起アバ
ランシエ・ブレイク・ダウンに依つて生じたホット・キ
ャリアが注入されることに依り情報の書き込み或いは消
去が行なわれる透光性フローティング電極を備えてなる
ことを特徴とする光半導体装置。1. Impurity regions of opposite conductivity type formed opposite to each other on the surface of a semiconductor substrate of one conductivity type and capable of applying a reverse bias voltage between either one of the impurity regions and the semiconductor substrate; A region between the impurity regions that causes photo-excited avalanche breakdown and generates hot carriers when light enters with the reverse bias voltage applied, between the impurity regions, and between the impurity regions. an insulating film that covers the insulating film, is formed on the insulating film so as to overlap at least the impurity region, and is injected with hot carriers generated by the photo-excited avalanche breakdown to write information or An optical semiconductor device comprising a translucent floating electrode on which erasing is performed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP54095842A JPS5928061B2 (en) | 1979-07-27 | 1979-07-27 | Optical semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP54095842A JPS5928061B2 (en) | 1979-07-27 | 1979-07-27 | Optical semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5621380A JPS5621380A (en) | 1981-02-27 |
| JPS5928061B2 true JPS5928061B2 (en) | 1984-07-10 |
Family
ID=14148622
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP54095842A Expired JPS5928061B2 (en) | 1979-07-27 | 1979-07-27 | Optical semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5928061B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5812367A (en) * | 1981-07-16 | 1983-01-24 | Matsushita Electronics Corp | Semiconductor memory unit |
| JP2540090Y2 (en) * | 1991-10-15 | 1997-07-02 | 株式会社フジシール | Collared container holder |
-
1979
- 1979-07-27 JP JP54095842A patent/JPS5928061B2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5621380A (en) | 1981-02-27 |
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