JPS59161851A - Electronic component parts - Google Patents
Electronic component partsInfo
- Publication number
- JPS59161851A JPS59161851A JP3604083A JP3604083A JPS59161851A JP S59161851 A JPS59161851 A JP S59161851A JP 3604083 A JP3604083 A JP 3604083A JP 3604083 A JP3604083 A JP 3604083A JP S59161851 A JPS59161851 A JP S59161851A
- Authority
- JP
- Japan
- Prior art keywords
- leads
- lead
- package
- grooves
- pellet
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3421—Leaded components
- H05K3/3426—Leaded components characterised by the leads
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
［技術分野］
本発明は電子部品、特に、封止体外に突出する外部リー
ドを有する電子部品に通用して有効な電子部品に関する
。DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to an electronic component, and particularly to an electronic component that is effective in general use as an electronic component having an external lead protruding outside a sealed body.
［背景技術］
一般に、ダイオードトランジスタ、集積回路（ＩＣ）、
あるいは大規模集積回路（ＬＳＩ）の如き半導体装置に
おいては、パフケージ等の封止体外に外部リードが突出
した構成となっているのが通常である。この外部リード
はプリント基板等の被実装物の孔の中に挿入して半田付
は等で固定される。[Background Art] Generally, diode transistors, integrated circuits (ICs),
In semiconductor devices such as large-scale integrated circuits (LSI), it is common for external leads to protrude outside of a sealed body such as a puff cage. This external lead is inserted into a hole in a mounted object such as a printed circuit board and fixed by soldering or the like.
ところで、このような外部リードは検査や実装等では必
要であるが、そのために電子部品をハンドリングする場
合には特に必要とされるものではない。すなわち、電子
部品の検査やプリント基板への実装のような何らかの処
理を行うような場合、電子部品はその都度ハンドリング
が要求される。Incidentally, although such external leads are necessary for inspection, mounting, etc., they are not particularly required when handling electronic components for that purpose. That is, when performing some kind of processing such as inspecting electronic components or mounting them on a printed circuit board, handling of the electronic components is required each time.
しかし、ハンドリング時にたとえば多数の電子部品をホ
ッパーに一括投入するような場合、外部リードどうしが
互いに絡まり合うので、電子部品を１個ずつマガジンま
たはキャリアに収納してハンドリングすることが必要で
あり、作業工数が増加するという問題がある。However, when handling, for example, when a large number of electronic components are loaded into a hopper all at once, the external leads become entangled with each other, so it is necessary to store the electronic components one by one in a magazine or carrier and handle them. There is a problem that the number of man-hours increases.
また、電子部品は実装密度ができるだけ小さい方が望ま
しいが、外部リードが突出していることにより空間占有
面積が相当大きくなってしまうという問題がある。Furthermore, although it is desirable for the packaging density of electronic components to be as low as possible, there is a problem in that the space occupied by the external leads becomes considerably large due to the protruding external leads.
さらに、たとえばプリント基板に電子部品を取り付ける
場合にも、外部リードをプリント基板の孔に挿入する必
要があり、プリント基板に孔を穿けることが要求され、
製造工数およびコストが増加する上に、プリント基板の
孔への外部リードの挿入も困難であるという問題がある
。Furthermore, when attaching electronic components to a printed circuit board, for example, it is necessary to insert external leads into holes in the printed circuit board, which requires the ability to drill holes in the printed circuit board.
There are problems in that not only the number of manufacturing steps and costs increase, but also it is difficult to insert the external leads into the holes of the printed circuit board.
［発明の目的］
本発明の目的は、ハンドリングや実装等の容易な電子部
品を提供することにある。[Object of the Invention] An object of the present invention is to provide an electronic component that is easy to handle and mount.
本発明の前記ならびにその他の目的と新規な特徴は、本
明細書の記述および添付図面から明らかになるであろう
。The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.
［実施例１コ
第１図（ａ）は本発明による電子部品の実施例１を示す
正面図、第１図山）は同図（ａＪの■−Ｉ線断面図であ
る。Embodiment 1 FIG. 1(a) is a front view showing Embodiment 1 of an electronic component according to the present invention, and FIG.
本実施例１は本発明を一例としていわゆるデュアルイン
ライン型パッケージを有する半導体装置に適用したもの
である。Embodiment 1 is an example in which the present invention is applied to a semiconductor device having a so-called dual in-line package.
この半導体装置において、リードフレーム１のベレット
取付部（タブ）上には半導体ペレット２が取り付けられ
、この半導体ペレット２とリードフレームｌのインナー
リード部との間はワイヤ３によりポンディングされてい
る。In this semiconductor device, a semiconductor pellet 2 is mounted on a pellet mounting portion (tab) of a lead frame 1, and a wire 3 is bonded between the semiconductor pellet 2 and the inner lead portion of the lead frame l.
半導体ペレット２およびワイヤ３は一例としてレジンモ
ールド型のパッケージ４の中に封止されている。The semiconductor pellet 2 and the wire 3 are sealed in a resin mold type package 4, for example.
本実施例のパッケージ４の外壁面のうち、リードフレー
ム１の外部リード５と対応する位置における両側壁面に
は側溝６ａが形成され、底壁面には側溝６ａとつながる
底溝６ｂが形成されており、三方に溝６ａ、６ｂが形成
されており、三方に溝６ａ、６ｂが設けられていること
になる。Of the outer wall surface of the package 4 of this embodiment, a side groove 6a is formed on both side wall surfaces at a position corresponding to the external lead 5 of the lead frame 1, and a bottom groove 6b connected to the side groove 6a is formed on the bottom wall surface. , grooves 6a and 6b are formed on three sides, and grooves 6a and 6b are provided on three sides.
リードフレーム１の外部リード５はこの溝６の中におい
て政情６に沿ってコ字状に折り曲げられた形状となって
おり、外部リード５の全体が溝６の中に収容され、外部
リード５自体はパッケージ４の外部には全く突出してい
ない。The external lead 5 of the lead frame 1 is bent into a U-shape along the political axis 6 in the groove 6, and the entire external lead 5 is accommodated in the groove 6, and the external lead 5 itself does not protrude outside the package 4 at all.
そのため、本実施例では、外部リード５と被実装面との
電気的接続を行うように、外部リード５の底面に半田７
が被着されており、この半田７の厚さはその底面がパン
ケージ４の底面から僅かに突出するようになっている。Therefore, in this embodiment, solder 7 is applied to the bottom surface of the external lead 5 so as to electrically connect the external lead 5 and the surface to be mounted.
The thickness of the solder 7 is such that its bottom surface slightly protrudes from the bottom surface of the pan cage 4.
したがって、本実施例によれば、半導体装置のパッケー
ジ４の外部にリードフレーム１の外部リード５が全く突
出しておらず、単に被実装面への接続用の半田７が僅か
に突出しているだけであるので、パッケージ４の封止後
に外部リード５の半田ディツプ、マーキング、特性検査
、プリント基板等への実装等の工程を行う場合に、半導
体装置の外部リード５どうしが絡まり合うことがなく、
ハンドリングが極めて容易で、多数の半導体装置をばら
状態でパーツフィーダのホッパに入れてハンドリングす
ることが可能となり、従来のように１個ずつマガジンに
収納する必要がなくなる。また、たとえば、外部リード
５の半田ディツプを行う場合にも、隣接する外部リード
５どうしが溝６ａ、６ｂ間のパフケージ壁面で隔離され
ているので、半田が隣接する外部リード５間にブリッジ
を形成してショート不良を起こすおそれもなくなる。Therefore, according to this embodiment, the external leads 5 of the lead frame 1 do not protrude outside the package 4 of the semiconductor device at all, and only the solder 7 for connection to the mounting surface protrudes slightly. This prevents the external leads 5 of the semiconductor device from becoming entangled with each other when performing processes such as solder dipping, marking, characteristic inspection, and mounting the external leads 5 on a printed circuit board after sealing the package 4.
Handling is extremely easy, and a large number of semiconductor devices can be placed in the hopper of a parts feeder in bulk and handled, eliminating the need to store them one by one in a magazine as in the past. Furthermore, when soldering the external leads 5, for example, since the adjacent external leads 5 are separated by the wall surface of the puff cage between the grooves 6a and 6b, the solder forms a bridge between the adjacent external leads 5. This also eliminates the risk of short-circuiting.
勿論、外部リード５がパッケージ４外に突出していない
ので、従来に比べて外部リード５の突出部だけ空間占有
面積を小さくすることができる。Of course, since the external leads 5 do not protrude outside the package 4, the space occupied by the protruding portions of the external leads 5 can be reduced compared to the conventional case.
さらに、本実施例１の半導体装置をたとえばプリント基
板に実装する場合、第２図（ａｌ、中）に示すように、
外部リード５の底面の半田７をプリント基板８０半田Ｎ
９上に面付けすることにより実装できるので、従来のよ
うにプリント基板８に外部リード挿入用の孔を穿けてお
く必要がなく、また外部リードとプリント基板の被実装
面との位置合わせが容易となる。Furthermore, when the semiconductor device of the first embodiment is mounted on a printed circuit board, for example, as shown in FIG. 2 (al, middle),
Connect the solder 7 on the bottom of the external lead 5 to the printed circuit board 80 with solder N.
Since it can be mounted by surface mounting on the printed circuit board 9, there is no need to drill holes for external lead insertion in the printed circuit board 8 as in the conventional case, and alignment of the external leads and the mounting surface of the printed circuit board is easy. becomes.
［実施例２コ
第３図（ａｌは本発明の実施例２を示す正面図、同図（
ｂ）はその■−■線断面図である。[Example 2 Figure 3 (al is a front view showing Example 2 of the present invention, the same figure (
b) is a sectional view taken along the line ■-■.
この実施例２においては、パッケージ４の外部リード収
容用の溝は側溝６ａのみであり、パッケージ底壁面には
溝が設けられていない。また、実施例２では、外部リー
ド５の下端のみがパッケージ４の底面から若干突出して
おり、またその突出部底面には半田７が被着されている
が、外部り一ド５はパンケージ４の側面方向には全く突
出していない。しかも、外部リード５の突出量はご（僅
かな寸法である。In this second embodiment, the groove for accommodating the external leads of the package 4 is only the side groove 6a, and no groove is provided on the bottom wall surface of the package. Further, in the second embodiment, only the lower end of the external lead 5 protrudes slightly from the bottom surface of the package 4, and the solder 7 is applied to the bottom surface of the protruding portion. It does not protrude in the lateral direction at all. Moreover, the amount of protrusion of the external leads 5 is small.
したがって、本実施例でも、半導体装置のハンドリング
が容易である他、空間占有面積も小さく、実装も容易で
ある等の利点が得られる。Therefore, this embodiment also provides advantages such as easy handling of the semiconductor device, small space occupation area, and easy mounting.
［実施例３］
第４図（ａ）は本発明の実施例３を示す正面図、同図（
ｂｌはそのＩＶ−ＩＶＶ線断面図ある。[Embodiment 3] FIG. 4(a) is a front view showing Embodiment 3 of the present invention;
bl is a sectional view taken along the line IV-IVV.
この実施例３では、パンケージ４の外部リード収容用の
溝は底壁面の底溝６ｂのみが設けられ、側面には溝が形
成されていない。In this third embodiment, only the bottom groove 6b in the bottom wall surface is provided as the groove for accommodating the external lead of the pan cage 4, and no groove is formed in the side surface.
その結果、本実施例３における外部リード５はパンケー
ジ４の側面から一部突出しているが、下端部は底溝６ｂ
の中に収容され、半田７がパンケージ底面から僅かに突
出しているだけである。As a result, the external lead 5 in the third embodiment partially protrudes from the side surface of the pan cage 4, but the lower end portion is located in the bottom groove 6b.
The solder 7 is only slightly protruding from the bottom of the pan cage.
したがって、本実施例３の場合でも、外部リード５の先
端部がパッケージ４の外部に突出しておらず、僅かに側
壁面から中間部がループ状に突出しているだけであるの
で、外部リード５どうしが絡まり合うことがなく、ハン
ドリングが容易で、空間占有面積も小さい上に、実装も
容易である。Therefore, even in the case of the third embodiment, the tips of the external leads 5 do not protrude to the outside of the package 4, and only the intermediate portions protrude from the side wall surface in a loop shape. They do not get tangled, are easy to handle, occupy a small space, and are easy to implement.
［実施例４］
第５図（ａ）は本発明の実施例４を示す正面図、同図（
ｂｌはその■−■線断面図である。[Embodiment 4] FIG. 5(a) is a front view showing Embodiment 4 of the present invention, and FIG.
bl is a sectional view taken along the line ■-■.
この実施例４は、外部リード収容用の溝が側溝６ａと細
溝６ｂの両方共に設けられている点では第１図の実施例
１と同じであるが、本実施例では外部リード５の２つの
折り曲げ部５ａ、５ｂが鋭角的に曲げられかつ両折り曲
げ部５ａ、５ｂのみがパンケージ４の外側に僅かに突出
している。Embodiment 4 is the same as Embodiment 1 shown in FIG. 1 in that grooves for accommodating external leads are provided in both the side groove 6a and the narrow groove 6b, but in this embodiment, two of the external leads 5 The two bent portions 5a, 5b are bent at acute angles, and only the two bent portions 5a, 5b protrude slightly to the outside of the pan cage 4.
したがって、この実施例４の場合にも、リードフレーム
１の外部リード５の先端部が底溝６ｂの中に収容されて
いるので、外部リード５どうしがハンドリング中に絡ま
り合うことはなく、空間占有面積も小さい上に、実装も
容易である。Therefore, also in the case of this fourth embodiment, since the tips of the external leads 5 of the lead frame 1 are accommodated in the bottom groove 6b, the external leads 5 do not become entangled with each other during handling, and occupy space. It has a small area and is easy to implement.
１効果］
（１）１本発明によれば、外部リード、特にその先端部
が封止体の外側に突出しないことにより、外部リードど
うしが絡まり合うことが防止され、ハンドリングが容易
となり、作業効率が向上する。1 Effect] (1) 1 According to the present invention, since the external leads, especially their tips, do not protrude outside the sealing body, the external leads are prevented from becoming entangled with each other, making handling easier, and improving work efficiency. will improve.
（２）、また、外部リードが全くまたは僅かに一部分の
みしか封止体の外側に突出しないことにより、電子部品
の空間占有面積が減少する。(2) Furthermore, since the external leads do not protrude or only partially protrude outside the sealing body, the space occupied by the electronic component is reduced.
（３）、さらに、被実装物に対して面付けができること
により、被実装物に実装用の孔を穿ける必要がなくなり
、電子部品と被実装物との位置合わせが容易となる。(3) Furthermore, since surface mounting can be performed on the object to be mounted, there is no need to make holes for mounting in the object to be mounted, and alignment between the electronic component and the object to be mounted becomes easy.
以上本発明者によってなされた発明を実施例にもとづき
具体的に説明したが、本発明は上記実施例に限定される
ものではなく、その要旨を逸脱しない範囲で種に変更可
能であることはいうまでもない。Although the invention made by the present inventor has been specifically explained based on Examples above, the present invention is not limited to the above Examples, and it is possible to change the invention to other species without departing from the gist of the invention. Not even.
たとえば、外部リード収容用の凹部としては前記実施例
１〜４の如く側壁面または低壁面の全長にわたる溝の代
わりに、たとえば外部リードの先端のみを挿入する凹部
を船底すること等も可能である。For example, instead of the groove extending the entire length of the side wall surface or the lower wall surface as in the first to fourth embodiments as the recess for accommodating the external lead, it is also possible to use a recess in the bottom of the ship into which only the tip of the external lead is inserted. .
［利用分野］
以上の説明では主として本発明者によってなされた発明
をその背景となった利用分野であるレジンモードパッケ
ージよりなるデュアルインライン型の半導体装置に適用
した場合について説明したが、それに限定されるもので
はな（、たとえば、ダイオード、トランジスタ、あるい
は他の型式の半導体装置、抵抗、コンデンサ等の電子部
品でも、封止体外に突出する外部リードを持つものであ
れば広く適用できる。[Field of Application] In the above explanation, the invention made by the present inventor was mainly applied to the field of application which is the background of the invention, which is a dual in-line type semiconductor device made of a resin mode package, but the invention is limited thereto. It is widely applicable to electronic components such as diodes, transistors, or other types of semiconductor devices, resistors, capacitors, etc., as long as they have external leads that protrude outside the encapsulation.
第１図（ａ）は本発明による電子部品の実施例１を示す
正面図、
第１図（ｂ）は同図（ａ）のＩ−Ｉ線断面図第２図（ａ
）は第１図（ａ）、中）の電子部品実装状態を示す正面
図、
第２図（ｂ）は同図（ａ）のｎ−ｎ線断面図、第３図（
ａ）は本発明の電子部品の実施例２を示す正面図、
第３図中）は同図（ａ）のｍ−ｍ線断面図、第４図（ａ
）は本発明による電子部品の実施例３を示す正面図、
第４図中）は同図（ａｌのＩＶ−ＩＶＶ線断面図第５図
（ａ）は本発明の電子部品の実施例４を示す正面図、
第５図中）は同図（ａ）のＶ−Ｖ線断面図である。
１・・・リードフレーム、２・・・半導体ペレット、３
・・・ワイヤ、４・・・パンケージ（封止体）、５・・
・外部リード、６ａ・・・側溝（凹部）、６ｂ・・・底
溝（凹部）、７・・・半田、８・・・プリント基板（被
実装物）。
（ｃｔ）
第 ２
（２）
コ
図
（ｂ）
（ａ−）
第
（ａ−）
１ｖ−］
３図
（す
（ｂ）FIG. 1(a) is a front view showing Embodiment 1 of the electronic component according to the present invention, FIG. 1(b) is a cross-sectional view taken along the line II in FIG.
) is a front view showing the electronic component mounting state in FIG. 1(a), middle), FIG. 2(b) is a sectional view taken along line nn in FIG.
a) is a front view showing Embodiment 2 of the electronic component of the present invention, FIG.
) is a front view showing Embodiment 3 of the electronic component according to the present invention, and FIG. The front view shown in FIG. 5(a) is a sectional view taken along the line V-V in FIG. 5(a). 1... Lead frame, 2... Semiconductor pellet, 3
...Wire, 4...Pan cage (sealing body), 5...
- External lead, 6a... side groove (recess), 6b... bottom groove (recess), 7... solder, 8... printed circuit board (mounted object). (ct) No. 2 (2) Fig. (b) (a-) No. (a-) 1v-] Fig. 3 (S (b)
Claims (1)
する電子部品において、封止体に外部リードを収容する
凹部を形成したことを特徴とする電子部品。1. An electronic component having a sealed body and an external lead protruding outside the sealed body, characterized in that the sealed body has a recessed portion for accommodating the external lead.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3604083A JPS59161851A (en) | 1983-03-07 | 1983-03-07 | Electronic component parts |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3604083A JPS59161851A (en) | 1983-03-07 | 1983-03-07 | Electronic component parts |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59161851A true JPS59161851A (en) | 1984-09-12 |
Family
ID=12458592
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3604083A Pending JPS59161851A (en) | 1983-03-07 | 1983-03-07 | Electronic component parts |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59161851A (en) |
Cited By (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59189662A (en) * | 1983-04-13 | 1984-10-27 | Fujitsu Ltd | Resin-sealed type semiconductor device |
| JPS61131494A (en) * | 1984-11-30 | 1986-06-19 | 松下電器産業株式会社 | Circuit board |
| JPS61207043U (en) * | 1985-06-18 | 1986-12-27 | ||
| JPS628645U (en) * | 1985-06-28 | 1987-01-19 | ||
| JPS6212959U (en) * | 1985-07-06 | 1987-01-26 | ||
| JPS6298759A (en) * | 1985-10-25 | 1987-05-08 | Mitsubishi Electric Corp | Electronic device |
| JPS645049A (en) * | 1987-06-26 | 1989-01-10 | Fujitsu Ltd | Resin sealed semiconductor device |
| JPH0313753U (en) * | 1989-06-23 | 1991-02-12 | ||
| JPH04159760A (en) * | 1990-10-23 | 1992-06-02 | Nec Kyushu Ltd | Semiconductor integrated circuit |
| US5856212A (en) * | 1994-05-11 | 1999-01-05 | Goldstar Electron Co., Ltd. | Method of producing semiconductor package having solder balls |
| US5963433A (en) * | 1996-12-28 | 1999-10-05 | Lg Semicon Co., Ltd. | Bottom lead semiconductor package with recessed leads and fabrication method thereof |
| KR20000035276A (en) * | 1998-11-06 | 2000-06-26 | 가네코 히사시 | BGA type semiconductor device package |
| US6433417B1 (en) * | 1998-03-06 | 2002-08-13 | Rohm Co., Ltd. | Electronic component having improved soldering performance and adhesion properties of the lead wires |
| US7057273B2 (en) * | 2001-05-15 | 2006-06-06 | Gem Services, Inc. | Surface mount package |
-
1983
- 1983-03-07 JP JP3604083A patent/JPS59161851A/en active Pending
Cited By (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59189662A (en) * | 1983-04-13 | 1984-10-27 | Fujitsu Ltd | Resin-sealed type semiconductor device |
| JPS61131494A (en) * | 1984-11-30 | 1986-06-19 | 松下電器産業株式会社 | Circuit board |
| JPS61207043U (en) * | 1985-06-18 | 1986-12-27 | ||
| JPS628645U (en) * | 1985-06-28 | 1987-01-19 | ||
| JPS6212959U (en) * | 1985-07-06 | 1987-01-26 | ||
| US4794446A (en) * | 1985-10-25 | 1988-12-27 | Mitsubishi Denki Kabushiki Kaisha | Electrode device and a method for making the same |
| JPS6298759A (en) * | 1985-10-25 | 1987-05-08 | Mitsubishi Electric Corp | Electronic device |
| JPS645049A (en) * | 1987-06-26 | 1989-01-10 | Fujitsu Ltd | Resin sealed semiconductor device |
| JPH0313753U (en) * | 1989-06-23 | 1991-02-12 | ||
| JPH04159760A (en) * | 1990-10-23 | 1992-06-02 | Nec Kyushu Ltd | Semiconductor integrated circuit |
| US5856212A (en) * | 1994-05-11 | 1999-01-05 | Goldstar Electron Co., Ltd. | Method of producing semiconductor package having solder balls |
| US5963433A (en) * | 1996-12-28 | 1999-10-05 | Lg Semicon Co., Ltd. | Bottom lead semiconductor package with recessed leads and fabrication method thereof |
| US6433417B1 (en) * | 1998-03-06 | 2002-08-13 | Rohm Co., Ltd. | Electronic component having improved soldering performance and adhesion properties of the lead wires |
| KR20000035276A (en) * | 1998-11-06 | 2000-06-26 | 가네코 히사시 | BGA type semiconductor device package |
| US7057273B2 (en) * | 2001-05-15 | 2006-06-06 | Gem Services, Inc. | Surface mount package |
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