JPS59132191A - Method of producing printed circuit board - Google Patents

Method of producing printed circuit board

Info

Publication number
JPS59132191A
JPS59132191A JP600783A JP600783A JPS59132191A JP S59132191 A JPS59132191 A JP S59132191A JP 600783 A JP600783 A JP 600783A JP 600783 A JP600783 A JP 600783A JP S59132191 A JPS59132191 A JP S59132191A
Authority
JP
Japan
Prior art keywords
adhesive layer
printed wiring
circuit board
printed circuit
plating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP600783A
Other languages
Japanese (ja)
Inventor
哲夫 中沢
魚津 信夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lincstech Circuit Co Ltd
Original Assignee
Hitachi Condenser Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Condenser Co Ltd filed Critical Hitachi Condenser Co Ltd
Priority to JP600783A priority Critical patent/JPS59132191A/en
Publication of JPS59132191A publication Critical patent/JPS59132191A/en
Pending legal-status Critical Current

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  • Manufacturing Of Printed Wiring (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 本発明は印刷配線板の製造方法に関づるものである。[Detailed description of the invention] The present invention relates to a method for manufacturing printed wiring boards.

基板に任意の印刷配線を設けた印刷配線板を製造するの
に、最初から必要な箇所にだけ印刷配線を設ける方法が
ある。゛ このような基板の製造方法の一つは、基板の表面に化学
メッキ用触媒入りの接着剤層を設け、印刷配線以外の部
分にメ1ツキレジスト用インクを印刷し、その後、エツ
チング後てメッキを施すものである。
In order to manufacture a printed wiring board in which arbitrary printed wiring is provided on a substrate, there is a method of providing printed wiring only at necessary locations from the beginning.゛One of the manufacturing methods for such a board is to provide an adhesive layer containing a chemical plating catalyst on the surface of the board, print a metal resist ink on areas other than the printed wiring, and then perform etching. It is plated.

ところで、従来、接着剤層は表面が硬度が大きく内側が
硬度が小さいためにエツチング処理を施すと、エツチン
グ面が不揃いで深浅の差が大きくなる。それ故、メッキ
処理を施すとメッキがこのエツチング面に一様に付着す
る時間が長くかかり、製造時ma5短縮を妨げる欠点が
あり、また、メッキ層が剥離し易いという欠点があった
By the way, conventionally, since the surface of the adhesive layer has a high hardness and the inside hardness has a low hardness, when an etching treatment is performed, the etched surface becomes irregular and the difference in depth becomes large. Therefore, when plating is performed, it takes a long time for the plating to uniformly adhere to the etched surface, which has the drawback of hindering the reduction of ma5 during manufacturing, and also has the drawback that the plating layer is easily peeled off.

本発明は、上記の欠点を改良し、製造時間の短縮が可能
でメッキ層の密着性を向上しうる印刷配線板の製造方法
の提供を目的とするものである。
An object of the present invention is to provide a method for manufacturing a printed wiring board that can improve the above-mentioned drawbacks, shorten the manufacturing time, and improve the adhesion of the plating layer.

本発明は、上記の目的を達成するために、基板に化学メ
ッキ用触媒入り接着剤層を設け、該接着剤層をエツチン
グ後に任意の印刷配線を設ける印刷配線板の製造方法に
おいて、接着剤層の表面を除去、する工程と、該工程後
に接着剤層をエツチングする工程とを施ずことを特徴と
する印刷配線板の製造方法を提供するものである。
In order to achieve the above object, the present invention provides a method for manufacturing a printed wiring board in which an adhesive layer containing a catalyst for chemical plating is provided on a substrate, and arbitrary printed wiring is provided after etching the adhesive layer. The present invention provides a method for manufacturing a printed wiring board, characterized in that the step of removing the surface of the printed wiring board and the step of etching the adhesive layer after the step are not performed.

以下、本発明を実施例に基づいて説明する。Hereinafter, the present invention will be explained based on examples.

先づ、紙エポキシ積層板や紙フェノール積層板からなる
基板に、フェノールとブタジェンゴムを主体とする化学
メッキ用触媒入り接着剤を塗布し接着剤層を形成する。
First, a catalyst-containing adhesive for chemical plating consisting mainly of phenol and butadiene rubber is applied to a substrate made of a paper epoxy laminate or a paper phenol laminate to form an adhesive layer.

次に、基板をC,H1度を40g/l以ゴζに維持され
IC重クロム酸ナトリウムと硼弗化水素酸とからなる溶
液中に浸漬する工程を施す。この後、さらに、基板をC
r31淵度が40o/J!より大に維持された重クロム
酸ナトリウムと硼弗化水素酸とからなる溶液中に浸漬す
る工程を施す。そして基板を液中から取り出して洗浄し
、メツキレシスト処理及びメッキ処理を施し、基板に任
意の印刷配線を設ける。
Next, the substrate is immersed in a solution consisting of IC sodium dichromate and borofluoric acid with C and H1 degrees maintained at 40 g/l or less. After this, further convert the board to C.
R31 Fuchi degree is 40o/J! A step of immersion in a solution of sodium dichromate and borofluoric acid maintained at a higher concentration is performed. Then, the substrate is taken out from the liquid, washed, and subjected to a metal resist treatment and a plating treatment, and arbitrary printed wiring is provided on the substrate.

すなわち、本発明は、τ記の通り、基板に接着剤層を形
成後、Cr3”濃度が40g71以下に維持された重ク
ロム的ナトリウム等の溶液中に浸漬しているので、接着
剤層の表面の硬度の大きい部分の々を除去できる。次に
、C,)+濃度が40!]/′Aより大に維持された重
クロム酸ナトリウム等の溶液中に浸漬して接着剤層の内
側の硬度の小さい部分をエツチングすることにより、接
着剤層の表面に規則的で整ったエツチング面が形成され
る。
That is, in the present invention, as described in τ, after the adhesive layer is formed on the substrate, it is immersed in a solution such as sodium dichromate whose Cr concentration is maintained at 40g71 or less, so that the surface of the adhesive layer is Then, the inside of the adhesive layer can be removed by immersing it in a solution such as sodium dichromate whose concentration is maintained at a value greater than 40!]/'A. By etching the portions with low hardness, a regular and uniform etched surface is formed on the surface of the adhesive layer.

そしてこの規則的で整ったエツチング面にメツキレシス
ト処理及びメッキ処理を施しているので、メッキは従来
よりも短かい時間で一様に付着し、また、接着剤層との
密着性も向上する。
Since the regular etched surface is subjected to the metal-resist treatment and the plating treatment, the plating is uniformly adhered in a shorter time than conventionally, and the adhesion to the adhesive layer is also improved.

以上の通り、本発明によれは、接着剤層の表面の硬度の
−大きい部分をエツチング処理前に予め除去することに
よってエツチング面を規則的に形成できるので、メッキ
層を短時間で形成できしかも接着剤層との密着性が向上
する印刷配線板が得られる。
As described above, according to the present invention, the etched surface can be formed regularly by removing the hard part of the surface of the adhesive layer before the etching treatment, so that the plated layer can be formed in a short time. A printed wiring board with improved adhesion to the adhesive layer can be obtained.

特許出願人 日立コンデンサ株式会社 −ル七Patent applicant: Hitachi Capacitor Co., Ltd. −Ru7

Claims (1)

【特許請求の範囲】[Claims] (1)  基板に化学メッキ用触媒入り接着剤層を設け
、該接着剤層に任意の印刷配線を設けた印刷配線板のI
IJ造方法において、接着剤層の表面を除去する工程と
、該工程後に接着剤層をエツチングする工程とを施すこ
とを特徴とする印刷配線板の製造方法。
(1) I of a printed wiring board in which an adhesive layer containing a catalyst for chemical plating is provided on the substrate and arbitrary printed wiring is provided on the adhesive layer.
A method for producing a printed wiring board, which is an IJ manufacturing method, and includes a step of removing the surface of an adhesive layer, and a step of etching the adhesive layer after the step.
JP600783A 1983-01-18 1983-01-18 Method of producing printed circuit board Pending JPS59132191A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP600783A JPS59132191A (en) 1983-01-18 1983-01-18 Method of producing printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP600783A JPS59132191A (en) 1983-01-18 1983-01-18 Method of producing printed circuit board

Publications (1)

Publication Number Publication Date
JPS59132191A true JPS59132191A (en) 1984-07-30

Family

ID=11626665

Family Applications (1)

Application Number Title Priority Date Filing Date
JP600783A Pending JPS59132191A (en) 1983-01-18 1983-01-18 Method of producing printed circuit board

Country Status (1)

Country Link
JP (1) JPS59132191A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS518570A (en) * 1974-07-10 1976-01-23 Matsushita Electric Ind Co Ltd Insatsuhaisenbanno seizohoho
JPS5388164A (en) * 1977-01-12 1978-08-03 Matsushita Electric Ind Co Ltd Method of producing printed circuit board
JPS5856383A (en) * 1981-09-29 1983-04-04 日立化成工業株式会社 Method of producing printed circuit board

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS518570A (en) * 1974-07-10 1976-01-23 Matsushita Electric Ind Co Ltd Insatsuhaisenbanno seizohoho
JPS5388164A (en) * 1977-01-12 1978-08-03 Matsushita Electric Ind Co Ltd Method of producing printed circuit board
JPS5856383A (en) * 1981-09-29 1983-04-04 日立化成工業株式会社 Method of producing printed circuit board

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