JPS59124726A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS59124726A JPS59124726A JP11283A JP11283A JPS59124726A JP S59124726 A JPS59124726 A JP S59124726A JP 11283 A JP11283 A JP 11283A JP 11283 A JP11283 A JP 11283A JP S59124726 A JPS59124726 A JP S59124726A
- Authority
- JP
- Japan
- Prior art keywords
- titanium
- etching
- platinum
- pattern
- etched
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 16
- 238000004519 manufacturing process Methods 0.000 title claims description 6
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 claims abstract description 51
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims abstract description 28
- 239000010936 titanium Substances 0.000 claims abstract description 28
- 229910052719 titanium Inorganic materials 0.000 claims abstract description 28
- 229910052697 platinum Inorganic materials 0.000 claims abstract description 25
- 229910052751 metal Inorganic materials 0.000 claims abstract description 24
- 239000002184 metal Substances 0.000 claims abstract description 24
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims abstract description 11
- 239000010931 gold Substances 0.000 claims abstract description 11
- 229910052737 gold Inorganic materials 0.000 claims abstract description 11
- 239000000758 substrate Substances 0.000 claims abstract description 8
- 229910001069 Ti alloy Inorganic materials 0.000 claims abstract description 7
- 238000000034 method Methods 0.000 claims description 13
- 230000001681 protective effect Effects 0.000 claims description 10
- 150000002739 metals Chemical class 0.000 claims description 8
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 claims description 6
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 claims description 5
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims description 5
- 229910001080 W alloy Inorganic materials 0.000 claims description 5
- 150000003609 titanium compounds Chemical class 0.000 claims description 5
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 claims description 5
- MAKDTFFYCIMFQP-UHFFFAOYSA-N titanium tungsten Chemical compound [Ti].[W] MAKDTFFYCIMFQP-UHFFFAOYSA-N 0.000 claims description 4
- 229910052763 palladium Inorganic materials 0.000 claims description 3
- 229920002120 photoresistant polymer Polymers 0.000 abstract description 13
- QZPSXPBJTPJTSZ-UHFFFAOYSA-N aqua regia Chemical compound Cl.O[N+]([O-])=O QZPSXPBJTPJTSZ-UHFFFAOYSA-N 0.000 abstract description 11
- 238000005530 etching Methods 0.000 abstract description 10
- 238000001020 plasma etching Methods 0.000 abstract description 10
- 238000001039 wet etching Methods 0.000 abstract description 8
- 230000015572 biosynthetic process Effects 0.000 abstract description 5
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 abstract description 3
- 239000000463 material Substances 0.000 abstract description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- 229910052681 coesite Inorganic materials 0.000 abstract 1
- 150000001875 compounds Chemical class 0.000 abstract 1
- 229910052906 cristobalite Inorganic materials 0.000 abstract 1
- 229960002050 hydrofluoric acid Drugs 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 229910052682 stishovite Inorganic materials 0.000 abstract 1
- 229910052905 tridymite Inorganic materials 0.000 abstract 1
- LYCAIKOWRPUZTN-UHFFFAOYSA-N Ethylene glycol Chemical compound OCCO LYCAIKOWRPUZTN-UHFFFAOYSA-N 0.000 description 3
- 239000007789 gas Substances 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- 239000002253 acid Substances 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000007738 vacuum evaporation Methods 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 1
- 229910001111 Fine metal Inorganic materials 0.000 description 1
- 150000007513 acids Chemical class 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 229910001873 dinitrogen Inorganic materials 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- -1 gold and palladium Chemical class 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 239000011259 mixed solution Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 210000001747 pupil Anatomy 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- WYXIGTJNYDDFFH-UHFFFAOYSA-Q triazanium;borate Chemical compound [NH4+].[NH4+].[NH4+].[O-]B([O-])[O-] WYXIGTJNYDDFFH-UHFFFAOYSA-Q 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Weting (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は半導体装置の製造工程において、特に微細金属
配線形成工程の改良に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to improvements in the manufacturing process of semiconductor devices, particularly in the process of forming fine metal wiring.
従来、半導体装置の電極配線の材料としては、主にアル
ミニウムが使用されているが、その他、白金、金等も、
目的に応じて使用される。Conventionally, aluminum has been mainly used as the material for electrode wiring in semiconductor devices, but other materials such as platinum and gold have also been used.
Used according to purpose.
アルミニウムＦｉ種々の酸類に溶けるので、従来は湿式
エツチングによる配線形成が盛んに行なわれてきた。ま
た最近ではプラズマエツチング等のドライエツチングに
より比較的容易に加工されるようになった。Since aluminum Fi is soluble in various acids, wet etching has traditionally been widely used to form wiring. Recently, it has become relatively easy to process by dry etching such as plasma etching.
一方、白金や金は、安定で、はとんどの無機薬品に耐え
、王水のような特殊な強酸でなければエツチングされな
い。これらの金属の配線は通常、フォトレジスト被膜を
保瞳膜にしてエツチングして形成されるが、フォトレジ
ストは上記、王水には耐えられず、侵されるので、半導
体装置に要求される正確な配線パターンを得ることが困
炒であった。また、白金や金のプラズマエツチングは、
エツチング速度が著しく遅く、再現性にも乏しいので実
用的でなかった。このような理由により、白金や金の配
線は王にリフト・オフ法により形成されている。On the other hand, platinum and gold are stable and resistant to most inorganic chemicals, and can only be etched with a special strong acid such as aqua regia. These metal wirings are usually formed by etching a photoresist film using a pupil retaining film, but photoresist cannot withstand and is eroded by the aqua regia mentioned above, so the precise precision required for semiconductor devices cannot be achieved. It was difficult to obtain the wiring pattern. In addition, plasma etching of platinum and gold
The etching speed was extremely slow and the reproducibility was poor, making it impractical. For these reasons, platinum and gold interconnects are formed using the lift-off method.
すなわち、半導体基板上に、まず所望の配線パターンと
逆のレジストパターンを形成し、次に白金、金等の金属
全スパッタ法、あるいは真空蒸着法等により被着し、こ
の後、フォトレジストＫｌ去すると、フォトレジスト上
の不要金属膜も同時に除去され、所望の金属配線が得ら
れるという方法であるが、このリフト・オフ法では、半
導体基板の周辺に部分的に不良配線箇所（ショート）が
発生しやすく、又、再現性に乏しいと−う欠点があった
。That is, a resist pattern opposite to a desired wiring pattern is first formed on a semiconductor substrate, and then a metal such as platinum or gold is deposited by sputtering or vacuum evaporation, and then a photoresist is removed. Then, the unnecessary metal film on the photoresist is also removed at the same time, and the desired metal wiring can be obtained.However, this lift-off method causes defective wiring spots (short circuits) to occur in parts of the periphery of the semiconductor substrate. It has the drawbacks of being easy to perform and having poor reproducibility.
本発明の目的は前述したような従来の欠点を除き、従来
困難であった、白金や金の、量産性の良い配線形成法を
提供することにある。An object of the present invention is to eliminate the above-mentioned drawbacks of the conventional method and to provide a method of forming interconnects using platinum or gold that is difficult to produce in mass production, which has been difficult in the past.
すなわち、本発明は、半導体基板上Ｔｌｃ篇１の金属層
を被着し、しかる後、該被膜上に形成されたチタン、ま
タハ、チタン化合物、または、チタン合金等のパターン
を保護膜にして、下地の第１の金属層を熱王水［より湿
式エツチング１−１第１の金属層のパターンを形成する
ことを特徴とする半導体装置の製造方法である。また、
前記、チタン化合物および、チタン合金が窒化チタン、
酸化チタン、チタン・タングステン合金、等よりなるこ
と、あるいは、前記第１の金属層が白金、又はパラジウ
ム、又は金又は、これらの多重膜又は、これらの金属と
他の金属との多重膜であることも、本発明の特徴である
。That is, the present invention deposits a metal layer of TLC Part 1 on a semiconductor substrate, and then uses a pattern of titanium, metal, a titanium compound, a titanium alloy, etc. formed on the film as a protective film. This method of manufacturing a semiconductor device is characterized in that the underlying first metal layer is wet-etched using hot aqua regia [1-1] to form a pattern of the first metal layer. Also,
The titanium compound and the titanium alloy are titanium nitride,
The first metal layer is made of titanium oxide, a titanium-tungsten alloy, etc., or the first metal layer is platinum, palladium, gold, a multilayer film of these metals, or a multilayer film of these metals and another metal. This is also a feature of the present invention.
以下に、本発明の実施例を図を追って説明する。Embodiments of the present invention will be described below with reference to the drawings.
＠１図ａ −ｆは本発明の第１の実施例を説明する断面
図である。@1 Figures a-f are cross-sectional views for explaining the first embodiment of the present invention.
すなわち、本発明により白金の配線を形成する方法を示
す断面図である。まず、第１図ａけ、半導体基板１上に
５ｉ０２等の絶縁膜２を形成した状態を示す。次に第１
図すに示すように、白金３゜チタン４をスパッタリング
または、真空蒸着法にて、連続被着１ｙ ％ フォトレ
ジストパターン５を形成すると第１ 睦会示す通りとな
る。この時、フォトレジストは通常、市販されているネ
がタイプ（ＯＭＲｓ ａ ； 東京応化工業社製等）お
よび、ポジタイプ（ＡＺ−１３！’１０；米国シプレー
社製、ＯＦＰ几；東京応化工業社製等）のいずれでも良
い。That is, it is a cross-sectional view showing a method of forming platinum wiring according to the present invention. First, FIG. 1A shows a state in which an insulating film 2 such as 5i02 is formed on a semiconductor substrate 1. As shown in FIG. Then the first
As shown in the figure, a 1y% photoresist pattern 5 is formed by sputtering platinum and 3° titanium 4 by sputtering or vacuum evaporation, as shown in the first diagram. At this time, the photoresists are usually commercially available negative type (OMRs a; manufactured by Tokyo Ohka Kogyo Co., Ltd., etc.) and positive type (AZ-13!'10; manufactured by Shipley Co., Ltd., USA; OFP; manufactured by Tokyo Ohka Kogyo Co., Ltd.). etc.) is fine.
りとなる。ここでチタン４のエツチングはＣＦ４（フレ
オン系）ガスを使用するプラズマエツチング、または、
フッ酸を使用する湿式エツチングのいずれでも良い。プ
ラズマエツチングを行なう場合、ＣＦ４１００チガス、
または、０２４チ〜２０チ混合のＣＦ４ ｆ使用し、パ
ワー２００Ｗ、真空度０．４ＴＯｒｒの条件でプラズマ
エツチングすると、１００１のチタンは約１分でエツチ
ングされる。It becomes Here, titanium 4 is etched by plasma etching using CF4 (freon-based) gas, or by
Any wet etching using hydrofluoric acid may be used. When performing plasma etching, CF4100 gas,
Alternatively, if plasma etching is performed using a mixture of 024-20 and 024-20 CF4 f under the conditions of a power of 200 W and a degree of vacuum of 0.4 TOrr, 1001 titanium will be etched in about 1 minute.
一方、湿式エツチングを行々う場合は、フッ酸（５０チ
）：水＝１：５０（容積比）の混合液でチタン１０００
λは約１分でエツチングされる。On the other hand, when performing wet etching, titanium 1,000
λ is etched in about 1 minute.
次に第１図ｅ［示すように７オトレジストパターン５を
除去した後、チタン４を保護膜にして、 ５ −
５０〜１００℃の熱王水で白金３をエツチングした状態
を示す。この時チタンは熱王水に耐え、かつ、パターン
のゆがみや、虫くい状のエツチング不良を生じない。後
述するが、保護膜としては、チタン以外にも、窒化チタ
ン、酸化チタン、チタン・タングステン合金等のチタン
化合物、または、チタン合金も同様に王水に耐えるので
使用できる。Next, FIG. 1e shows a state in which, after removing the photoresist pattern 5, the platinum 3 is etched with hot aqua regia at 50 to 100 DEG C., using titanium 4 as a protective film. At this time, titanium can withstand hot aqua regia and does not cause pattern distortion or wormhole-like etching defects. As will be described later, in addition to titanium, titanium compounds such as titanium nitride, titanium oxide, and titanium-tungsten alloys, or titanium alloys can also be used as the protective film because they are similarly resistant to aqua regia.
最後にチタン４全前述した方法でエツチングすると、第
１図ｆに示す通りとなり、白金の配線パターン形成は終
了する。Finally, the entire titanium layer 4 is etched in the manner described above, resulting in the formation of the platinum wiring pattern as shown in FIG. 1f.
次に本発明の第２の実施例を第２図ａ−ｆ ４で順を追
って説明する。第２の実施例は、チタン。Next, a second embodiment of the present invention will be explained step by step with reference to FIGS. 2a-f4. The second example is titanium.
白金の二層膜パターンを形成する方法を示している。A method of forming a platinum bilayer film pattern is shown.
すなわち、＠２図ａは半導体基板１上に８ｉ０２等の絶
縁膜２を形成した後、チタン４′、白金３゜チタン４を
連続的に形成した状態を示している。That is, Figure 2a shows a state in which after an insulating film 2 of 8i02 or the like is formed on a semiconductor substrate 1, titanium 4' and platinum 3° titanium 4 are successively formed.
この後、フォトレジストパターン５を形成すると、第２
図ｂｖｃ示す通りとなる。次に、白金３上のチタン４を
フォトレジストパターン５を保護膜トシ ６−
て、エツチングすると第２図Ｃに示す通りとなる。After that, when the photoresist pattern 5 is formed, the second
As shown in Figure bvc. Next, the titanium 4 on the platinum 3 is etched with a photoresist pattern 5 on it as a protective film, resulting in the result as shown in FIG. 2C.
エツチングの方法は、第１の実施例で説明した通りであ
る。次に、フォトレジストパターン５を除去すると第２
図ｄに示す様になり、この後、チタン４を保護膜として
下地の白金３を第１の実施例で示した熱王水にてエツチ
ングすると第２図ｅに示す通りとなる。最後に下地のチ
タン４′および白金３上のチタン４を第１の実施例で説
明したプラズマエツチング、または、湿式エツチングに
より、同時にエツチングすると、第２図ｆに示す通りと
なり、チタン４′、白金３の二層の配線パターンが形成
される。The etching method is the same as described in the first embodiment. Next, when the photoresist pattern 5 is removed, the second
The result is as shown in FIG. 2d, and then, using the titanium 4 as a protective film, the underlying platinum 3 is etched with the hot aqua regia shown in the first embodiment, resulting in the result as shown in FIG. 2e. Finally, when the underlying titanium 4' and the titanium 4 on the platinum 3 are simultaneously etched by plasma etching or wet etching as explained in the first embodiment, the result is as shown in FIG. A two-layer wiring pattern of No. 3 is formed.
前述１−たように、本発明では、白金パターンの形成を
、従来困難であった湿式エツチングにより行なうことが
できるようにな９、これにより従来のリフト・オフ法で
生じていたショート不良がなくなり、リフト・オフ法に
特有な再現性の悪さという欠点もなく、量産性は著しく
改善された。As mentioned in 1-1 above, in the present invention, it is now possible to form a platinum pattern by wet etching, which has been difficult in the past. , mass productivity was significantly improved without the disadvantage of poor reproducibility that is characteristic of the lift-off method.
なお、本発明の実施例では、白金をエツチングする時の
保護膜として、チタンを例にしたが、チタン４を窒素ガ
ス雰囲気中において、４ｏｏｏ℃で５〜２０分熱処理し
て得られる窒化チタンを保護膜として湿式エツチングし
ても同様に良好な結果が得られた。In the examples of the present invention, titanium was used as an example of a protective film when etching platinum, but titanium nitride obtained by heat-treating titanium 4 at 400°C for 5 to 20 minutes in a nitrogen gas atmosphere was used. Similar good results were obtained using wet etching as a protective film.
また、他の保護膜として、チタン４をエチレングリコー
ルとホウ酸アンモニウムの混合液中で一３０Ｖ程度で陽
極酸化して得られる酸化チタンを使用しても同様であり
、さらに、チタンとタングステンの合金膜を保護として
も同様に良好な結果が得られた。これらの保護膜のうち
、窒化チタン、酸化チタンは、＠１及び第２の実施例で
述べた方法でエツチングできるが、チタン・タングステ
ンの合金？エツチングする場合は、ＣＦ４（フレオン系
）ガスによるプラズマエツチングが適しており、プラズ
マエツチングの条件は、第１の実施例で述べたチタンの
プラズマエツチングの条件と同様で良い。Furthermore, as another protective film, titanium oxide obtained by anodic oxidation of titanium 4 in a mixed solution of ethylene glycol and ammonium borate at about -30V may be used, and an alloy of titanium and tungsten may also be used. Similar good results were obtained when the membrane was protected. Among these protective films, titanium nitride and titanium oxide can be etched by the method described in @1 and the second embodiment, but titanium-tungsten alloy? In the case of etching, plasma etching using CF4 (freon-based) gas is suitable, and the conditions for plasma etching may be the same as those for plasma etching of titanium described in the first embodiment.
なお、本実施例で（ｒｌ、主に白金の配線パターンを形
成する例について述べたが、王水をエツチング液として
使用する他の金属、例えば金、パラジウム等の配線パタ
ーンの形成にも、また、これらの金属の多重膜の配線パ
ターンの形成にも、また、これらの金層と他の金属の多
重膜の配線パターンの形成にも、本発明を同様に適用で
きることは明らかである。In this example, an example of forming a wiring pattern of mainly platinum (rl) was described, but it can also be used to form a wiring pattern of other metals, such as gold and palladium, using aqua regia as an etching solution. It is clear that the present invention can be similarly applied to the formation of wiring patterns of multiple films of these metals, and also to the formation of wiring patterns of multiple films of these gold layers and other metals.
第１１図ａ乃至第１図ｆけ本発明による配線形成工程の
第１の実施例を示す断面図であり、第２図ａ乃至第２図
ｆは、第２の実施例を示す断面図である。
図中の記号は、
１・・・・・・半導体基板、２・・・・・・絶縁膜、３
・旧・・白金、４および４′・・・・・・チタン、５・
・・・・・フォトレジストパターンである。
９−
第１図
の
第２図11a to 1f are sectional views showing a first embodiment of the wiring forming process according to the present invention, and FIGS. 2a to 2f are sectional views showing a second embodiment. be. Symbols in the diagram are: 1... Semiconductor substrate, 2... Insulating film, 3
・Old...Platinum, 4 and 4'...Titanium, 5.
...It is a photoresist pattern. 9- Figure 2 of Figure 1
Claims (3)
に形成されたチタン、チタン化合物またはチタン合金の
パターン全保護膜にして、下地の該第１の金属層を湿式
エツチングし、該第１の金属層の配信パターンを形成す
ることを特徴とする半導体装置の製造方法。(1) A first metal layer is entirely deposited on a semiconductor substrate, a pattern of titanium, a titanium compound, or a titanium alloy formed on the film is made into a protective film, and the underlying first metal layer is wet-etched. and forming a distribution pattern of the first metal layer.
酸化チタンもしくはチタン・タングステン合金を含んで
いることを特徴とする特許請求の範囲第（１）項記載の
半導体装置の製造方法。(2) Titanium compounds or titanium alloys include titanium nitride,
The method for manufacturing a semiconductor device according to claim (1), characterized in that the semiconductor device contains titanium oxide or a titanium-tungsten alloy.
はこれらの金属の多重膜、又はこれらの金属と他の金属
との多重膜であることｌを特徴とする特許請求の範囲用
（１）項記載の半導体装置の製造方法。(3) Claims (1) characterized in that the first metal layer is platinum, palladium, or gold, or a multilayer film of these metals, or a multilayer film of these metals and other metals. ) The method for manufacturing a semiconductor device according to item 2.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11283A JPS59124726A (en) | 1983-01-04 | 1983-01-04 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11283A JPS59124726A (en) | 1983-01-04 | 1983-01-04 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59124726A true JPS59124726A (en) | 1984-07-18 |
Family
ID=11464977
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11283A Pending JPS59124726A (en) | 1983-01-04 | 1983-01-04 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59124726A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008503383A (en) * | 2004-06-23 | 2008-02-07 | インティアー オートモーティヴ クロージャーズ インコーポレイテッド | Structural door module |
| US9039915B2 (en) | 2009-02-23 | 2015-05-26 | Kanto Kagaku Kabushiki Kaisha | Etching solution compositions for metal laminate films |
-
1983
- 1983-01-04 JP JP11283A patent/JPS59124726A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008503383A (en) * | 2004-06-23 | 2008-02-07 | インティアー オートモーティヴ クロージャーズ インコーポレイテッド | Structural door module |
| US8763308B2 (en) | 2004-06-23 | 2014-07-01 | Intier Automotive Closures Inc. | Structural door module |
| US9039915B2 (en) | 2009-02-23 | 2015-05-26 | Kanto Kagaku Kabushiki Kaisha | Etching solution compositions for metal laminate films |
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