JPS59108466A - Solid-state image pickup element - Google Patents
Solid-state image pickup elementInfo
- Publication number
- JPS59108466A JPS59108466A JP57217762A JP21776282A JPS59108466A JP S59108466 A JPS59108466 A JP S59108466A JP 57217762 A JP57217762 A JP 57217762A JP 21776282 A JP21776282 A JP 21776282A JP S59108466 A JPS59108466 A JP S59108466A
- Authority
- JP
- Japan
- Prior art keywords
- solid
- gate
- epitaxial layer
- sit
- state image
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims abstract description 7
- 230000006698 induction Effects 0.000 claims abstract description 6
- 238000003384 imaging method Methods 0.000 claims description 13
- 230000003068 static effect Effects 0.000 claims description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 17
- 229910052782 aluminium Inorganic materials 0.000 abstract description 17
- 239000000758 substrate Substances 0.000 abstract description 13
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 12
- 229910052710 silicon Inorganic materials 0.000 abstract description 12
- 239000010703 silicon Substances 0.000 abstract description 12
- 239000003990 capacitor Substances 0.000 description 7
- 230000035945 sensitivity Effects 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 3
- 206010047571 Visual impairment Diseases 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 230000003595 spectral effect Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000012790 confirmation Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14679—Junction field effect transistor [JFET] imagers; static induction transistor [SIT] imagers
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Abstract
Description
【発明の詳細な説明】 本発明は固体撮像素子に関するものである。[Detailed description of the invention] The present invention relates to a solid-state image sensor.
ＣＯＤ 、あるいはＭＯＳ型等の固体撮像素子を改良し
たものとして、いわゆる「二階だで構造」の固体撮像素
子が知られており、この種類の固体撮像素子はたとえば
テレビジョン学会技術報告Ｖｏ／。A solid-state image sensor with a so-called "two-story structure" is known as an improved version of a COD or MOS type solid-state image sensor, and this type of solid-state image sensor is described in, for example, the Technical Report of the Television Society Vol.
３／ｌ６３３（１９８０年１月）の第４１〜４６頁に記
載されている。この固体撮像素子においては第１図に示
すように、画素走査用スイッチとなるＭＯＳ・ＦＥＴ
ｌをそなえたシリコン基板２上に光電変換作用をもつ光
導電膜８が設けられている。光導電膜□８の上側には透
明電極４が、下側にはアルミニウム電極５があり、これ
ら電極によりキャパシタが形成されている。透明電極４
には正電圧Ｖ、が印加され、アルミニウム電極５は０電
位である。外部から透明電極４を介して光導電膜８中に
光が入ると、光の量に応じてこの光導電膜中で電子−正
孔対が生成する。これにより生成した正孔は電極４およ
び５間の電界によりアルミニウム電極５側に移動する。3/1633 (January 1980), pages 41-46. In this solid-state image sensor, as shown in Figure 1, a MOS/FET is used as a switch for pixel scanning.
A photoconductive film 8 having a photoelectric conversion function is provided on a silicon substrate 2 having a photoelectric conversion function. A transparent electrode 4 is provided on the upper side of the photoconductive film □8, and an aluminum electrode 5 is provided on the lower side, and a capacitor is formed by these electrodes. Transparent electrode 4
A positive voltage V is applied to the aluminum electrode 5, and the aluminum electrode 5 is at zero potential. When light enters the photoconductive film 8 from the outside through the transparent electrode 4, electron-hole pairs are generated in the photoconductive film depending on the amount of light. The holes thus generated move toward the aluminum electrode 5 due to the electric field between the electrodes 4 and 5.
従って、アルミニウム電極５の電位１・・が０から正電
位に上昇する。アルミニウム電極５はその下にあるＭＯ
Ｓ−ＦＥＴＩのドレイン領域６に接続されている。ある
時間後の信号読み出し時には、Ｍ２Ｓ−ＦＥＴ １のゲ
ート電極７に正電圧が加わり、ＭＯＳ・ＦＥＴがオン状
態となる。すると、ドレイン領１域６の正電位をうちけ
すだけの電子が、ソース領域８に接続された信号電極９
より注入される。この注入される電子の情すなわち再充
電電流が撮像素子力・らのビデオ信号となる。なお、ｌ
Ｏは酸化膜を示し、アルミニウム電極５と信号電極９と
は−１゜絶縁層１０’により分離されている。Therefore, the potential 1 of the aluminum electrode 5 rises from 0 to a positive potential. The aluminum electrode 5 is the MO below it.
It is connected to the drain region 6 of the S-FETI. When reading a signal after a certain time, a positive voltage is applied to the gate electrode 7 of the M2S-FET 1, and the MOS-FET is turned on. Then, enough electrons to release the positive potential of the drain region 1 region 6 reach the signal electrode 9 connected to the source region 8.
More injected. The information of the injected electrons, that is, the recharging current becomes the video signal of the image sensor. In addition, l
O indicates an oxide film, and the aluminum electrode 5 and the signal electrode 9 are separated by -1° by an insulating layer 10'.
これらの「二階だで構造」の固体撮像素子は、ＣＯＤあ
るいはＭＯＳ型の固体撮像素子に比較して次のような特
長がある。These "two-story structure" solid-state imaging devices have the following features compared to COD or MOS type solid-state imaging devices.
ｌ）分光感度特性が光導電膜により決まるため撮像目的
に応じた光導電膜の選択が可能であり、特にカラー撮像
等にこの撮像素子を用いるのが好適である。l) Since the spectral sensitivity characteristics are determined by the photoconductive film, it is possible to select a photoconductive film depending on the purpose of imaging, and it is particularly suitable to use this image sensor for color imaging.
２）−画素に占める受光面積の比率が大き（なるため感
度が向上する。2) - The ratio of the light-receiving area to the pixel is large (this increases the sensitivity).
８）プルーミング現象が抑制される。8) Pluming phenomenon is suppressed.
ｉ−か（〜ながら、上述した固体撮像素子は次の欠点を
有する。(However, the solid-state imaging device described above has the following drawbacks.
■）第１図から明らかガようにシリコン基板上にはＭＯ
Ｓ−ＦＥＴや信号電極等があるために凹凸が多すく、そ
の上に光導電膜を形成することが極めて困難である。■) As is clear from Figure 1, there is no MO on the silicon substrate.
Since there are S-FETs, signal electrodes, etc., there are many irregularities, and it is extremely difficult to form a photoconductive film thereon.
２） ＭＯＳ−ＦＥＴはオン抵抗が比較的太きく、光
導電膜を充電する時にこの抵抗（でより時定数が大きく
なり、これが残像の原因となる。このため動、。2) MOS-FET has a relatively large on-resistance, and when the photoconductive film is charged, this resistance increases the time constant, which causes afterimages.
〈ものの撮像の時には正常な画面が得られない。□本発
明の目的は、上述した欠点を解消するとともに、一画素
の平面寸法を減少させて高密度化を達成せしめうるよう
にした固体撮像素子に関するものである。<When capturing images of objects, a normal screen cannot be obtained. □An object of the present invention is to solve the above-mentioned drawbacks and to provide a solid-state image sensor that can achieve high density by reducing the planar dimension of one pixel.
本発明は、二階だで構造の固体撮像素子において、ＭＯ
Ｓ−Ｉ”ＥＴの代りにたで型チャネル構造の静電誘導ト
ランジスタ（ＳＩＴ ）を用いることにより、上述した
目的を達成しうるという事実を確かめ、か＼る認識を基
に成したものである。The present invention provides a two-story solid-state imaging device with an MO
This study was based on the confirmation that the above objectives can be achieved by using a static induction transistor (SIT) with a vertical channel structure in place of the S-I''ET. .
ＳＩＴけ、接合型ＮＥＴにおいてチャネルの長すヲ短か
ぐし且つ不純物密度を低ぐすることにより、不飽和型の
電流対電圧特性を実現したトランジスタであり、たとえ
ば−ＩＥＥＫ ＴｒａｎｓａＣｔｉｏｎｓ ｏｎＥｌｅ
ｃｔｒｏｎ Ｄ・）ｖｉｏｅｓ ｎ Ｖｏｐ、ＥＤ−２
２の第１８５〜１９７１頁に記載されている。SIT is a transistor that achieves unsaturated current-voltage characteristics by shortening the channel length and lowering the impurity density in a junction-type NET.
ctron D・)vioes n Vop, ED-2
2, pages 185-1971.
以下第２〜５図につき本発明の実施例′？ｉ：貌明する
。なお、これらの図において、第１図と対応する部分に
は第１図と同一の符号を付した。Embodiments of the present invention are shown in FIGS. 2 to 5 below. i: Clear your appearance. In these figures, parts corresponding to those in FIG. 1 are given the same reference numerals as in FIG. 1.
第２図は本発明固体撮像素子の第１実施例であ４゜す、
第２図（ａ）は平面図、第２図（ｂ）は第２図（、）の
Ａ゛−Ａ’線に沿った断面図、第２図（Ｃ）は第２図（
劫のＢ−Ｂ’線に沿った断面図である。FIG. 2 shows the first embodiment of the solid-state image sensing device of the present invention.
Fig. 2(a) is a plan view, Fig. 2(b) is a sectional view taken along line A'-A' of Fig. 2(,), and Fig. 2(C) is a plan view of Fig. 2().
It is a sectional view along the line BB' of the kalpa.
ｐ型のシリコン基板２内［１１：、走査用スイッチとな
る埋込型ゲート構造の静電誘導トランジスタ（ＳＩＴ）
１．１が形成されている。１２はシリコン基板ｚ上に形
成されたｎ−型のエピタキシアル層り′上に形成された
ｎ 型のソース領域であり、これらソース領域１２は、
エピタキシアル層２′の表面上に形成された酸化膜１０
を貫通するアルミニラ１ム電極５に接続されている。エ
ピタナシアル層２′内にはｐ型の半導体領域であるゲー
）１Ｂが埋込捷れており、これらゲート１Ｂが垂直走査
用配線を兼ねる。また、シリコン基板２とエピタキシア
ル層２′との間にはｎ 型のドレイン領域１４が設置・
けられており、これらドレイン領域１４が水平走査用配
線を兼ねている。本例においては垂直走査用配線１８お
よび水平走査用配線１４が半導体本体（２および２’
）内に埋込まれている為、アルミニウム電極５を平坦に
でき、光導電膜８も平坦と、。Inside the p-type silicon substrate 2 [11:, a static induction transistor (SIT) with a buried gate structure serving as a scanning switch
1.1 is formed. Reference numeral 12 denotes an n-type source region formed on an n-type epitaxial layer formed on a silicon substrate z.
Oxide film 10 formed on the surface of epitaxial layer 2'
It is connected to an aluminum laminate electrode 5 that penetrates through the aluminum laminate. Gates 1B, which are p-type semiconductor regions, are buried in the epitaxial layer 2', and these gates 1B also serve as vertical scanning wiring. Furthermore, an n-type drain region 14 is provided between the silicon substrate 2 and the epitaxial layer 2'.
These drain regions 14 also serve as horizontal scanning wiring. In this example, the vertical scanning wiring 18 and the horizontal scanning wiring 14 are connected to the semiconductor body (2 and 2'
), the aluminum electrode 5 can be made flat, and the photoconductive film 8 can also be made flat.
なり、その形成が容易となり、しかも透明電極４″も平
坦となる。Therefore, its formation becomes easy, and the transparent electrode 4'' also becomes flat.
第８図は本発明固体撮像素子の回路構成図である。５Ｉ
ＴＩＩのゲートＧは垂直走査回路１５に接続されており
、５ＩＴＩＩのドレインＤは水平走査スイッチ１７のソ
ースＳに接続されている。水平走査スイッチ１７のゲー
トＧは水平走査回路１６に接続されている。水平走査ス
イッチ１？のドレインＤには負荷抵抗１８′ｆｔ介して
直流電圧Ｖが印加されており、且つ信号出力端子１９が
接続され１・・でいる。２０は各画素のアルミニウム電
極５と透明電極４との間にはさまれた光導電膜８から成
るキャパシタであり、本例では透明電極４が接地されて
いる。FIG. 8 is a circuit diagram of the solid-state image sensing device of the present invention. 5I
The gate G of TII is connected to the vertical scanning circuit 15, and the drain D of 5ITII is connected to the source S of the horizontal scanning switch 17. A gate G of the horizontal scanning switch 17 is connected to the horizontal scanning circuit 16. Horizontal scan switch 1? A DC voltage V is applied to the drain D of the circuit through a load resistor 18'ft, and a signal output terminal 19 is connected thereto. 20 is a capacitor consisting of a photoconductive film 8 sandwiched between an aluminum electrode 5 and a transparent electrode 4 of each pixel; in this example, the transparent electrode 4 is grounded.
第８図において、垂直走査回路１５によりある１゜画素
のＳＩＴ ｌ １のゲートＧに正電位が加わり、且つそ
のＳＩＴに接続されている水平走査スイッチｌ？が水平
走査回路１６によりオンとなると、このＳＩＴに負荷抵
抗１８を通して電流が流れ、光導電膜からなるキャパシ
タ２０を電圧Ｖまで充電す−，，。In FIG. 8, a positive potential is applied to the gate G of a certain 1° pixel SIT l1 by the vertical scanning circuit 15, and the horizontal scanning switch l? connected to the SIT is applied. When is turned on by the horizontal scanning circuit 16, a current flows through this SIT through the load resistor 18, charging the capacitor 20 made of a photoconductive film to the voltage V.
る。その後この画素に光が入射すると、光強度に応じて
電子−正孔対が生成することにより透明電極４とアルミ
ニウム電極５との間で電流が流れ、キャパシタ２０の電
圧がＶより低下する。一定期間後書びその画素のＳＩＴ
がオンになるとこのキャパシタ２０は電圧Ｖまで充電さ
れる。この時の充電電流が負荷抵抗１８によって信号出
力端子１９より出力電圧として読みだされる。垂直走査
回路１５および水平走査回路１６より走査パルスが順次
加わることにより各画素が順次走査され、ビデト・オ信
号が信号出力端子より出力される。Ru. After that, when light enters this pixel, electron-hole pairs are generated depending on the light intensity, so that a current flows between the transparent electrode 4 and the aluminum electrode 5, and the voltage of the capacitor 20 decreases from V. SIT of that pixel written after a certain period of time
When turned on, this capacitor 20 is charged to a voltage V. The charging current at this time is read out from the signal output terminal 19 by the load resistor 18 as an output voltage. By sequentially applying scanning pulses from the vertical scanning circuit 15 and the horizontal scanning circuit 16, each pixel is sequentially scanned, and a video signal is outputted from the signal output terminal.
第４図は本発明固体撮像素子の第２実施例を示す。本例
でけＳＩＴ ｌ ｌが表面ゲート構造となっている。す
なわち、ゲート１８が半導体本体（２および２′）の表
面に設けられている。本例において１・も第８図の回路
構成により動作させることができる。すなわち、垂直走
査回路および水平走査回路からの垂直および水平走査パ
ルスが加わることにより画素が選択されＳＩＴ １１が
オンとなる。するとキャパシタを充電するとともにその
充電電流が−・・・信号出力として読み出される。FIG. 4 shows a second embodiment of the solid-state imaging device of the present invention. In this example, SITl has a surface gate structure. That is, a gate 18 is provided on the surface of the semiconductor body (2 and 2'). In this example, 1. can also be operated by the circuit configuration shown in FIG. That is, by applying vertical and horizontal scanning pulses from the vertical scanning circuit and the horizontal scanning circuit, a pixel is selected and the SIT 11 is turned on. Then, the capacitor is charged and the charging current is read out as a signal output.
上述したような本発明固体撮像素子は一般のシリコン集
積回路技術を用いて製造しつる。第８図に示す本発明に
よる固体撮像素子の製造工程の一例を以下に第５図につ
き説明する。The solid-state imaging device of the present invention as described above is manufactured using general silicon integrated circuit technology. An example of the manufacturing process of the solid-state image sensor according to the present invention shown in FIG. 8 will be described below with reference to FIG. 5.
第５図（ａ）に示すように、まず最初にｐ型シリコン基
板２上に部分的にｎ領域を拡散してドレイン領域１４・
を形成する。次にその上にｎ−型のエピタキシアル層２
′を成長させ（第５図（ｂ）参照）、次に第５図（ｃ）
に示すようにエピタキシアル層２”内’・・にｐ型の領
域を拡散により形成してゲート１８を構成する。次に第
５図（６）に示すように、第５図（０）のエピタキシア
ル層り′上に更にｎ−型のエピタキシアル層を成長させ
てゲー）１Ｂをエピタキシアル層２′内に完全に坤込む
。As shown in FIG. 5(a), first, an n region is partially diffused onto a p-type silicon substrate 2 to form a drain region 14.
form. Next, on top of that is an n-type epitaxial layer 2.
' (see Fig. 5(b)), then Fig. 5(c)
As shown in FIG. 5(6), a p-type region is formed within the epitaxial layer 2'' by diffusion to form the gate 18.Next, as shown in FIG. 5(6), the gate 18 is formed by diffusion. An n-type epitaxial layer is further grown on the epitaxial layer 2' to completely embed the gate electrode 1B into the epitaxial layer 2'.
次に、エピタキシアル層り′上に酸化膜ｌＯを形成し、
この酸化膜１０にあけた孔を経てｒ型の領域を拡散によ
り形成してソース領ｆｉ１２ｔ−ｍ成する（第５図（６
）参照）。次に第５図（ｒ） Ｋ示すように、ソース領
域１２に接続されたアルミニウム、。Next, an oxide film lO is formed on the epitaxial layer,
An r-type region is formed by diffusion through the hole drilled in this oxide film 10 to form a source region fi12t-m (FIG. 5(6)
)reference). Next, as shown in FIG. 5(r)K, aluminum is connected to the source region 12.
電極５を酸化膜１０上に形成する。次に、第５図゛（ｇ
）に示すように、酸化膜ＩＯおよびアルミニウム電極５
上に光導電膜８を形成し、その上に透明電極４を形成し
７て第２図に示すような固体撮像素子を完成させる。Electrode 5 is formed on oxide film 10. Next, Figure 5 (g
), the oxide film IO and the aluminum electrode 5
A photoconductive film 8 is formed thereon, and a transparent electrode 4 is formed thereon to complete a solid-state imaging device as shown in FIG.
以上実施例で説明したように、本発明では光電変換をシ
リコン基板上に形成した光導電膜でおこなっているため
分光感度特性がよく、本発明固体撮像素子は特にカラー
撮像に用いて好適である。As explained in the examples above, in the present invention, photoelectric conversion is performed using a photoconductive film formed on a silicon substrate, so the spectral sensitivity characteristics are good, and the solid-state image sensor of the present invention is particularly suitable for use in color imaging. .
また一画素に占める受光面積の比率が大きいため１１感
度が向上するとともに、プルーミング現象が抑制される
ため画面中に極めて強い光がある場合にも良好な画面が
再現できる。更に本発明では、ＳＩＴ ＴＮ：用いてお
り、また水平および垂直走査用配線がシリコン基板に埋
込まれているために基板衣１面の凹凸が少なく、光導電
膜の形成が容易である。Furthermore, since the ratio of the light-receiving area to one pixel is large, the sensitivity is improved, and since the pluming phenomenon is suppressed, a good screen can be reproduced even when there is extremely strong light in the screen. Further, in the present invention, SIT TN is used, and since the horizontal and vertical scanning wirings are embedded in the silicon substrate, there are few irregularities on the surface of the substrate, and it is easy to form a photoconductive film.
またＳＩＴのオン抵抗は小さいため、光導電膜充電時の
時定数が小さく残像がきわめて少ない。さらに横形チャ
ネル構造のＭＯＳ−ＦＥＴでなく縦形チャネルのＳＩＴ
を用いるために一画素の平面寸法が減少、。Furthermore, since the on-resistance of the SIT is small, the time constant during charging of the photoconductive film is small and there is very little afterimage. Furthermore, instead of MOS-FET with horizontal channel structure, SIT with vertical channel structure
The planar dimension of one pixel decreases due to the use of .
でき、画素の高密度化が可能であるという効果がある。This has the effect of making it possible to increase the pixel density.
本発明は上述した例のみに限定されず、幾多の変更を加
えうろことができる。例えば、上述した例ではＳＩＴの
ソース領域を上側にし、ドレイン領域を下側にしたが、
ソースおよびドレイン領域の配置を逆にして透明電極に
負荷抵抗を介して正電圧を印加するようにすることもで
きる。また上述した例では各画素のＳＩＴのゲートに垂
直走査パルスを印加するものとしたが、このゲートには
水平・走査パルスを印加するようにすることもできる。The invention is not limited to the examples described above, but can be modified in many ways. For example, in the above example, the source region of the SIT was placed on the upper side and the drain region was placed on the lower side.
It is also possible to reverse the arrangement of the source and drain regions so that a positive voltage is applied to the transparent electrode via a load resistor. Further, in the above example, a vertical scanning pulse is applied to the SIT gate of each pixel, but a horizontal scanning pulse may also be applied to this gate.
第１図は従来の固体撮像素子の一画素部分Ｐ示す断面図
、
第２図は本発明固体撮像素子の一例の一部分を示し、第
２図（、）は平面図、第２図（ｂ）は第２図（、）のＡ
−Ａ’線に沿う断面図、第２図（ｃ）は第２図（ａ）
のＢ−Ｂ’線に沿う断面図、
第８図は本発明固体撮像素子の一回路構成図、第４図は
本発明固体撮像素子の他の例を示す断面図、
第５図は第２図に示す構成の固体撮像素子の製造工程を
示す貌１明図である。
１・・・ＭＯＳ−ＦＥＴ、 ２・・・シリコン基板、
２′・・・エピタキシアル層、８・・・光導電膜、４・
・・透明電極、５・・・アルミニウム電極、６・・・ド
レイン領域、？・・・ゲート電極、８・・・ソース領域
、９・・・信号電極、１０・・・酸化膜、１０′・・・
絶縁層、１１・・・静電誘導トランジスタ、１２・・・
ソース領域、１８・・・ゲート、１４・・・ドレイン領
域、１５・・・垂直走査回路、 ′１６・・・水平
走査回路、■？・・・水平走査スイッチ、１８・・・負
荷抵抗、１９・・・信号出力端子、ｚＯ・・・キャパシ
タ。
第１図
第３図
↓ ↓ ↓Fig. 1 is a cross-sectional view showing one pixel portion P of a conventional solid-state image sensor, Fig. 2 is a partial view of an example of the solid-state image sensor of the present invention, Fig. 2 (,) is a plan view, and Fig. 2 (b) is A in Figure 2 (,)
- Cross-sectional view along line A', Figure 2 (c) is Figure 2 (a)
8 is a circuit configuration diagram of the solid-state imaging device of the present invention, FIG. 4 is a sectional view showing another example of the solid-state imaging device of the present invention, and FIG. FIG. 1 is a schematic diagram illustrating a manufacturing process of a solid-state image sensor having the configuration shown in the figure. 1...MOS-FET, 2...Silicon substrate,
2'...Epitaxial layer, 8...Photoconductive film, 4.
...Transparent electrode, 5...Aluminum electrode, 6...Drain region, ? ... Gate electrode, 8... Source region, 9... Signal electrode, 10... Oxide film, 10'...
Insulating layer, 11... Static induction transistor, 12...
Source region, 18...Gate, 14...Drain region, 15...Vertical scanning circuit, '16...Horizontal scanning circuit, ■? ...Horizontal scanning switch, 18...Load resistance, 19...Signal output terminal, zO...Capacitor. Figure 1 Figure 3 ↓ ↓ ↓
Claims (1)
れた半導体本体と、該半導体本体上に形成された光導電
膜と、該光導電膜上に形成された電極とを有し、光導電
膜で光電変換された電気信号を静電誘導トランジスタを
用いて読みだすようにしたことを特徴とする固体撮像素
子。1. A semiconductor body having a semiconductor body in which a static induction transistor having a vertical channel is formed, a photoconductive film formed on the semiconductor body, and an electrode formed on the photoconductive film, A solid-state imaging device characterized in that a converted electrical signal is read out using an electrostatic induction transistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57217762A JPS59108466A (en) | 1982-12-14 | 1982-12-14 | Solid-state image pickup element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57217762A JPS59108466A (en) | 1982-12-14 | 1982-12-14 | Solid-state image pickup element |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59108466A true JPS59108466A (en) | 1984-06-22 |
Family
ID=16709332
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57217762A Pending JPS59108466A (en) | 1982-12-14 | 1982-12-14 | Solid-state image pickup element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59108466A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8605175B2 (en) | 2010-03-31 | 2013-12-10 | Sony Corporation | Solid-state image capturing device including a photochromic film having a variable light transmittance, and electronic device including the solid-state image capturing device |
-
1982
- 1982-12-14 JP JP57217762A patent/JPS59108466A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8605175B2 (en) | 2010-03-31 | 2013-12-10 | Sony Corporation | Solid-state image capturing device including a photochromic film having a variable light transmittance, and electronic device including the solid-state image capturing device |
| US9219090B2 (en) | 2010-03-31 | 2015-12-22 | Sony Corporation | Solid-state image capturing device and electronic device |
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