JPS5899913U - high frequency amplifier - Google Patents

high frequency amplifier

Info

Publication number
JPS5899913U
JPS5899913U JP19377181U JP19377181U JPS5899913U JP S5899913 U JPS5899913 U JP S5899913U JP 19377181 U JP19377181 U JP 19377181U JP 19377181 U JP19377181 U JP 19377181U JP S5899913 U JPS5899913 U JP S5899913U
Authority
JP
Japan
Prior art keywords
frequency amplifier
high frequency
field effect
effect transistor
impedance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP19377181U
Other languages
Japanese (ja)
Other versions
JPS622816Y2 (en
Inventor
典男 小宮山
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP19377181U priority Critical patent/JPS5899913U/en
Publication of JPS5899913U publication Critical patent/JPS5899913U/en
Application granted granted Critical
Publication of JPS622816Y2 publication Critical patent/JPS622816Y2/ja
Granted legal-status Critical Current

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  • Amplifiers (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は予備をもつ高周波増幅システムの概略を示す図
、第2図は高周波増幅器の入力及び出力回路の例を示す
図、第3図は従来の信号端子に減衰器を付加した高周波
増幅器を示す図、第4図は、本考案の一実施例を示す回
路構成図であり、インピーダンス補償回路を付加した高
周波増幅器を示す図、第5図、第6図は本考案に係るイ
ンピーダンス補償回路の他の例を示す構成図である。 1・・・・・・入力端子、2・・・・・・高周波増幅器
の信号端子、3・・・・・・信号端子、4,5・・・・
・・エミッタ端子、6・・・・・・接地端子、7・・・
・・・バイアス端子、8・・・・・・接地端子、9・・
・・・・電源端子、101・・・・・・ハイブリッド、
102・・・・・・高周波増幅器、103・・・・・・
減衰器、104.105・・・・・・トランジスタ、1
06・・・・・・インピーダンス補償回路、107・・
・・・・電界効果トランジスタ、108・・・・・・終
端抵抗器、109゜110・・・・・・分圧抵抗器、1
11・・・・・・コンデンサ。 第4図 −102 第5図
Figure 1 shows an outline of a high-frequency amplification system with a backup, Figure 2 shows an example of the input and output circuit of a high-frequency amplifier, and Figure 3 shows a conventional high-frequency amplifier with an attenuator added to the signal terminal. Figure 4 is a circuit configuration diagram showing an embodiment of the present invention, and Figures 5 and 6 are diagrams showing a high frequency amplifier to which an impedance compensation circuit is added. It is a block diagram which shows another example. 1... Input terminal, 2... High frequency amplifier signal terminal, 3... Signal terminal, 4, 5...
...Emitter terminal, 6...Ground terminal, 7...
...Bias terminal, 8...Ground terminal, 9...
...Power terminal, 101...Hybrid,
102...High frequency amplifier, 103...
Attenuator, 104.105...Transistor, 1
06... Impedance compensation circuit, 107...
...Field effect transistor, 108... Terminating resistor, 109°110... Voltage dividing resistor, 1
11... Capacitor. Figure 4-102 Figure 5

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 電源が“ON”の場合に信号端子のインピーダンスが整
合し、電源が“OFF”“の場合にほぼ開放インピーダ
ンスとなる高周波増幅器において、前記高周波増幅器の
電源電圧を分圧する分圧回路と、電界効果トランジスタ
と、該電界効果トランジスタが“’ON”の時に前記電
界効果トランジスタのドレイン端子から前記電界効果ト
ランジスタ側ヲ見たインピーダンスが回路の特性インピ
ーダンスと整合するように選ばれた終端抵抗器とを有す
るインピーダンス補償回路を含み、前記インピーダンス
補償回路の中の前記電界効果トランジスタのドレイン端
子が高周波増幅器の前記信号端子に接続され、前記高周
波増幅器の電源を前記分圧回路で分圧した電圧により電
源がON゛の時に前記電界効果トランジスタがOFF”
になり、電源が“’OFF”の時には前記電界効果トラ
ンジスタが“ON゛となること番特徴とする高周波増幅
器。
In a high frequency amplifier in which the impedance of the signal terminal matches when the power is "ON" and has an almost open impedance when the power is "OFF", a voltage dividing circuit that divides the power supply voltage of the high frequency amplifier and a field effect are used. a terminating resistor selected such that the impedance seen from the drain terminal of the field effect transistor toward the field effect transistor side matches the characteristic impedance of the circuit when the field effect transistor is "'ON"; an impedance compensation circuit, the drain terminal of the field effect transistor in the impedance compensation circuit is connected to the signal terminal of a high frequency amplifier, and the power is turned on by a voltage obtained by dividing the power supply of the high frequency amplifier by the voltage dividing circuit. The field effect transistor is OFF when
A high frequency amplifier characterized in that the field effect transistor is "ON" when the power supply is "OFF".
JP19377181U 1981-12-25 1981-12-25 high frequency amplifier Granted JPS5899913U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19377181U JPS5899913U (en) 1981-12-25 1981-12-25 high frequency amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19377181U JPS5899913U (en) 1981-12-25 1981-12-25 high frequency amplifier

Publications (2)

Publication Number Publication Date
JPS5899913U true JPS5899913U (en) 1983-07-07
JPS622816Y2 JPS622816Y2 (en) 1987-01-22

Family

ID=30107116

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19377181U Granted JPS5899913U (en) 1981-12-25 1981-12-25 high frequency amplifier

Country Status (1)

Country Link
JP (1) JPS5899913U (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9167286B2 (en) 2009-09-21 2015-10-20 Ppc Broadband, Inc. Passive multi-port entry adapter and method for preserving downstream CATV signal strength within in-home network
US9306530B2 (en) 2010-02-01 2016-04-05 Ppc Broadband, Inc. Multipath mitigation circuit for home network
US9351051B2 (en) 2008-10-13 2016-05-24 Ppc Broadband, Inc. CATV entry adapter and method for distributing CATV and in-home entertainment signals
US9363469B2 (en) 2008-07-17 2016-06-07 Ppc Broadband, Inc. Passive-active terminal adapter and method having automatic return loss control
US10187673B2 (en) 2008-10-13 2019-01-22 Ppc Broadband, Inc. Ingress noise inhibiting network interface device and method for cable television networks

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9363469B2 (en) 2008-07-17 2016-06-07 Ppc Broadband, Inc. Passive-active terminal adapter and method having automatic return loss control
US9351051B2 (en) 2008-10-13 2016-05-24 Ppc Broadband, Inc. CATV entry adapter and method for distributing CATV and in-home entertainment signals
US10187673B2 (en) 2008-10-13 2019-01-22 Ppc Broadband, Inc. Ingress noise inhibiting network interface device and method for cable television networks
US9167286B2 (en) 2009-09-21 2015-10-20 Ppc Broadband, Inc. Passive multi-port entry adapter and method for preserving downstream CATV signal strength within in-home network
US9516376B2 (en) 2009-09-21 2016-12-06 Ppc Broadband, Inc. Passive multi-port entry adapter and method for preserving downstream CATV signal strength within in-home network
US9306530B2 (en) 2010-02-01 2016-04-05 Ppc Broadband, Inc. Multipath mitigation circuit for home network

Also Published As

Publication number Publication date
JPS622816Y2 (en) 1987-01-22

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