JPS5899863U - hybrid integrated circuit - Google Patents
hybrid integrated circuitInfo
- Publication number
- JPS5899863U JPS5899863U JP1981195177U JP19517781U JPS5899863U JP S5899863 U JPS5899863 U JP S5899863U JP 1981195177 U JP1981195177 U JP 1981195177U JP 19517781 U JP19517781 U JP 19517781U JP S5899863 U JPS5899863 U JP S5899863U
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- hybrid integrated
- circuit components
- wiring conductors
- present
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Multi-Conductor Connections (AREA)
- Combinations Of Printed Boards (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は本考案の実施の対象例としてのトランジスタブ
リッジ回路の回路図、第2図は第1図の回路に対する本
考案による配線導体パターンを図式的に示す回路図、第
3図は本考案の一実施例の一方の基板の斜視図、第4図
はその重ね合せ状態を示す側面図、第5図はでき上った
本考案の一実施例の斜視図、第6図は同じく側面図であ
る。
1・・・基板、2・・・トランジスタ、3・・・抵抗体
、4゜5・・・金属クリップ。
、 −1t2を
曙)、−rFigure 1 is a circuit diagram of a transistor bridge circuit as an example of the implementation of the present invention, Figure 2 is a circuit diagram schematically showing a wiring conductor pattern according to the present invention for the circuit of Figure 1, and Figure 3 is a circuit diagram of the present invention. FIG. 4 is a perspective view of one of the substrates of one embodiment, FIG. 4 is a side view showing their overlapping state, FIG. 5 is a perspective view of the completed embodiment of the present invention, and FIG. 6 is a side view of the same. It is. 1...Substrate, 2...Transistor, 3...Resistor, 4゜5...Metal clip. , -1t2 at dawn), -r
Claims (1)
配線導体に回路部品が接続された2枚の基板が回路部品
の存在しない側の面によって重ねられ、端部において配
線導体と接触する金属クリップによって挟着されたこと
を特徴とする混成集積回路。Two boards each having a wiring conductor with the same pattern on one side and circuit components connected to the wiring conductors are stacked together with the sides on which no circuit components are present, and metal clips that contact the wiring conductors at the ends are used. A hybrid integrated circuit characterized by being sandwiched.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1981195177U JPS5899863U (en) | 1981-12-26 | 1981-12-26 | hybrid integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1981195177U JPS5899863U (en) | 1981-12-26 | 1981-12-26 | hybrid integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5899863U true JPS5899863U (en) | 1983-07-07 |
Family
ID=30108460
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1981195177U Pending JPS5899863U (en) | 1981-12-26 | 1981-12-26 | hybrid integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5899863U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02267997A (en) * | 1989-04-07 | 1990-11-01 | Canon Inc | Mounting structure for amplifier circuit |
-
1981
- 1981-12-26 JP JP1981195177U patent/JPS5899863U/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02267997A (en) * | 1989-04-07 | 1990-11-01 | Canon Inc | Mounting structure for amplifier circuit |
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